[all-commits] [llvm/llvm-project] f21b62: [NFC] Add fragment-getting functions to DbgRecord ...
Sayhaan Siddiqui via All-commits
all-commits at lists.llvm.org
Wed Jul 10 15:38:37 PDT 2024
Branch: refs/heads/users/shawbyoung/spr/main.bolt-function-matching-with-function-calls-as-anchors
Home: https://github.com/llvm/llvm-project
Commit: f21b62b0d1d13fa3f259da4dde587c1289c84fb8
https://github.com/llvm/llvm-project/commit/f21b62b0d1d13fa3f259da4dde587c1289c84fb8
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
A llvm/include/llvm/IR/DbgVariableFragmentInfo.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/lib/IR/DebugProgramInstruction.cpp
Log Message:
-----------
[NFC] Add fragment-getting functions to DbgRecord (#97705)
Patch [1/x] to fix structured bindings debug info in SROA.
Copy getFragment and getFragmentOrEntireVariable from DbgVariableIntrinsic.
Move FragmentInfo out of DIExpression and DebugInfoMetadata.h into a new file
DbgVariableFragmentInfo.h so it can be included into DebugProgramInstruction.h
without pulling in other includes and classes.
These functions will be used in subsequent patches.
Commit: 40fe73e09f1f76c7ff2a50cf960c753dd809629b
https://github.com/llvm/llvm-project/commit/40fe73e09f1f76c7ff2a50cf960c753dd809629b
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
Log Message:
-----------
[bazel] Add missing gmp dep for f8834ed24bf11d19c96c49d42e77d4408af91fd8
Commit: 11f7c89bef14f57e36ed74a0fc647f214b1e058e
https://github.com/llvm/llvm-project/commit/11f7c89bef14f57e36ed74a0fc647f214b1e058e
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
R llvm/include/llvm/IR/DbgVariableFragmentInfo.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/lib/IR/DebugProgramInstruction.cpp
Log Message:
-----------
Revert "[NFC] Add fragment-getting functions to DbgRecord (#97705)"
This reverts commit f21b62b0d1d13fa3f259da4dde587c1289c84fb8.
Fails to build.
Commit: 9b754675d3e0861039cf87cf4a0488ecc121e530
https://github.com/llvm/llvm-project/commit/9b754675d3e0861039cf87cf4a0488ecc121e530
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/include/llvm/Analysis/ValueLattice.h
M llvm/lib/Analysis/LazyValueInfo.cpp
Log Message:
-----------
[ValueLattice] Add asConstantRange() helper (NFC)
Move the toConstantRange() helper from LVI into ValueLattice,
so it can be reused in other places like SCCP.
Commit: deb6b6038c3dcdca7ce21abca4fddffbe53b1403
https://github.com/llvm/llvm-project/commit/deb6b6038c3dcdca7ce21abca4fddffbe53b1403
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-07-07 (Sun, 07 Jul 2024)
Changed paths:
A llvm/include/llvm/IR/DbgVariableFragmentInfo.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/lib/IR/DebugProgramInstruction.cpp
Log Message:
-----------
Reapply [NFC] Add fragment-getting functions to DbgRecord (#97705)
Patch [1/x] to fix structured bindings debug info in SROA.
Copy getFragment and getFragmentOrEntireVariable from DbgVariableIntrinsic.
Move FragmentInfo out of DIExpression and DebugInfoMetadata.h into a new file
DbgVariableFragmentInfo.h so it can be included into DebugProgramInstruction.h
without pulling in other includes and classes.
Commit: f50f7a7aa0b897ef91361d7dc159f3262d142bdc
https://github.com/llvm/llvm-project/commit/f50f7a7aa0b897ef91361d7dc159f3262d142bdc
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
[NFC] Add DIExpression::extractLeadingOffset (#97719)
Patch [2/x] to fix structured bindings debug info in SROA.
It extracts a constant offset from the DIExpression if there is one and fills
RemainingOps with the ops that come after it.
This function will be used in a subsequent patch.
Commit: 5ce9a86110df0592d036688dc5b3ae2fbdbf99db
https://github.com/llvm/llvm-project/commit/5ce9a86110df0592d036688dc5b3ae2fbdbf99db
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M lldb/examples/synthetic/gnu_libstdcpp.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/variant/TestDataFormatterLibStdcxxVariant.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/variant/main.cpp
Log Message:
-----------
[lldb] Make variant formatter work with libstdc++-14 (#97568)
In this version the internal data member has grown an additional
template parameter (bool), which was throwing the summary provider off.
This patch uses the type of the entire variant object. This is part of
the API/ABI, so it should be more stable, but it means we have to
explicitly strip typedefs and references to get to the interesting bits,
which is why I've extended the test case with examples of those.
Commit: b590e9a5aedabeceb00d81d49897abbf02ab3b87
https://github.com/llvm/llvm-project/commit/b590e9a5aedabeceb00d81d49897abbf02ab3b87
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M lldb/include/lldb/Utility/Listener.h
M lldb/source/API/SBAttachInfo.cpp
M lldb/source/API/SBLaunchInfo.cpp
M lldb/source/Utility/Listener.cpp
Log Message:
-----------
[lldb] Remove Listener::SetShadow (#97555)
It's not used since https://reviews.llvm.org/D157556.
Commit: c2fe75f99c9b385eb707571e0b46b7a1afef37db
https://github.com/llvm/llvm-project/commit/c2fe75f99c9b385eb707571e0b46b7a1afef37db
Author: tcwzxx <tcwzxx at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
Make the logic for checking scatter vectorized nodes of GEP clearer (#97826)
There is no functional change.
Authored-by: zhizhixu <zhizhixu at tencent.com>
Commit: 4c23625357b0b6091bc97478a79d522a832c2b21
https://github.com/llvm/llvm-project/commit/4c23625357b0b6091bc97478a79d522a832c2b21
Author: Kendal Harland <3987220+kendalharland at users.noreply.github.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M lldb/test/API/functionalities/unwind/zeroth_frame/TestZerothFrame.py
Log Message:
-----------
Fix flake in TestZerothFrame.py (#96685)
This test is currently flaky on a local Windows amd64 build. The reason
is that it relies on the order of `process.threads` but this order is
nondeterministic:
If we print lldb's inputs and outputs while running, we can see that the
breakpoints are always being set correctly, and always being hit:
```sh
runCmd: breakpoint set -f "main.c" -l 2
output: Breakpoint 1: where = a.out`func_inner + 1 at main.c:2:9, address = 0x0000000140001001
runCmd: breakpoint set -f "main.c" -l 7
output: Breakpoint 2: where = a.out`main + 17 at main.c:7:5, address = 0x0000000140001021
runCmd: run
output: Process 52328 launched: 'C:\workspace\llvm-project\llvm\build\lldb-test-build.noindex\functionalities\unwind\zeroth_frame\TestZerothFrame.test_dwarf\a.out' (x86_64)
Process 52328 stopped
* thread #1, stop reason = breakpoint 1.1
frame #0: 0x00007ff68f6b1001 a.out`func_inner at main.c:2:9
1 void func_inner() {
-> 2 int a = 1; // Set breakpoint 1 here
^
3 }
4
5 int main() {
6 func_inner();
7 return 0; // Set breakpoint 2 here
```
However, sometimes the backtrace printed in this test shows that the
process is stopped inside NtWaitForWorkViaWorkerFactory from
`ntdll.dll`:
```sh
Backtrace at the first breakpoint:
frame #0: 0x00007ffecc7b3bf4 ntdll.dll`NtWaitForWorkViaWorkerFactory + 20
frame #1: 0x00007ffecc74585e ntdll.dll`RtlClearThreadWorkOnBehalfTicket + 862
frame #2: 0x00007ffecc3e257d kernel32.dll`BaseThreadInitThunk + 29
frame #3: 0x00007ffecc76af28 ntdll.dll`RtlUserThreadStart + 40
```
When this happens, the test fails with an assertion error that the
stopped thread's zeroth frame's current line number does not match the
expected line number. This is because the test is looking at the wrong
thread: `process.threads[0]`.
If we print the list of threads each time the test is run, we notice
that threads are sometimes in a different order, within
`process.threads`:
```sh
Thread 0: thread #4: tid = 0x9c38, 0x00007ffecc7b3bf4 ntdll.dll`NtWaitForWorkViaWorkerFactory + 20
Thread 1: thread #2: tid = 0xa950, 0x00007ffecc7b3bf4 ntdll.dll`NtWaitForWorkViaWorkerFactory + 20
Thread 2: thread #1: tid = 0xab18, 0x00007ff64bc81001 a.out`func_inner at main.c:2:9, stop reason = breakpoint 1.1
Thread 3: thread #3: tid = 0xc514, 0x00007ffecc7b3bf4 ntdll.dll`NtWaitForWorkViaWorkerFactory + 20
Thread 0: thread #3: tid = 0x018c, 0x00007ffecc7b3bf4 ntdll.dll`NtWaitForWorkViaWorkerFactory + 20
Thread 1: thread #1: tid = 0x85c8, 0x00007ff7130c1001 a.out`func_inner at main.c:2:9, stop reason = breakpoint 1.1
Thread 2: thread #2: tid = 0xf344, 0x00007ffecc7b3bf4 ntdll.dll`NtWaitForWorkViaWorkerFactory + 20
Thread 3: thread #4: tid = 0x6a50, 0x00007ffecc7b3bf4 ntdll.dll`NtWaitForWorkViaWorkerFactory + 20
```
Use `self.thread()` to consistently select the correct thread, instead.
Co-authored-by: kendal <kendal at thebrowser.company>
Commit: d6fb89903409c7977f90b9f2f6a557f04d3f7e35
https://github.com/llvm/llvm-project/commit/d6fb89903409c7977f90b9f2f6a557f04d3f7e35
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
Log Message:
-----------
[MLIR][OpenMP] Improve loop wrapper representation (#97706)
This patch replaces the `SingleBlockImplicitTerminator<"TerminatorOp">`
trait of loop wrapper operations for the `SingleBlock` trait. This
enables a more robust implementation of the
`LoopWrapperInterface::isWrapper()` method, since it does no longer have
to deal with the potentially missing (implicit) terminator.
The `LoopWrapperInterface::isWrapper()` method is also extended to not
identify as wrappers those operations which have a loop wrapper
operation inside that is not taking a wrapper role. This is important
for cases where `omp.parallel` is nested, which can but is not required
to work as a loop wrapper.
Tests are updated to integrate these representation and validation
changes.
Commit: 857700ff6fb9f9f653c3788445df06db07e7bb59
https://github.com/llvm/llvm-project/commit/857700ff6fb9f9f653c3788445df06db07e7bb59
Author: Kendal Harland <3987220+kendalharland at users.noreply.github.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
Log Message:
-----------
[lldb][test] Fix type error when calling random.randrange with 'float' arg (#97328)
This test only runs on Windows and fails because we're passing a literal
of the wrong type to random.randrange.
Co-authored-by: kendal <kendal at thebrowser.company>
Commit: a497e987e5b09ab58efc7c6bef5ff68d4cd750f3
https://github.com/llvm/llvm-project/commit/a497e987e5b09ab58efc7c6bef5ff68d4cd750f3
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/sitofp-to-tbl.ll
Log Message:
-----------
Reapply "[AArch64] Lower extending sitofp using tbl (#92528)"
This re-commits d1a4f0c9fb559eb4c2fb56112e56343bcd333edc after
a issue was fixed in f92bfca9fc217cad9026598ef6755e711c0be070
("[AArch64] All bits of an exact right shift are demanded (#97448)").
Commit: 124b18b09d6bc25ac5f34e24a9b13f4212c01233
https://github.com/llvm/llvm-project/commit/124b18b09d6bc25ac5f34e24a9b13f4212c01233
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
Fix un/signed mismatch in test introduced in #97719
Buildbot:
https://lab.llvm.org/buildbot/#/builders/168/builds/799
Commit: 8ac6b415e4e5e631410d9cf6a10f15668f663441
https://github.com/llvm/llvm-project/commit/8ac6b415e4e5e631410d9cf6a10f15668f663441
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/pr97968.ll
Log Message:
-----------
[X86] Ensure VPERMV3 -> VPERMV fold comes from a double width vector
#96414 + #97206 didn't ensure that we were extracting subvectors from a vector double the width of the destination.
We can relax this in a future patch, but fix the #97968 crash first.
Fixes #97968
Commit: 92083e855b4d4ce7e3f7633cd35a4fcb90e2c24f
https://github.com/llvm/llvm-project/commit/92083e855b4d4ce7e3f7633cd35a4fcb90e2c24f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/pr97968.ll
Log Message:
-----------
[X86] Allow VPERMV3 -> VPERMV folds to handle extraction from a wider source vector (e.g. v16i32 -> v4i32)
We don't need to restrict this to double width vectors, as long as we correctly bitcast the types
Improves the fix for #97968
Commit: 27ccc8835e5163484234549fa6128eeb00d7432d
https://github.com/llvm/llvm-project/commit/27ccc8835e5163484234549fa6128eeb00d7432d
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
A llvm/test/Transforms/LoopVectorize/X86/ephemeral-recipes.ll
Log Message:
-----------
[LV] Add tests with ephemeral values that are widened.
Add tests with loops with ephemeral values that are widened.
After 29b8b72117, @ephemeral_load_and_compare_another_load_used_outside
is vectorized even though the only vector values that are generated are
ephemeral.
Commit: b9254ade77d41c7582a98e6754058c39fd456c2a
https://github.com/llvm/llvm-project/commit/b9254ade77d41c7582a98e6754058c39fd456c2a
Author: Tomas Matheson <Tomas.Matheson at arm.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M clang/test/Driver/aarch64-v81a.c
M clang/test/Driver/aarch64-v82a.c
M clang/test/Driver/aarch64-v83a.c
M clang/test/Driver/aarch64-v84a.c
M clang/test/Driver/aarch64-v85a.c
M clang/test/Driver/aarch64-v86a.c
M clang/test/Driver/aarch64-v87a.c
M clang/test/Driver/aarch64-v88a.c
M clang/test/Driver/aarch64-v89a.c
M clang/test/Driver/aarch64-v8a.c
M clang/test/Driver/aarch64-v91a.c
M clang/test/Driver/aarch64-v92a.c
M clang/test/Driver/aarch64-v93a.c
M clang/test/Driver/aarch64-v94a.c
M clang/test/Driver/aarch64-v95a.c
M clang/test/Driver/aarch64-v9a.c
A clang/test/Driver/print-enabled-extensions/aarch64-a64fx.c
A clang/test/Driver/print-enabled-extensions/aarch64-ampere1.c
A clang/test/Driver/print-enabled-extensions/aarch64-ampere1a.c
A clang/test/Driver/print-enabled-extensions/aarch64-ampere1b.c
A clang/test/Driver/print-enabled-extensions/aarch64-apple-a10.c
A clang/test/Driver/print-enabled-extensions/aarch64-apple-a11.c
A clang/test/Driver/print-enabled-extensions/aarch64-apple-a12.c
A clang/test/Driver/print-enabled-extensions/aarch64-apple-a13.c
A clang/test/Driver/print-enabled-extensions/aarch64-apple-a14.c
A clang/test/Driver/print-enabled-extensions/aarch64-apple-a15.c
A clang/test/Driver/print-enabled-extensions/aarch64-apple-a16.c
A clang/test/Driver/print-enabled-extensions/aarch64-apple-a17.c
A clang/test/Driver/print-enabled-extensions/aarch64-apple-a7.c
A clang/test/Driver/print-enabled-extensions/aarch64-apple-m4.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv8-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv8-r.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv8.1-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv8.2-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv8.3-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv8.4-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv8.5-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv8.6-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv8.7-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv8.8-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv8.9-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv9-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv9.1-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv9.2-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv9.3-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv9.4-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv9.5-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-carmel.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a34.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a35.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a510.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a520ae.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a53.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a55.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a57.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a65.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a65ae.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a710.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a715.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a72.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a720.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a720ae.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a725.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a73.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a75.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a76.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a76ae.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a77.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a78.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a78ae.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a78c.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-r82.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-r82ae.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-x1.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-x1c.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-x2.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-x3.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-x4.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-x925.c
A clang/test/Driver/print-enabled-extensions/aarch64-exynos-m3.c
A clang/test/Driver/print-enabled-extensions/aarch64-exynos-m4.c
A clang/test/Driver/print-enabled-extensions/aarch64-exynos-m5.c
A clang/test/Driver/print-enabled-extensions/aarch64-falkor.c
A clang/test/Driver/print-enabled-extensions/aarch64-generic.c
A clang/test/Driver/print-enabled-extensions/aarch64-kryo.c
A clang/test/Driver/print-enabled-extensions/aarch64-neoverse-512tvb.c
A clang/test/Driver/print-enabled-extensions/aarch64-neoverse-e1.c
A clang/test/Driver/print-enabled-extensions/aarch64-neoverse-n1.c
A clang/test/Driver/print-enabled-extensions/aarch64-neoverse-n2.c
A clang/test/Driver/print-enabled-extensions/aarch64-neoverse-n3.c
A clang/test/Driver/print-enabled-extensions/aarch64-neoverse-v1.c
A clang/test/Driver/print-enabled-extensions/aarch64-neoverse-v2.c
A clang/test/Driver/print-enabled-extensions/aarch64-neoverse-v3.c
A clang/test/Driver/print-enabled-extensions/aarch64-neoverse-v3ae.c
A clang/test/Driver/print-enabled-extensions/aarch64-oryon-1.c
A clang/test/Driver/print-enabled-extensions/aarch64-saphira.c
A clang/test/Driver/print-enabled-extensions/aarch64-thunderx.c
A clang/test/Driver/print-enabled-extensions/aarch64-thunderx2t99.c
A clang/test/Driver/print-enabled-extensions/aarch64-thunderx3t110.c
A clang/test/Driver/print-enabled-extensions/aarch64-thunderxt81.c
A clang/test/Driver/print-enabled-extensions/aarch64-thunderxt83.c
A clang/test/Driver/print-enabled-extensions/aarch64-thunderxt88.c
A clang/test/Driver/print-enabled-extensions/aarch64-tsv110.c
A clang/test/Driver/print-supported-extensions-aarch64.c
A clang/test/Driver/print-supported-extensions-arm.c
A clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/print-supported-extensions.c
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AArch64][RISCV] Improve the tests for --print-enabled-extensions and --print-supported-extensions (#97829)
For AArch64, we have existing tests for `--print-enabled-extensions` for
each architecture. However:
- These are added to the end of the existing tests which check for
`"-target-feature"`, which complicates them slightly.
- They do not test the descriptions printed next to each feature.
- Part of the output was tested separately in `TargetParserTest`.
- We did not have _any_ tests of this output for CPUs (only for
architectures).
Similarly, the tests for `--print-supported-extensions` do not give
complete coverage of either the full list of features or the
descriptions.
In my opinion we should be testing the full output, as this is what the
user sees. Descriptions and formatting can contain errors and be
accidentally broken.
Commit: 1e6dfc624867fbfc6cd6e5dd534bd11f0616e7fc
https://github.com/llvm/llvm-project/commit/1e6dfc624867fbfc6cd6e5dd534bd11f0616e7fc
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/LibCxxMap.cpp
Log Message:
-----------
[lldb][DataFormatter] Remove support for old std::map layout (#97549)
We currently supported the layout from pre-2016 (before the layout
change in
[14caaddd3f08e798dcd9ac0ddfc](https://github.com/llvm/llvm-project/commit/14caaddd3f08e798dcd9ac0ddfc)).
We have another upcoming layout change in `__tree` and `map` (as part of
https://github.com/llvm/llvm-project/issues/93069) which will likely
require rewriting parts of this formatter. Removing the support for the
pre-2016 layout will make those changes more straightforward to
review/maintain.
Being backward compatible would be great but we have no tests that
actually verify that the old layout still works (and our oldest matrix
bot tests clang-15). If anyone feels strongly about keeping this layout,
we could possibly factor out that logic and keep it around.
Commit: cb72aecea6e7da49c7a7fbeb1bde4e401324b9ba
https://github.com/llvm/llvm-project/commit/cb72aecea6e7da49c7a7fbeb1bde4e401324b9ba
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.h
M lldb/source/Plugins/Language/CPlusPlus/LibCxxUnorderedMap.cpp
Log Message:
-----------
[lldb][DataFormatter] Move std::unordered_map::iterator formatter into LibCxxUnorderedMap.cpp (#97752)
Similar to how we moved the `std::map::iterator` formatter in
https://github.com/llvm/llvm-project/pull/97687, do the same for
`std::unordered_map::iterator`.
Again the `unordered_map` and `unordered_map::iterator` formatters try
to do very similar things: retrieve data out of the map. The iterator
formatter does this in a fragile way (similar to how `std::map` does it,
see https://github.com/llvm/llvm-project/pull/97579). Thus we will be
refactoring the `std::unordered_map::iterator` in upcoming patches.
Having it in `LibCxxUnorderedMap` will allow us to re-use some of the
logic (and we won't have to repeat some of the clarification comments).
Commit: 69192e0193e60c169c7776f444362dffba31eb7d
https://github.com/llvm/llvm-project/commit/69192e0193e60c169c7776f444362dffba31eb7d
Author: Manish Kausik H <46352931+Nirhar at users.noreply.github.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
A llvm/test/CodeGen/AArch64/ctlz_zero_undef.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-bitcounts.mir
M llvm/test/CodeGen/Hexagon/bitmanip.ll
M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rvv/ctlz-vp.ll
M llvm/test/CodeGen/SystemZ/scalar-ctlz-01.ll
M llvm/test/CodeGen/VE/Scalar/ctlz.ll
M llvm/test/CodeGen/X86/ctlo.ll
M llvm/test/CodeGen/X86/ctlz.ll
M llvm/test/CodeGen/X86/lzcnt.ll
M llvm/test/CodeGen/X86/pr38539.ll
M llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
Log Message:
-----------
[LegalizeDAG] Optimize CodeGen for `ISD::CTLZ_ZERO_UNDEF` (#83039)
Previously we had the same instructions being generated for `ISD::CTLZ` and `ISD::CTLZ_ZERO_UNDEF` which did not take advantage of the fact that zero is an invalid input for `ISD::CTLZ_ZERO_UNDEF`. This commit separates codegen for the two cases to allow for the optimization for the latter case.
The details of the optimization are outlined in #82075
Fixes #82075
Co-authored-by: Manish Kausik H <hmamishkausik at gmail.com>
Commit: 2f2b931e1296aebe6c03fd969363683b637973e5
https://github.com/llvm/llvm-project/commit/2f2b931e1296aebe6c03fd969363683b637973e5
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M clang/lib/Headers/float.h
M clang/test/Headers/float.c
Log Message:
-----------
[C23] Correct the type for INFINITY and NAN in freestanding
This amends bcb7c38af7de59f3b2201734ee11987839cd7bbe to correct the
type use for the two macros to be float rather than double. Also adds
additional test coverage.
https://github.com/llvm/llvm-project/issues/98018 was filed to track
the duplicate diagnostic issue that was discovered.
Commit: 854bbc50fc99ddf71c4c65193e06eb79ce1ef69f
https://github.com/llvm/llvm-project/commit/854bbc50fc99ddf71c4c65193e06eb79ce1ef69f
Author: Mahesh-Attarde <145317060+mahesh-attarde at users.noreply.github.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/lib/Target/X86/X86.h
M llvm/lib/Target/X86/X86TargetMachine.cpp
A llvm/lib/Target/X86/X86WinFixupBufferSecurityCheck.cpp
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/test/CodeGen/X86/stack-protector-msvc.ll
M llvm/test/CodeGen/X86/tailcc-ssp.ll
Log Message:
-----------
[X86][CodeGen] security check cookie execute only when needed (#95904)
For windows __security_check_cookie call gets call everytime function is return without fixup. Since this function is defined in runtime library, it incures cost of call in dll which simply does comparison and returns most time. With Fixup, We selective move to call in DLL only if comparison fails.
Commit: ba1d21c7d8613c90e424fa3e77d52184d531c302
https://github.com/llvm/llvm-project/commit/ba1d21c7d8613c90e424fa3e77d52184d531c302
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
A clang/test/C/C2y/n3254.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Claim conformance to WG14 N3254 (#97581)
The test coverage for this has to lean on LLVM's test coverage for the
actual TBAA behavior, but this demonstrates that Clang emits reasonable
LLVM IR to support this construct. It would be surprising should LLVM
break this pattern given how ubiquitous the pattern is in the wild.
The paper can be found at:
https://www.open-std.org/jtc1/sc22/wg14/www/docs/n3254.pdf
Commit: f06cb3fbd6b6a03a3300fca5912a1176a4a2bf0b
https://github.com/llvm/llvm-project/commit/f06cb3fbd6b6a03a3300fca5912a1176a4a2bf0b
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
Log Message:
-----------
[gn build] Port 854bbc50fc99
Commit: 7e01e64714eceedaf88c20f67d431a295950eed0
https://github.com/llvm/llvm-project/commit/7e01e64714eceedaf88c20f67d431a295950eed0
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M clang/lib/CodeGen/Targets/X86.cpp
M clang/test/CodeGen/stdcall-fastcall.c
M clang/test/CodeGen/vectorcall.c
Log Message:
-----------
[X86][vectorcall] Do not consume register for indirect return value (#97939)
This is how MSVC handles it. https://godbolt.org/z/Eav3vx7cd
Commit: 5a5cd3f0bcdf37a32eadd85d6e57c642cb829402
https://github.com/llvm/llvm-project/commit/5a5cd3f0bcdf37a32eadd85d6e57c642cb829402
Author: chuongg3 <chuong.goh at arm.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-udiv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-dup.mir
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/neon-mov.ll
Log Message:
-----------
[AArch64][GlobalISel] Make G_DUP immediate 32-bits or larger (#96780)
G_DUP's immediate operand gets extended in RegBankSelect to allow for
better pattern matching in TableGen for #96782
Commit: 4c47b41771799cd630ee3e6b42593ac59d7593eb
https://github.com/llvm/llvm-project/commit/4c47b41771799cd630ee3e6b42593ac59d7593eb
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/extractelement-single-use-many-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractlements-gathered-first-node.ll
Log Message:
-----------
[SLP]Allow matching and shuffling of extractelement vector operands with different VF.
Allows better codegen with the free resizing of small VF vector operands
and then regular shuffling of the operands of the same size and
simplifies the code.
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/97414
Commit: 83b01aaf51072a07261ee2e5fc14102f71273bc0
https://github.com/llvm/llvm-project/commit/83b01aaf51072a07261ee2e5fc14102f71273bc0
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
A llvm/test/Transforms/LoopIdiom/AArch64/ctlz.ll
Log Message:
-----------
[LoopIdiom] Support 'shift until less-than' idiom (#95002)
The current loop idiom code for recognising and inserting a CTLZ
intrinsic does not support loops where the loopback control is based on
an unsigned less-than condition. This patch adds support for recognising
these loops and inserting a CTLZ intrinsic.
Fixes the missed optimization cases in #51064
---------
Co-authored-by: David Sherwood <david.sherwood at arm.com>
Commit: da827d0896e5e66fe9130f8f4479537d3bbee1da
https://github.com/llvm/llvm-project/commit/da827d0896e5e66fe9130f8f4479537d3bbee1da
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/LibCxxUnorderedMap.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/iterator/TestDataFormatterLibccIterator.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/iterator/main.cpp
Log Message:
-----------
[lldb][DataFormatter] Simplify std::unordered_map::iterator formatter (#97754)
Depends on https://github.com/llvm/llvm-project/pull/97752
This patch changes the way we retrieve the key/value pair in the
`std::unordered_map::iterator` formatter (similar to how we are changing
it for `std::map::iterator` in
https://github.com/llvm/llvm-project/pull/97713, the motivations being
the same).
The old logic was not very easy to follow, and encoded the libc++ layout
in non-obvious ways. But mainly it was also fragile to alignment
miscalculations (https://github.com/llvm/llvm-project/pull/97443); this
would break once the new layout of `std::unordered_map` landed as part
of https://github.com/llvm/llvm-project/issues/93069.
Instead, this patch simply casts the `__hash_iterator` to a
`__node_pointer` (which is what libc++ does too) and uses a
straightforward `GetChildMemberWithName("__value_")` to get to the
key/value we care about.
The `std::unordered_map` already does it this way, so we align the
iterator counterpart to do the same. We can eventually re-use the
core-part of the `std::unordered_map` and `std::unordered_map::iterator`
formatters. But it will be an easier to change to review once both
simplifications landed.
Commit: f4f5e25467263adf60289ed0725d696368230b71
https://github.com/llvm/llvm-project/commit/f4f5e25467263adf60289ed0725d696368230b71
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/include/llvm/Analysis/ValueLattice.h
Log Message:
-----------
[ValueLattice] Add missing const qualifier (NFC)
Commit: 5c40e561bbc102f47553732fcebc0876b45d68b2
https://github.com/llvm/llvm-project/commit/5c40e561bbc102f47553732fcebc0876b45d68b2
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libc/include/llvm-libc-macros/math-macros.h
M libc/src/math/amdgpu/CMakeLists.txt
M libc/src/math/nvptx/CMakeLists.txt
M libc/src/math/nvptx/llrint.cpp
M libc/src/math/nvptx/llrintf.cpp
M libc/src/math/nvptx/lrint.cpp
Log Message:
-----------
[libc] Make GPU `libm` use generic implementations (#98014)
Summary:
This patch moves a lot of the old vendor implementations to the new
generic math functions. Previously a lot of these were done through the
vendor functions, but the long term goal is to completely phase these
out. In order to make the tests pass I had to disable exceptions so they
only perform functional tests.
Commit: 7e054c33d42b0a6bc8f6b168dab688f8e7762ef0
https://github.com/llvm/llvm-project/commit/7e054c33d42b0a6bc8f6b168dab688f8e7762ef0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-casts.ll
Log Message:
-----------
[VectorCombine] foldShuffleOfCastops - don't restrict to oneuse but compare total costs instead
Some casts (especially bitcasts but others as well) are incredibly cheap (or free), so don't limit the shuffle(cast(x),cast(y)) -> cast(shuffle(x,y)) to oneuse cases, but instead compare the total before/after costs of possibly repeating some casts.
Commit: c9ee6b1977e7dc88e3bd89b5e361c703721711fd
https://github.com/llvm/llvm-project/commit/c9ee6b1977e7dc88e3bd89b5e361c703721711fd
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libc/config/darwin/arm/entrypoints.txt
M libc/config/gpu/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/docs/math/index.rst
M libc/spec/stdc.td
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/FEnvImpl.h
M libc/src/math/CMakeLists.txt
A libc/src/math/cbrtf.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/cbrtf.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/cbrtf_test.cpp
M libc/test/src/math/exhaustive/CMakeLists.txt
A libc/test/src/math/exhaustive/cbrtf_test.cpp
M libc/test/src/math/exhaustive/exhaustive_test.h
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/cbrtf_test.cpp
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/MPFRWrapper/MPFRUtils.h
Log Message:
-----------
[libc][math] Implement cbrtf function correctly rounded to all rounding modes. (#97936)
Fixes https://github.com/llvm/llvm-project/issues/92874
Algorithm: Let `x = (-1)^s * 2^e * (1 + m)`.
- Step 1: Range reduction: reduce the exponent with:
```
y = cbrt(x) = (-1)^s * 2^(floor(e/3)) * 2^((e % 3)/3) * (1 + m)^(1/3)
```
- Step 2: Use the first 4 bit fractional bits of `m` to look up for a
degree-7 polynomial approximation to:
```
(1 + m)^(1/3) ~ 1 + m * P(m).
```
- Step 3: Perform the multiplication:
```
2^((e % 3)/3) * (1 + m)^(1/3).
```
- Step 4: Check for exact cases to prevent rounding and clear
`FE_INEXACT` floating point exception.
- Step 5: Combine with the exponent and sign before converting down to
`float` and return.
Commit: d3a5589684baed14e82e57ca31fd4e988cb1436d
https://github.com/llvm/llvm-project/commit/d3a5589684baed14e82e57ca31fd4e988cb1436d
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libc/src/math/generic/tan.cpp
Log Message:
-----------
[libc] Add maybe_unused for functions only used on slow path (#98024)
Summary:
When the fast math options are enabled these functions are uncalled,
which makes it error.
Commit: 12d6832d86156904aecc10e8612bd77b66aeef51
https://github.com/llvm/llvm-project/commit/12d6832d86156904aecc10e8612bd77b66aeef51
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
Log Message:
-----------
[SCCP] Skip bitcasts entirely
The only bitcasts the existing code might be able to handle are
bitcasts between iN and <1 x iN>. Don't bother.
Commit: 727ecaf7d16d44ecf434284c60ad65b22d814092
https://github.com/llvm/llvm-project/commit/727ecaf7d16d44ecf434284c60ad65b22d814092
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
Log Message:
-----------
[flang] allow intrinsic module procedures to be implemented in Fortran (#97743)
Currently, all procedures from intrinsic modules that are not BIND(C)
are expected to be intercepted by the compiler in lowering and to have a
handler in IntrinsicCall.cpp.
As more "intrinsic" modules are being added (OpenMP, OpenACC, CUF, ...),
this requirement is preventing seamless implementation of intrinsic
modules in Fortran. Procedures from intrinsic modules are different from
generic intrinsics defined in section 16 of the standard. They are
declared in Fortran file seating in the intrinsic module directory and
inside the compiler they look like regular user call except for the
INTRINSIC attribute set on their module. So an easy implementation is
just to have the implementation done in Fortran and linked to the
runtime without any need for the compiler to necessarily understand and
handle these calls in special ways.
This patch splits the lookup and generation part of IntrinsicCall.cpp so
that it can be allowed to only intercept calls to procedure from
intrinsic module if they have a handler. Otherwise, the assumption is
that they should be implemented in Fortran.
Add explicit TODOs handler for the IEEE procedure that are known to not
yet been implemented and won't be implemented via Fortran code so that
this patch is an NFC for what is currently supported.
This patch also prevents doing two lookups in the intrinsic table (There
was one to get argument lowering rules, and another one to generate the
code).
Commit: a5bfe20f6fd8957f870f8ffcf836d7737864e063
https://github.com/llvm/llvm-project/commit/a5bfe20f6fd8957f870f8ffcf836d7737864e063
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
Log Message:
-----------
[AMDGPU] Comment MIMGEncGfx12
Commit: 9dca3ac2efb180398ef8e84bfa9f0ef283d0e6fd
https://github.com/llvm/llvm-project/commit/9dca3ac2efb180398ef8e84bfa9f0ef283d0e6fd
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/LibCxxMap.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/iterator/TestDataFormatterLibccIterator.py
Log Message:
-----------
[lldb][DataFormatter] Simplify libc++ std::map::iterator formatter (#97713)
Depends on https://github.com/llvm/llvm-project/pull/97687
Similar to https://github.com/llvm/llvm-project/pull/97579, this patch
simplifies the way in which we retrieve the key/value pair of a
`std::map` (in this case of the `std::map::iterator`).
We do this for the same reason: not only was the old logic hard to
follow, and encoded the libc++ layout in non-obvious ways, it was also
fragile to alignment miscalculations
(https://github.com/llvm/llvm-project/pull/97443); this would break once
the new layout of std::map landed as part of
https://github.com/llvm/llvm-project/issues/93069.
Instead, this patch simply casts the `__iter_pointer` to the
`__node_pointer` and uses a straightforward
`GetChildMemberWithName("__value_")` to get to the key/value we care
about.
We can eventually re-use the core-part of the `std::map` and
`std::map::iterator` formatters. But it will be an easier to change to
review once both simplifications landed.
Commit: 385118644ccabe27a634804c7db60734746c170f
https://github.com/llvm/llvm-project/commit/385118644ccabe27a634804c7db60734746c170f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/DebugInfo/Generic/assignment-tracking/slp-vectorizer/merge-scalars.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-di.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-add-ssat.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-add-usat.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-add.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fix.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-mul.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-smax.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-smin.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-sub-ssat.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-sub-usat.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-sub.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-umax.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-umin.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/shift-ashr.ll
M llvm/test/Transforms/SLPVectorizer/X86/shift-lshr.ll
M llvm/test/Transforms/SLPVectorizer/X86/shift-shl.ll
Log Message:
-----------
[SLP]Remove operands upon marking instruction for deletion.
If the instruction is marked for deletion, better to drop all its
operands and mark them for deletion too (if allowed). It allows to have
more vectorizable patterns and generate less useless extractelement
instructions.
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/97409
Commit: f5b9e11eb8ada0e7cc292f9ecd29a220d1265084
https://github.com/llvm/llvm-project/commit/f5b9e11eb8ada0e7cc292f9ecd29a220d1265084
Author: Marco Elver <elver at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M clang/test/CodeGen/sanitize-metadata-ignorelist.c
M clang/test/CodeGen/sanitize-metadata-nosanitize.c
M clang/test/CodeGen/sanitize-metadata.c
M llvm/lib/Transforms/Instrumentation/SanitizerBinaryMetadata.cpp
M llvm/test/Instrumentation/SanitizerBinaryMetadata/atomics.ll
M llvm/test/Instrumentation/SanitizerBinaryMetadata/ctor.ll
Log Message:
-----------
[SanitizerBinaryMetadata] Fix multi-version sanitizer metadata (#97848)
It should be valid to combine TUs that have different versions of
sanitizer metadata. However, this had not been possible due to giving
sanitizer metadata sections, constructors, and destructors (that call
callbacks) the same name for different versions.
This would then result in the linker attempting to merge sections that
contain metadata of different versions, as well as picking any one of
the constructors or destructors due to having the same COMDAT key. The
end result is that consumers of this data would end up interpreting the
metadata incorrectly.
Although combining old and new versions is not recommended, more
realistic is combining TUs that have been compiled with different target
code models (which are also encoded in the sanitizer metadata version).
To fix, and properly support multi-version sanitizer metadata, attach
the version to section names and internal constructor and destructor
names. The ABI remains unchanged.
Commit: 0577cdaa32b26c02e16822343e7039b999f43d58
https://github.com/llvm/llvm-project/commit/0577cdaa32b26c02e16822343e7039b999f43d58
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
Log Message:
-----------
[LV] Split checking if tail-folding is possible, collecting masked ops. (#77612)
Introduce new canFoldTail helper which only checks if tail-folding is
possible, but without modifying MaskedOps.
Just because tail-folding is possible doesn't mean the tail will be
folded; that's up to the cost-model to decide. Separating the check if
tail-folding is possible and preparing for tail-folding makes sure that
MaskedOps is only populated when tail-folding is actually selected.
PR: https://github.com/llvm/llvm-project/pull/77612
Commit: 12e47aabd4e4c6cec15092183b91ec279a0a7ab4
https://github.com/llvm/llvm-project/commit/12e47aabd4e4c6cec15092183b91ec279a0a7ab4
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/config/config.json
M libc/config/gpu/config.json
M libc/docs/configure.rst
M libc/src/math/generic/tan.cpp
Log Message:
-----------
[libc] Add config option for fast math optimizations (#98029)
Summary:
This patch adds `LIBC_COPT_MATH_OPTIMIZATIONS` that allows users to
configure the
different math optimizations.
Commit: 2f37a22f10a1128c695bc469871a9101edce853e
https://github.com/llvm/llvm-project/commit/2f37a22f10a1128c695bc469871a9101edce853e
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/include/llvm/Object/ELF.h
M llvm/include/llvm/Object/ELFObjectFile.h
M llvm/lib/Object/ELF.cpp
M llvm/lib/Object/ELFObjectFile.cpp
A llvm/test/tools/llvm-objdump/ELF/crel.test
M llvm/test/tools/llvm-objdump/X86/elf-disassemble-relocs.test
M llvm/tools/llvm-objdump/ELFDump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
[llvm-objdump] -r: support CREL
Extract the llvm-readelf decoder to `decodeCrel` (#91280) and reuse it
for llvm-objdump.
Because the section representation of LLVMObject (`SectionRef`) is
64-bit, insufficient to hold all decoder states, `section_rel_begin` is
modified to decode CREL eagerly and hold the decoded relocations inside
ELFObjectFile<ELFT>.
The test is adapted from llvm/test/tools/llvm-readobj/ELF/crel.test.
Pull Request: https://github.com/llvm/llvm-project/pull/97382
Commit: 3320036370ba3719471ab243f253237e88996495
https://github.com/llvm/llvm-project/commit/3320036370ba3719471ab243f253237e88996495
Author: Eleanor Bonnici <eleanor.bonnici at arm.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/include/llvm/ObjCopy/CommonConfig.h
M llvm/lib/ObjCopy/ConfigManager.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
A llvm/test/tools/llvm-objcopy/ELF/change-section-lma.test
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
M llvm/tools/llvm-objcopy/ObjcopyOpts.td
Log Message:
-----------
[llvm-objcopy] Add change-section-lma *+/-offset (#95431)
llvm-objcopy did not support change-section-lma argument.
This patch adds support for a use case of change-section-lma, that is
shifting load address of all sections by the same offset. This seems to
be the only practical use case of change-section-lma, found in other
software such as Zephyr RTOS's build system.
This is an option that could possibly be supported in some other than
ELF formats, however this change only implements it for ELF. When used
with other formats an error message is raised.
In comparison, the behavior of GNU objcopy is inconsistent. For some ELF
files it behaves the same as described above. For others, it copies the
file without modifying the p_paddr fields when it would be expected. In
some experiments it modifies arbitrary fields in section or program
headers. It is unclear what exactly determines this.
The executable file generated by yaml2obj in this test is not parsable
by GNU objcopy. With Machine set to EM_AARCH64, the file can be parsed
and the first test in the test file completes with 0 exit code. However,
the result is rather arbitrary. AArch64 GNU objcopy subtracts 0x1000
from p_filesz and p_memsz of the first LOAD section and 0x1000 from
p_offset of the second LOAD section. It does not look meaningful.
Commit: 7776fba473a216b2d1a765491bdc5db710cdff8f
https://github.com/llvm/llvm-project/commit/7776fba473a216b2d1a765491bdc5db710cdff8f
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libc/src/__support/File/file.cpp
M libc/src/__support/File/file.h
M libc/src/__support/File/linux/file.cpp
M libc/src/__support/File/linux/file.h
M libc/src/stdio/fopencookie.cpp
M libc/src/stdio/generic/ftell.cpp
M libc/src/sys/mman/linux/mmap.cpp
M libc/src/unistd/linux/pread.cpp
M libc/src/unistd/linux/pwrite.cpp
M libc/test/src/__support/File/file_test.cpp
Log Message:
-----------
[libc][NFC] Adjust use of off_t internally (#68269)
This patch includes changes related to the use of off_t in libc,
targeted at 32-bit systems: in several places, the offset is used either
as a long or an off_t (64-bit signed int), but in 32-bit systems a long
type is only 32 bits long.
Fix a warning in mmap where a long offset is expected, but we were
passing an off_t. A static_cast and a comment were added to explain
that we know we are ignoring the upper 32-bit of the off_t in 32-bit
systems.
The code in pread and pwrite was slightly improved to remove a
#ifdef LIBC_TARGET_ARCH_IS_RISCV32; we are using an if constexpr now.
The Linux file operations were changed to use off_t instead of a long
where applicable. No changes were made to the standard API, e.g.,
ftell returns the offset as an int so we added a static_cast and a
comment explaining that this will cause a loss of integer precision
in 32-bit systems.
Commit: fe8933ba211da094dc866b2bde64928c8121131b
https://github.com/llvm/llvm-project/commit/fe8933ba211da094dc866b2bde64928c8121131b
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/LibCxxMap.cpp
Log Message:
-----------
[lldb][DataFormatter] Simplify std::map formatter (#97579)
Depends on:
* https://github.com/llvm/llvm-project/pull/97544
* https://github.com/llvm/llvm-project/pull/97549
* https://github.com/llvm/llvm-project/pull/97551
This patch tries to simplify the way in which the `std::map` formatter
goes from the root `__tree` pointer to a specific key/value pair.
Previously we would:
1. synthesize a structure that mimicked what `__iter_pointer` looked
like in memory
2. call `GetChildCompilerTypeAtIndex` on it to find the byte offset at
which the pair was located in the synthesized structure
3. finally, use that offset through a call to
`GetSyntheticChildAtOffset` to retrieve the key/value pair
Not only was this logic hard to follow, and encoded the libc++ layout in
non-obvious ways, it was also fragile to alignment miscalculations
(https://github.com/llvm/llvm-project/pull/97443); this would break once
the new layout of std::map landed as part of
https://github.com/https://github.com/llvm/llvm-project/issues/93069.
Instead, this patch simply casts the `__iter_pointer` to the
`__node_pointer` and uses a straightforward
`GetChildMemberWithName("__value_")` to get to the key/value we care
about. This allows us to get rid of some support infrastructure/class
state.
Ideally we would fix the underlying alignment issue, but this unblocks
the libc++ refactor in the interim, while also benefitting the formatter
in terms of readability (in my opinion).
Commit: 840e5075447fd2e7ae1f23c112e959b504d8ff42
https://github.com/llvm/llvm-project/commit/840e5075447fd2e7ae1f23c112e959b504d8ff42
Author: Daniel Rodríguez Troitiño <drodriguez at users.noreply.github.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M lld/MachO/InputFiles.cpp
A lld/test/MachO/implicit-and-allowable-clients.test
Log Message:
-----------
[lld] Do not implicitly link non "public" libraries (#97639)
The LC_SUB_CLIENT Mach-O command and the `allowable-clients` TBD entry
specify that the given framework (or library?) can only be linked
directly from the specified names, even if it is sitting in `/usr/lib`
or `/System/Library/Frameworks`.
Add a check for those conditions before checking if a library should be
implicitly linked, and link against their umbrella if they have
allowable clients. The code needs to be in both the binary libraries and
the interface libraries.
Add a test that reproduces the scenario in which a framework reexports a
private framework that sits in `/System/Library/Frameworks`, and check
for the symbols of the reexported framework to be associated with the
public framework, and not the private one.
Commit: 0387a86f9a6d5bb0f178804784296e37fb34ca03
https://github.com/llvm/llvm-project/commit/0387a86f9a6d5bb0f178804784296e37fb34ca03
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/Modules/use-after-free-2.c
Log Message:
-----------
[clang][modules] Fix use-after-free in header serialization (#96356)
With the pruning of unused module map files disabled
(`-fno-modules-prune-non-affecting-module-map-files`), `HeaderFileInfo`
no longer gets deserialized before `ASTWriter::WriteHeaderSearch()`.
This function then interleaves the stores of references to `KnownHeader`
with their lazy deserialization. Lazy deserialization may cause
reallocation of `ModuleMap::Headers` entries (including its
`SmallVector<KnownHeader, 1>` values) thus making previously-stored
`ArrayRef<KnownHeader>` dangling. This patch fixes that situation by
storing a copy instead.
Commit: 1952dba49abdda848512d11fc68c031a0a21ec50
https://github.com/llvm/llvm-project/commit/1952dba49abdda848512d11fc68c031a0a21ec50
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
A llvm/include/llvm/MC/MCELFExtras.h
M llvm/lib/MC/ELFObjectWriter.cpp
Log Message:
-----------
[MC,ELF] Extract CREL encoder code
The extracted ELFObjectWriter.cpp code will be reused by llvm-objcopy
support (#97521).
Commit: ed7e46877dc7f09b5d194f87c87bfc2bebfcf27a
https://github.com/llvm/llvm-project/commit/ed7e46877dc7f09b5d194f87c87bfc2bebfcf27a
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M lldb/include/lldb/Symbol/ObjectFile.h
M lldb/source/Symbol/ObjectFile.cpp
M lldb/source/Target/Platform.cpp
M lldb/test/Shell/ObjectFile/PECOFF/invalid-export-table.yaml
Log Message:
-----------
[lldb] Improve error message for unrecognized executables (#97490)
Currently, LLDB prints out a rather unhelpful error message when passed
a file that it doesn't recognize as an executable.
> error: '/path/to/file' doesn't contain any 'host' platform
> architectures: arm64, armv7, armv7f, armv7k, armv7s, armv7m, armv7em,
> armv6m, armv6, armv5, armv4, arm, thumbv7, thumbv7k, thumbv7s,
> thumbv7f, thumbv7m, thumbv7em, thumbv6m, thumbv6, thumbv5, thumbv4t,
> thumb, x86_64, x86_64, arm64, arm64e
I did a quick search internally and found at least 24 instances of users
being confused by this. This patch improves the error message when it
doesn't recognize the file as an executable, but keeps the existing
error message otherwise, i.e. when it's an object file we understand,
but the current platform doesn't support.
Commit: 68a8ae06962137b27afdaf2696074255f6180652
https://github.com/llvm/llvm-project/commit/68a8ae06962137b27afdaf2696074255f6180652
Author: Wolfgang Pieb <55721109+wolfy1961 at users.noreply.github.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-variadics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
Log Message:
-----------
Make some tablegen tests more flexible. (#97651)
Some organizations have added operators downstream, and the 3 tests in
this PR tend to fail with off-by-n errors (with n being the number of
added operators) periodically.
To alleviate this. the proposed change is taking advantage of the fact
that the 2nd and 3rd element in a switch table represent the lower and
upper bounds of the operator id, and that the offset of the first byte
of the encoded operations is a function of these 2 bounds.
Additionally, we the default label offset is encoded in a FileCheck
variable.
Commit: 9bb4cd5977f8a0d6f1d6cc00cb707ed2db27f1c0
https://github.com/llvm/llvm-project/commit/9bb4cd5977f8a0d6f1d6cc00cb707ed2db27f1c0
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
A llvm/test/tools/llvm-objcopy/ELF/crel.test
M llvm/test/tools/llvm-objcopy/ELF/reloc-error-remove-symtab.test
M llvm/test/tools/llvm-objcopy/ELF/strip-reloc-symbol.test
Log Message:
-----------
[llvm-objcopy] Support CREL
llvm-objcopy may modify the symbol table and need to rewrite
relocations. For CREL, while we can reuse the decoder from #91280, we
need an encoder to support CREL.
Since MC/ELFObjectWriter.cpp has an existing encoder, and MC is at a
lower layer than Object, extract the encoder to a new header file
llvm/MC/MCELFExtras.h.
Link: https://discourse.llvm.org/t/rfc-crel-a-compact-relocation-format-for-elf/77600
Pull Request: https://github.com/llvm/llvm-project/pull/97521
Commit: 915372a8db7a8d7a1af19cc9ec6ccb5a0d592d1f
https://github.com/llvm/llvm-project/commit/915372a8db7a8d7a1af19cc9ec6ccb5a0d592d1f
Author: Kefu Chai <tchaikov at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
M clang-tools-extra/clang-tidy/utils/ExprSequence.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move.cpp
Log Message:
-----------
[clang-tidy] In C++17, callee is guaranteed to be sequenced before arguments. (#93623)
This eliminates false positives in bugprone-use-after-move where a
variable
is used in the callee and moved from in the arguments.
We introduce one special case: If the callee is a MemberExpr with a
DeclRefExpr as its base, we consider it to be sequenced after the
arguments. This is because the variable referenced in the base will only
actually be accessed when the call happens, i.e. once all of the
arguments have been evaluated. This has no basis in the C++ standard,
but it reflects actual behavior that is relevant to a use-after-move
scenario:
```c++
a.bar(consumeA(std::move(a));
```
In this example, we end up accessing a after it has been moved from,
even though nominally the callee a.bar is evaluated before the argument
consumeA(std::move(a)).
Treating this scenario correctly has required rewriting the logic in
bugprone-use-after-move that governs whether the use happens in a later
loop iteration than the move. This was previously based on an unsound
heuristic (does the use come lexically before the move?); we now use a
more rigourous criterion based on reachability in the CFG.
Fixes #57758
Fixes #59612
Co-authored-by: martinboehme <mboehme at google.com>
Commit: 04fc471f485a9beadd8ccc63f6af29765ec6f45b
https://github.com/llvm/llvm-project/commit/04fc471f485a9beadd8ccc63f6af29765ec6f45b
Author: Han-Chung Wang <hanhan0912 at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/Transforms/DataLayoutPropagation.cpp
M mlir/test/lib/Dialect/Linalg/TestDataLayoutPropagation.cpp
Log Message:
-----------
[mlir][linalg] Switch to use OpOperand* in ControlPropagationFn. (#96697)
It's not easy to determine whether we want to propagate pack/unpack ops
because we don't know the (producer, consumer) information. The
revisions switch it to `OpOperand*`, so the control function can capture
the (producer, consumer) pair. E.g.,
```
Operation *producer = opOperand->get().getDefiningOp();
Operation *consumer = opOperand->getOwner();
```
Commit: 402eca265f7162e26b8b74d18297fd76c9f100de
https://github.com/llvm/llvm-project/commit/402eca265f7162e26b8b74d18297fd76c9f100de
Author: yabinc <yabinc at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/frame-pointer.c
Log Message:
-----------
Enable frame pointer for non-leaf functions on Android (#97614)
On Android, we always want frame pointers to make debugging in the field
easier. Since frame pointers are already enabled for AArch64, ARM and
RISCV64, effectively this change further enables frame pointers for X86
and X86_64.
Commit: 09a275e8a4c2cea22bb67c7247fc892d5e73eb42
https://github.com/llvm/llvm-project/commit/09a275e8a4c2cea22bb67c7247fc892d5e73eb42
Author: Dmitriy Chestnykh <dm.chestnykh at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M clang/lib/AST/Decl.cpp
A clang/test/CodeGen/constexpr-c23-internal-linkage.c
Log Message:
-----------
[clang] Use internal linkage for c23 constexpr vars. (#97846)
See C23 std 6.2.2p3.
Fixes #97830
Commit: 2dadf8d7f57c0aa60cf7c67ec46c9930151447cc
https://github.com/llvm/llvm-project/commit/2dadf8d7f57c0aa60cf7c67ec46c9930151447cc
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/Status/Cxx2c.rst
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/version
M libcxx/modules/std.compat.cppm.in
M libcxx/modules/std.cppm.in
M libcxx/test/std/language.support/support.limits/support.limits.general/execution.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/new.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/optional.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/random.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/type_traits.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/header_information.py
Log Message:
-----------
[libc++] Update status after the St. Louis meeting. (#97951)
This updates:
- The status tables
- Feature test macros
- New headers for modules
Commit: 03d4332625d13014ac94dcd145f538fbfe4c4d0c
https://github.com/llvm/llvm-project/commit/03d4332625d13014ac94dcd145f538fbfe4c4d0c
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
Log Message:
-----------
[RISCV] Pack build_vectors into largest available element type (#97351)
Our worst case build_vector lowering is a serial chain of vslide1down.vx
operations which creates a serial dependency chain through a relatively
high latency operation. We can instead pack together elements into ELEN
sized chunks, and move them from integer to scalar in a single
operation.
This reduces the length of the serial chain on the vector side, and
costs at most three scalar instructions per element. This is a win for
all cores when the sum of the latencies of the scalar instructions is
less than the vslide1down.vx being replaced, and is particularly
profitable for out-of-order cores which can overlap the scalar
computation.
This patch is restricted to configurations with zba and zbb. Without
both, the zero extend might require two instructions which would bring
the total scalar instructions per element to 4. zba and zba are both
present in the rva22u64 baseline which is looking to be quite common for
hardware in practice; we could extend this to systems without bitmanip
with a bit of extra effort.
Commit: c22625cb3eaf052e2377881d64640196ff5da3d1
https://github.com/llvm/llvm-project/commit/c22625cb3eaf052e2377881d64640196ff5da3d1
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Sema/DeclSpec.h
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaType.cpp
A clang/test/C/C2y/n3274.c
M clang/www/c_status.html
Log Message:
-----------
[C2y] Remove support for _Imaginary (#97436)
WG14 N3274 removed _Imaginary from Annex G. Clang has never fully
supported Annex G or _Imaginary, so removal is pretty trivial for us.
Note, we are keeping _Imaginary as a keyword so that we get better
diagnostic behavior. This is still conforming because _I makes it a
reserved identifier, so it's not available for users to use as an
identifier anyway.
Commit: 5ef4e6db96b2a3eca4c84671ac964dc2134035b5
https://github.com/llvm/llvm-project/commit/5ef4e6db96b2a3eca4c84671ac964dc2134035b5
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M clang/lib/CodeGen/CGStmtOpenMP.cpp
A clang/test/OpenMP/requires_default_atomic_mem_order.cpp
Log Message:
-----------
[OpenMP] Correctly code-gen default atomic mem order (#97663)
Summary:
The parsing for this was implemented, but we never hooked up the default
value to the result of this clause. This patch adds the support by
making it default to the requires directive.
Commit: 19cf8deabe1124831164987f1b9bf2f806c0a875
https://github.com/llvm/llvm-project/commit/19cf8deabe1124831164987f1b9bf2f806c0a875
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
[compiler-rt][X86] Use functions in cpuid.h instead of inline assembly (#97877)
This patch makes the host/feature detection in compiler-rt and LLVM use
the functions provided in cpuid.h(__get_cpuid, __get_cpuid_count)
instead of inline assembly. This simplifies the implementation and moves
any inline assembly away to a more common place.
A while ago, some similar cleanup was attempted, but this ended up
resulting in some compilation errors due to toolchain minimum version
issues (https://bugs.llvm.org/show_bug.cgi?id=30384). After the
reversion landed, there have been no attempts since then to clean up the
code, even though the minimum supported compilers now support the
relevant functions (https://godbolt.org/z/o1Mjz8ndv).
Commit: 2039e130649d8469bc85fa31ba7422d1d3739f90
https://github.com/llvm/llvm-project/commit/2039e130649d8469bc85fa31ba7422d1d3739f90
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
Revert "[compiler-rt][X86] Use functions in cpuid.h instead of inline assembly (#97877)"
This reverts commit 19cf8deabe1124831164987f1b9bf2f806c0a875.
This was causing quite a few buildbot failures (see the PR description).
Reverting for now while I have time to sort it out. Seems like it should
just be conditional preprocessor macros for X86 however.
Commit: 87e914db85572c4d9fe924616141dcc9a5d66177
https://github.com/llvm/llvm-project/commit/87e914db85572c4d9fe924616141dcc9a5d66177
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
[compiler-rt][X86] Unify getAMDProcessorTypeAndSubType (#97863)
This patch unifies the implementation of getAMDProcessorTypeAndSubtype
between compiler-rt and LLVM.
This patch is intended to be a step towards pulling these functions out
into identical .inc files to better facilitate code sharing between LLVM
and compiler-rt.
Commit: e0012a0b3b0dbd501293bb13a6f1af1066e6f3f5
https://github.com/llvm/llvm-project/commit/e0012a0b3b0dbd501293bb13a6f1af1066e6f3f5
Author: David Green <david.green at arm.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/cmp-to-cmn.ll
Log Message:
-----------
[AArch64] Regenerate cmp-to-cmn.ll. NFC
Commit: ea3fd020f4879d5b4261eabd9a56c24f30bc47f9
https://github.com/llvm/llvm-project/commit/ea3fd020f4879d5b4261eabd9a56c24f30bc47f9
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libc/include/llvm-libc-macros/math-macros.h
M libc/src/math/amdgpu/CMakeLists.txt
M libc/src/math/nvptx/CMakeLists.txt
M libc/src/math/nvptx/llrint.cpp
M libc/src/math/nvptx/llrintf.cpp
M libc/src/math/nvptx/lrint.cpp
Log Message:
-----------
Revert "[libc] Make GPU `libm` use generic implementations" (#98061)
Reverts llvm/llvm-project#98014
buildbot is broken.
Commit: 0dde87c117afee535757d1591f6d952f4d24e915
https://github.com/llvm/llvm-project/commit/0dde87c117afee535757d1591f6d952f4d24e915
Author: Petr Hosek <phosek at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
Log Message:
-----------
[libc] Include cbrtf in the baremetal configuration (#98052)
This is available as of #97936.
Commit: 3f9bff3df2c7ddcf3e3f125d7641a73ce88e2380
https://github.com/llvm/llvm-project/commit/3f9bff3df2c7ddcf3e3f125d7641a73ce88e2380
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
Remove an extra tokens at end of #undef directive, NFC
Commit: 1038db6f02289e128c498769091718dd0e6e6fea
https://github.com/llvm/llvm-project/commit/1038db6f02289e128c498769091718dd0e6e6fea
Author: Nathan James <n.james93 at hotmail.co.uk>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M clang-tools-extra/clang-tidy/boost/BoostTidyModule.cpp
M clang-tools-extra/clang-tidy/boost/CMakeLists.txt
A clang-tools-extra/clang-tidy/boost/UseRangesCheck.cpp
A clang-tools-extra/clang-tidy/boost/UseRangesCheck.h
M clang-tools-extra/clang-tidy/modernize/CMakeLists.txt
M clang-tools-extra/clang-tidy/modernize/ModernizeTidyModule.cpp
A clang-tools-extra/clang-tidy/modernize/UseRangesCheck.cpp
A clang-tools-extra/clang-tidy/modernize/UseRangesCheck.h
M clang-tools-extra/clang-tidy/utils/CMakeLists.txt
A clang-tools-extra/clang-tidy/utils/UseRangesCheck.cpp
A clang-tools-extra/clang-tidy/utils/UseRangesCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/boost/use-ranges.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/modernize/use-ranges.rst
A clang-tools-extra/test/clang-tidy/checkers/boost/use-ranges.cpp
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-ranges.cpp
Log Message:
-----------
[clang-tidy] Add checks to convert std library iterator algorithms into c++20 or boost ranges (#97764)
Added modernize-use-ranges
Added boost-use-ranges
Commit: f002558883dbc32d939e9ab9f7a2296459bf47cc
https://github.com/llvm/llvm-project/commit/f002558883dbc32d939e9ab9f7a2296459bf47cc
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/boost/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/modernize/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/utils/BUILD.gn
Log Message:
-----------
[gn build] Port 1038db6f0228
Commit: 359c64f314ad568e78ee9a3723260286e3425c2d
https://github.com/llvm/llvm-project/commit/359c64f314ad568e78ee9a3723260286e3425c2d
Author: Dmitriy Chestnykh <dm.chestnykh at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
M llvm/test/tools/llvm-objcopy/ELF/remove-section-in-group.test
Log Message:
-----------
[llvm-objcopy] Remove empty SHT_GROUP sections (#97141)
Currently `llvm-objcopy/llvm-strip` in `--strip-debug` mode doesn't
remove such sections. This behavior can lead to incompatibilities with
GNU binutils (for examples ld.bfd before https://sourceware.org/PR20520
cannot process the object file contains empty .group section).
The ELF object that contains group section with `.debug_*` sections
inside can be obtained by `gcc -g3`.
Fix #97139
Commit: d52853760183a25758659863b1b940e9502eaa88
https://github.com/llvm/llvm-project/commit/d52853760183a25758659863b1b940e9502eaa88
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M clang/lib/Index/USRGeneration.cpp
A clang/test/Index/USR/func-template.cpp
Log Message:
-----------
[Clang][Index] Add support for dependent class scope explicit specializations of function templates to USRGenerator (#98027)
Given the following:
```
template<typename T>
struct A
{
void f(int); // #1
template<typename U>
void f(U); // #2
template<>
void f<int>(int); // #3
};
```
Clang will generate the same USR for `#1` and `#2`. This patch fixes the
issue by including the template arguments of dependent class scope
explicit specializations in their USRs.
Commit: ea39f977271d1a6bc3f0a4225724ff99d22b2d49
https://github.com/llvm/llvm-project/commit/ea39f977271d1a6bc3f0a4225724ff99d22b2d49
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
R llvm/test/Transforms/LoopIdiom/AArch64/ctlz.ll
Log Message:
-----------
Revert "[LoopIdiom] Support 'shift until less-than' idiom (#95002)" (#98065)
Reverts #95002 while I investigate buildbot failure.
This reverts commit 83b01aaf51072a07261ee2e5fc14102f71273bc0.
Commit: ce863dd5a77723fc21e1e43f5d3dd503e9a73d14
https://github.com/llvm/llvm-project/commit/ce863dd5a77723fc21e1e43f5d3dd503e9a73d14
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M lld/test/MachO/implicit-and-allowable-clients.test
Log Message:
-----------
[lld-macho,test] Fix REQUIRES after #97639
Commit: 1738cc61c35165b72c36c3b3a2c8e347d4ed740c
https://github.com/llvm/llvm-project/commit/1738cc61c35165b72c36c3b3a2c8e347d4ed740c
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang-tools-extra/clang-tidy/BUILD.bazel
Log Message:
-----------
[bazel] Port for 1038db6f02289e128c498769091718dd0e6e6fea
Commit: 66a2058e76db120e61c9b34e40bc244d3a6a86fb
https://github.com/llvm/llvm-project/commit/66a2058e76db120e61c9b34e40bc244d3a6a86fb
Author: Jacob Yu <pingshiyu at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
A mlir/test/Integration/Dialect/Arith/CPU/addition.mlir
Log Message:
-----------
[mlir][arith] Adding addition regression tests (#96973)
arith addition regression tests, a component of the large
https://github.com/llvm/llvm-project/pull/92272
Commit: 393eff4e02e7ab3d234d246a8d6912c8e745e6f9
https://github.com/llvm/llvm-project/commit/393eff4e02e7ab3d234d246a8d6912c8e745e6f9
Author: Jacob Yu <pingshiyu at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
A mlir/test/Integration/Dialect/Arith/CPU/multiplication.mlir
Log Message:
-----------
[mlir][arith] Adding mul operation regressions (#96975)
Regressions for the mul operation, a part of the original large PR
https://github.com/llvm/llvm-project/pull/92272
Commit: ae7ab043f2d8077ed00bb2d3239da4b96ad4b387
https://github.com/llvm/llvm-project/commit/ae7ab043f2d8077ed00bb2d3239da4b96ad4b387
Author: Amy Huang <akhuang at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAArch64.def
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/intrin.h
M clang/lib/Sema/SemaARM.cpp
M clang/test/CodeGen/arm64-microsoft-intrinsics.c
M clang/test/Sema/builtins-microsoft-arm64.c
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
A llvm/test/CodeGen/AArch64/arm64-hlt.ll
Log Message:
-----------
Add __hlt intrinsic for Windows ARM. (#96578)
Add __hlt, which is a MSVC ARM64 intrinsic.
This intrinsic is just the HLT instruction. MSVC's version seems to
return something undefined; in this patch
it will just return zero.
MSVC intrinsics are defined here
https://learn.microsoft.com/en-us/cpp/intrinsics/arm64-intrinsics.
I used unsigned int as the return type, because that is what the MSVC
intrin.h header uses, even though
it conflicts with the documentation.
Commit: f5ee07a1b5ca6f337e6b4a46558c315b8ccd29dc
https://github.com/llvm/llvm-project/commit/f5ee07a1b5ca6f337e6b4a46558c315b8ccd29dc
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/SystemZ/pr34619.ll
M llvm/test/Transforms/SLPVectorizer/X86/reordering-single-phi.ll
Log Message:
-----------
[SLP]Improve instruction reordering mode detection.
The "instruction" reordering mode should be selected only if there are
compatible instructions in other operands, which can be reordered.
Otherwise, better to select splat reordering mode.
Metric: size..text
Program size..text
results results0 diff
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 12383340.00 12383324.00 -0.0%
Some 4x operations get replaced by 8x.
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/97485
Commit: d358151a4fe94c72186d58f8903f044a116d0fa8
https://github.com/llvm/llvm-project/commit/d358151a4fe94c72186d58f8903f044a116d0fa8
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libc/include/llvm-libc-macros/math-macros.h
M libc/src/math/amdgpu/CMakeLists.txt
M libc/src/math/nvptx/CMakeLists.txt
M libc/src/math/nvptx/llrint.cpp
M libc/src/math/nvptx/llrintf.cpp
M libc/src/math/nvptx/lrint.cpp
Log Message:
-----------
Reapply "[libc] Make GPU `libm` use generic implementations" (#98061)
This reverts commit ea3fd020f4879d5b4261eabd9a56c24f30bc47f9.
Commit: 4b53cbb069626cb266c77eb419f2faf780c742d8
https://github.com/llvm/llvm-project/commit/4b53cbb069626cb266c77eb419f2faf780c742d8
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libc/config/config.json
M libc/config/gpu/config.json
M libc/docs/configure.rst
M libc/src/stdio/scanf_core/CMakeLists.txt
Log Message:
-----------
[libc] Export configs for `scanf` support (#98066)
Summary:
This patch adds the options for configuring floating point and index
mode for scanf just like `printf`. Not enabling it on the GPU yet, need
to fix something else first.
Commit: 8ab82a2dc308c27fbdd0a87b5be7dddc623f1b0e
https://github.com/llvm/llvm-project/commit/8ab82a2dc308c27fbdd0a87b5be7dddc623f1b0e
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
A libcxx/test/std/numerics/complex.number/complex/bit_cast.pass.cpp
Log Message:
-----------
[libc++] Add a test case for std::bit_cast with std::complex (#97751)
This is extracted from #94620. While libc++ doesn't have the problem
described in that issue, a test case is a good idea to ensure that we
don't regress this behavior in the future. This could happen for example
if we decide to use `_Complex` in the implementation of `std::complex`
while Clang doesn't handle bit_cast with _Complex yet.
Commit: acaa4c8bfd12eac4fa5f2c03e9d394f7bd8f1bd6
https://github.com/llvm/llvm-project/commit/acaa4c8bfd12eac4fa5f2c03e9d394f7bd8f1bd6
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libcxxabi/src/cxa_exception_storage.cpp
Log Message:
-----------
[libc++abi] Use __has_feature check to enable usage of thread_local for exception storage (#97591)
Previously, we'd use HAS_THREAD_LOCAL which was never defined. Hence,
we'd basically never use the code path where we use thread_local.
Fixes #78207
Commit: 526dbc1b933d111db1e564631690914580e7e429
https://github.com/llvm/llvm-project/commit/526dbc1b933d111db1e564631690914580e7e429
Author: Paul Kirth <paulkirth at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M lld/ELF/Arch/RISCV.cpp
M lld/test/ELF/riscv-attributes.s
Log Message:
-----------
[lld] Support merging RISC-V Atomics ABI attributes (#97347)
This patch adds support for merging the atomic_abi attribute, specified
in
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#tag_riscv_atomic_abi-14-uleb128version,
to LLD.
The atomics_abi tag merging is conducted as follows:
UNKNOWN is safe to merge with all other values.
A6C is compatible with A6S, and results in the A6C ABI.
A6C is incompatible with A7, and results in an error.
A6S and A7 are compatible, and merging results in the A7 ABI.
Note: the A7 is not yet supported in either LLVM or in any current
hardware, and is therefore omitted from attribute generation in
RISCVTargetStreamer.
LLD support was split from
https://github.com/llvm/llvm-project/pull/90266
Commit: a4fec164bf87018e3a4365be1299ee94b6d0c3d3
https://github.com/llvm/llvm-project/commit/a4fec164bf87018e3a4365be1299ee94b6d0c3d3
Author: Paul Kirth <paulkirth at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/atomic-load-store.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/forced-atomics.ll
Log Message:
-----------
Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (#90267)
With the tag merging in place, we can safely change the default for
+seq-cst-trailing-fence to the default, according to the recommendation
in
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-atomic.adoc
This patch changes the default for the feature flag, and moves to more
consistent naming with respect to existing features.
This was reverted with https://github.com/llvm/llvm-project/pull/84597,
because ld.bfd would segfault with unknown riscv attributes. Now that
attributes emission is guarded with a backend flag,
`--riscv-abi-attributes`, this should be safe to reland, since it won't
introduce abi tags unless the user opts into them.
Commit: ca2d2a123cef4078d1516796bbd8efd6cbaac3d6
https://github.com/llvm/llvm-project/commit/ca2d2a123cef4078d1516796bbd8efd6cbaac3d6
Author: Alexey Karyakin <akaryaki at quicinc.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M .github/new-prs-labeler.yml
Log Message:
-----------
Add patterns for Hexagon backend labels (#98068)
Add path filters for labelling of PRs related to the Hexagon backend.
Commit: 96c61f4304ae323e1abc2dc2cbdd4df0502520ae
https://github.com/llvm/llvm-project/commit/96c61f4304ae323e1abc2dc2cbdd4df0502520ae
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/utils/mlgo-utils/pyproject.toml
Log Message:
-----------
[MLGO] Drop Python version cap for mlgo-utils
This patch drops the python version cap for mlgo-utils. I have validated
that everything works as expected in Python 3.12, and we have no
dependencies when the library is used, so we should be fairly resiliant
against changes in Python.
Commit: 5c71f3017aaa28701c735bb5f3b48111e69d0cc1
https://github.com/llvm/llvm-project/commit/5c71f3017aaa28701c735bb5f3b48111e69d0cc1
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/utils/mlgo-utils/README.md
Log Message:
-----------
[MLGO] Drop outdated comment in mlgo-utils README
The mlgo-utils README contained a comment about a deviation in the
python version requirement for itself and the rest of the project. Now
that the global LLVM minimum python version is 3.8, this comment is no
longer valid so remove it.
Commit: 837dc3b179da931e0fd72dbd562c99f649434501
https://github.com/llvm/llvm-project/commit/837dc3b179da931e0fd72dbd562c99f649434501
Author: Kazu Hirata <kazu at google.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M llvm/lib/TableGen/Record.cpp
M llvm/lib/TableGen/TGParser.cpp
Log Message:
-----------
[TableGen] Use range-based for loops (NFC) (#97678)
Commit: d1f0ba615505660288e0b47fd413924f57933246
https://github.com/llvm/llvm-project/commit/d1f0ba615505660288e0b47fd413924f57933246
Author: Kazu Hirata <kazu at google.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
Log Message:
-----------
[AsmPrinter] Use range-based for loops (NFC) (#97977)
Commit: 7c046ee7e18bc4bb2602e33abb94a11106c6a7a1
https://github.com/llvm/llvm-project/commit/7c046ee7e18bc4bb2602e33abb94a11106c6a7a1
Author: Petr Hosek <phosek at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
Log Message:
-----------
[libc] Include _Exit in the baremetal configuration (#98053)
This is implemented using `__llvm_libc_exit` which should be provided by
the vendor and thus available in baremetal configurations.
Commit: 7f0d9bae9d1cfdd1c275b6c20fa1b4ed7e6e644f
https://github.com/llvm/llvm-project/commit/7f0d9bae9d1cfdd1c275b6c20fa1b4ed7e6e644f
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/asm-ld1-wrong-constraint.ll
Log Message:
-----------
[llvm][AArch64] Fix a crash with an incorrect asm constraint (#98071)
Fixes: rdar://130887714
Commit: e97bd0300b57547774c5cfe6fe84ebd0efc421ec
https://github.com/llvm/llvm-project/commit/e97bd0300b57547774c5cfe6fe84ebd0efc421ec
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M lld/MachO/ObjC.cpp
A lld/test/MachO/objc-category-merging-swift-class-ext.s
Log Message:
-----------
[lld-macho] Category Merging: Detect correct class language for classes with aliased symbols (#97454)
Currently we rely on detecting the source language of a class by the
name of the symbol pointing to it. This generally works, but there are
scenarios where Swift generates both an ObjC name and a Swift name for
the symbol - by aliasing the ObjC name to the Swift name, as follows:
```
.globl _OBJC_CLASS_$__TtC11MyTestClass11MyTestClass
.private_extern _OBJC_CLASS_$__TtC11MyTestClass11MyTestClass
.set _OBJC_CLASS_$__TtC11MyTestClass11MyTestClass, _$s11MyTestClassAACN
```
So to correctly detect the source language in all cases, we need to
handle scenarios where both an ObjC symbol and a Swift symbol is defined
for a class - in this case the symbol is always a Swift class.
Commit: b30d6671814cb5ac0b7f36b8b77345176e5132ba
https://github.com/llvm/llvm-project/commit/b30d6671814cb5ac0b7f36b8b77345176e5132ba
Author: ChiaHungDuan <chiahungduan at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M compiler-rt/lib/scudo/standalone/allocator_config.def
Log Message:
-----------
[scudo] Change CompactPtrT and CompactPtrScale to optional (#90797)
Commit: a582dde192d1b9596f3a2609275f04fd450e4aec
https://github.com/llvm/llvm-project/commit/a582dde192d1b9596f3a2609275f04fd450e4aec
Author: Brendan Hansknecht <Brendan.Hansknecht at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/lib/CAPI/IR/IR.cpp
Log Message:
-----------
[mlir][c-api] expose elideLargeResourceString (#98050)
Expose `elideLargeResourceString` to the c api.
This was done in the same way as `elideLargeElementsAttrs` is exposed.
The docs were grabbed from the `elideLargeResourceString` method and
forwarded here.
Commit: ceaaa19238ac9ca3e42503eca4d4d2215b27bbc1
https://github.com/llvm/llvm-project/commit/ceaaa19238ac9ca3e42503eca4d4d2215b27bbc1
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/utils/mlgo-utils/mlgo/__init__.py
M llvm/utils/mlgo-utils/pyproject.toml
Log Message:
-----------
[MLGO] Adjust mlgo-utils versioning to match Pypi
This patch adjusts the versioning/package name for mlgo-utils to match
what is on Pypi. I did this before because we uploaded a package before
the 18 branch, but apparently never committed the changes.
We will have to special case actual releases in the future, but for now
development versions are fine.
Commit: 4ad967851e71efe6671ff9ba2f1c31dd26ca8301
https://github.com/llvm/llvm-project/commit/4ad967851e71efe6671ff9ba2f1c31dd26ca8301
Author: Quinn Dawkins <quinn.dawkins at gmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/DataLayoutPropagation.cpp
M mlir/test/Dialect/Linalg/data-layout-propagation.mlir
Log Message:
-----------
[mlir][Linalg] Allow propagation of pack through multi use pad (#98039)
This allows bubbling `tensor.pack` through `tensor.pad` when the pad has
multiple uses. A new pad is created and a `tensor.unpack` is inserted to
connect the packed pad with the new users.
To keep the previous behavior, the layout propagation control function
can be modified to disallow multi-use propagation.
Commit: 07bb0444ddb96495905fbc13a04ad39972808dfb
https://github.com/llvm/llvm-project/commit/07bb0444ddb96495905fbc13a04ad39972808dfb
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
Log Message:
-----------
[RISCV] Add build_vector coverage when zbkb is available
An uncomping change will make much more complete use of packh, packw, and
pack during element packing inside build_vector lowering.
Commit: f6616e99c71c15d530060346ec29c3246d7fc235
https://github.com/llvm/llvm-project/commit/f6616e99c71c15d530060346ec29c3246d7fc235
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
Reland "Revert "[compiler-rt][X86] Use functions in cpuid.h instead of inline assembly (#97877)""
This reverts commit 2039e130649d8469bc85fa31ba7422d1d3739f90.
This relands commit 19cf8deabe1124831164987f1b9bf2f806c0a875.
Added some additional preprocessor directives to ensure that Host.cpp
only includes cpuid.h when being built on x86.
Commit: d3cb277ea35d2cf25cdcc41b894959332477861c
https://github.com/llvm/llvm-project/commit/d3cb277ea35d2cf25cdcc41b894959332477861c
Author: David Green <david.green at arm.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
Log Message:
-----------
[AArch64] Rearrange Opcodes in getMemOpInfo. NFC
This just changes the order of the opcodes and fields in getMemOpInfo, none of
the values are altered.
Commit: a004e50b9e6880850b54e672bba9f650ed716910
https://github.com/llvm/llvm-project/commit/a004e50b9e6880850b54e672bba9f650ed716910
Author: aaryanshukla <53713108+aaryanshukla at users.noreply.github.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libc/newhdrgen/class_implementation/classes/function.py
M libc/newhdrgen/tests/test_integration.py
M libc/newhdrgen/yaml/inttypes.yaml
M libc/newhdrgen/yaml/pthread.yaml
M libc/newhdrgen/yaml/sched.yaml
M libc/newhdrgen/yaml/signal.yaml
M libc/newhdrgen/yaml/stdio.yaml
M libc/newhdrgen/yaml/stdlib.yaml
M libc/newhdrgen/yaml/string.yaml
M libc/newhdrgen/yaml/sys_mman.yaml
A libc/newhdrgen/yaml/sys_syscall.yaml
M libc/newhdrgen/yaml/sys_types.yaml
M libc/newhdrgen/yaml/termios.yaml
M libc/newhdrgen/yaml/threads.yaml
M libc/newhdrgen/yaml/time.yaml
M libc/newhdrgen/yaml/unistd.yaml
Log Message:
-----------
[libc] corrected yaml files in newhdrgen (#98069)
- fixed little issues in yaml issues through testing
- corrected function class in the case there is no attribute
Commit: c95935789da9349c470ce75203af93624360b2b6
https://github.com/llvm/llvm-project/commit/c95935789da9349c470ce75203af93624360b2b6
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
Log Message:
-----------
[RISCV] Directly use pack* in build_vector lowering (#98084)
In 03d4332, we extended build_vector lowering to pack elements into the
largest size which doesn't exceed either ELEN or XLEN. The zbkb
extension - ratified under scalar crypto, but otherwise not really
connected to crypto per se - adds the packh, packw, and pack
instructions. These instructions are designed for exactly this pairwise
packing.
I ended up choosing to directly lower to machine nodes. A combination of
the slightly non-uniform semantics of these instructions (packw *sign*
extends the result, whereas packh *zero* extends it), and our generic
dag canonicalization (which sinks shl through or nodes), make pattern
matching these tricky and not particularly robust. Another alternative
was to have an ISD node for them, but that didn't seem to add much in
practice.
Commit: 46a2abb91cb6cfac9b807ae2055cc5f1743405e4
https://github.com/llvm/llvm-project/commit/46a2abb91cb6cfac9b807ae2055cc5f1743405e4
Author: Paul Kirth <paulkirth at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
Log Message:
-----------
[clang-doc][nfc] Avoid constructing SmallString in ToString method (#96921)
This patch updates the return type of HTMLTag::toString from
SmallString<16> to StringRef, since this API only returns string
literals. As a result, there is no need to construct a full heap
allocated or owned string.
Additionally, this patch renames ToString to toString to match the LLVM
style guide.
Commit: 4f3c9dabecc6074f8455ca23ba70020d5c556e63
https://github.com/llvm/llvm-project/commit/4f3c9dabecc6074f8455ca23ba70020d5c556e63
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M mlir/test/CAPI/CMakeLists.txt
Log Message:
-----------
[mlir] Exclude CAPI test targets from default build target (#96545)
This helps reduce the build time for users that want to build MLIR, but
don't want to run the tests.
Commit: 2a7abb04e258542679476fa6527418c34412283c
https://github.com/llvm/llvm-project/commit/2a7abb04e258542679476fa6527418c34412283c
Author: Kevin Frei <freik at meta.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M lldb/include/lldb/Host/Config.h.cmake
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
M lldb/source/API/SBDebugger.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolLocator/CMakeLists.txt
M lldb/source/Plugins/SymbolVendor/ELF/SymbolVendorELF.cpp
A lldb/test/API/debuginfod/Normal/Makefile
A lldb/test/API/debuginfod/Normal/TestDebuginfod.py
A lldb/test/API/debuginfod/Normal/main.c
A lldb/test/API/debuginfod/SplitDWARF/Makefile
A lldb/test/API/debuginfod/SplitDWARF/TestDebuginfodDWP.py
A lldb/test/API/debuginfod/SplitDWARF/main.c
Log Message:
-----------
[LLDB] DebugInfoD tests: attempt to fix Fuchsia build (#96802)
This is the same diff I've put up at many times before. I've been trying
to add some brand new functionality to the LLDB test infrastucture
(create split-dwarf files!), and we all know that no good deed goes
unpunished. The last attempt was reverted because it didn't work on the
Fuchsia build.
There are no code differences between this and
[the](https://github.com/llvm/llvm-project/pull/90622)
[previous](https://github.com/llvm/llvm-project/pull/87676)
[four](https://github.com/llvm/llvm-project/pull/86812)
[diffs](https://github.com/llvm/llvm-project/pull/85693) landed &
reverted (due to testing infra failures). The only change in this one is
the way `dwp` is being identified in `Makefile.rules`.
Thanks to @petrhosek for helping me figure out how the fuchsia builders
are configured. I now prefer to use llvm-dwp and fall back to gnu's dwp
if the former isn't found. Hopefully this will work everywhere it needs
to.
Commit: f6eda6fb7a335861d8a8ce32ea805830685f218d
https://github.com/llvm/llvm-project/commit/f6eda6fb7a335861d8a8ce32ea805830685f218d
Author: Caslyn Tonelli <6718161+Caslyn at users.noreply.github.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libc/src/__support/block.h
Log Message:
-----------
[libc] Fix for unused variable warning (#98086)
This fixes the `unused variable 'new_inner_size'` warning that arises
when `new_inner_size` is only used by `LIBC_ASSERT` by performing the
calculation directly in the macro.
Commit: c1f1aab5d5d4d2a9d86e9e3e1794d609749a15f0
https://github.com/llvm/llvm-project/commit/c1f1aab5d5d4d2a9d86e9e3e1794d609749a15f0
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libc/src/sys/statvfs/linux/statfs_utils.h
Log Message:
-----------
[libc] Fix statfs_to_statvfs conversion function on rv32 (#98098)
Commit: b2fd1ebc3523d225956120052bcc0698adf4579f
https://github.com/llvm/llvm-project/commit/b2fd1ebc3523d225956120052bcc0698adf4579f
Author: Kevin Frei <kevinfrei at hotmail.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M lldb/include/lldb/Host/Config.h.cmake
M lldb/packages/Python/lldbsuite/test/decorators.py
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
M lldb/source/API/SBDebugger.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolLocator/CMakeLists.txt
M lldb/source/Plugins/SymbolVendor/ELF/SymbolVendorELF.cpp
R lldb/test/API/debuginfod/Normal/Makefile
R lldb/test/API/debuginfod/Normal/TestDebuginfod.py
R lldb/test/API/debuginfod/Normal/main.c
R lldb/test/API/debuginfod/SplitDWARF/Makefile
R lldb/test/API/debuginfod/SplitDWARF/TestDebuginfodDWP.py
R lldb/test/API/debuginfod/SplitDWARF/main.c
Log Message:
-----------
Revert "[LLDB] DebugInfoD tests: attempt to fix Fuchsia build" (#98101)
Reverts llvm/llvm-project#96802
Attempt #5 fails. It's been 6 months. I despise Makefile.rules and have
no ability to even *detect* these failures without _landing_ a diff. In
the mean time, we have no testing for DWP files at all (and a regression
that was introduced, that I fix with this diff) so I'm going to just
remove some of the tests and try to land it again, but with less testing
I guess.
Commit: afa6bed8afe9011c07c682a0a24362260d92cfdd
https://github.com/llvm/llvm-project/commit/afa6bed8afe9011c07c682a0a24362260d92cfdd
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libc/src/math/amdgpu/CMakeLists.txt
M libc/src/math/nvptx/CMakeLists.txt
M libc/test/src/math/RoundToIntegerTest.h
M libc/test/src/math/smoke/RoundToIntegerTest.h
Log Message:
-----------
[libc] Fix integer `rint` variants on the GPU (#98095)
Summary:
Currently these are implemented as a static cast on `__builtin_rint()`
to a long. Howver, this is not strictly correct. The standard states
that the output is unspecified, but most implementations, and the LLVM
libc implementation, do some kind of guarantee on this beahvior. This is
not guaranteed by just doing a cast. This patch just uses the generic
versions until we implement `__builitin_lrint` correctly.
Commit: 79d0de2ac37b6b7d66720611935d1dd7fc4fbd43
https://github.com/llvm/llvm-project/commit/79d0de2ac37b6b7d66720611935d1dd7fc4fbd43
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineLoopInfo.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/EarlyIfConversion.cpp
M llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp
M llvm/lib/CodeGen/MIRSampleProfile.cpp
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineCombiner.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachineLoopInfo.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineTraceMetrics.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/PostRASchedulerList.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocPBQP.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
M llvm/lib/CodeGen/StackSlotColoring.cpp
M llvm/lib/CodeGen/UnreachableBlockElim.cpp
M llvm/lib/CodeGen/XRayInstrumentation.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
M llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AMDGPU/R600MachineCFGStructurizer.cpp
M llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
M llvm/lib/Target/AMDGPU/R600Packetizer.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
M llvm/lib/Target/ARM/ARMBlockPlacement.cpp
M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
M llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp
M llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
M llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
M llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
M llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/lib/Target/PowerPC/PPCCTRLoops.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/X86/X86CmovConversion.cpp
M llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
M llvm/lib/Target/X86/X86PreTileConfig.cpp
A llvm/test/CodeGen/X86/machine-loops.ll
Log Message:
-----------
[CodeGen][NewPM] Port `machine-loops` to new pass manager (#97793)
- Add `MachineLoopAnalysis`.
- Add `MachineLoopPrinterPass`.
- Convert to `MachineLoopInfoWrapperPass` in legacy pass manager.
Commit: 673b6cd104beddac08cec46e7cbf74d7fcc44abc
https://github.com/llvm/llvm-project/commit/673b6cd104beddac08cec46e7cbf74d7fcc44abc
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libc/src/__support/File/file.h
Log Message:
-----------
[libc] Use `stdio.h` for `off_t` instead of `unistd.h` (#98093)
Summary:
The `stdio.h` header should define `off_t` as defined for the platform.
This will use the system's in overlay mode, or what the llvm-libc-types
deems correct. If this `off_t` is incorrect it should be changed in
`llvm-libc-types`. This fixes the GPU build.
Commit: f1905f064451bf688577976a13000c9c47e58452
https://github.com/llvm/llvm-project/commit/f1905f064451bf688577976a13000c9c47e58452
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/x86.c
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
Revert "[compiler-rt][X86] Use functions in cpuid.h instead of inline assembly (#97877)"
This reverts commit f6616e99c71c15d530060346ec29c3246d7fc235.
Was causing buildbot failures on Windows. I also remember seeing a
AMDGPU buildbot failing somewhere on a warning as they have -Werror
enabled.
Commit: d65f4232026a6c0fcd2431e1d28a7ad49127f6e5
https://github.com/llvm/llvm-project/commit/d65f4232026a6c0fcd2431e1d28a7ad49127f6e5
Author: Sudharsan Veeravalli <quic_svs at quicinc.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/test/CodeGen/RISCV/abi-empty-structs.c
Log Message:
-----------
[RISCV] Handle empty structs/unions passing in C++ (#97315)
According to RISC-V integer calling convention empty structs or union
arguments or return values are ignored by C compilers which support them
as a non-standard extension. This is not the case for C++, which
requires them to be sized types.
Fixes #97285
Commit: 0182f5174f7cab31f8275718ae0aca7e9ac6fcd2
https://github.com/llvm/llvm-project/commit/0182f5174f7cab31f8275718ae0aca7e9ac6fcd2
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libc/src/__support/File/file.h
Log Message:
-----------
[libc][fix] Use off_t libc type directly
Summary:
Including stdio here caused some multiple definitions on overlay mode.
Just include `off_t` directly.
Is this correct for 32-bit targets? Will investigate further after
fixing bots.
Commit: 366eb8f025f03f00ed1188dccfd3d527b8c82892
https://github.com/llvm/llvm-project/commit/366eb8f025f03f00ed1188dccfd3d527b8c82892
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/include/llvm/Object/ELFTypes.h
Log Message:
-----------
[Object] Fix IsRela typo after #91280
Commit: ac0b2814c34959ebaa8f054db019bd287fdff54d
https://github.com/llvm/llvm-project/commit/ac0b2814c34959ebaa8f054db019bd287fdff54d
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M llvm/include/llvm/CodeGen/LiveVariables.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/LiveVariables.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
A llvm/test/CodeGen/X86/live-vars.ll
M llvm/unittests/MI/LiveIntervalTest.cpp
Log Message:
-----------
[CodeGen][NewPM] Port `LiveVariables` to new pass manager (#97880)
- Port `LiveVariables` to new pass manager.
- Convert to `LiveVariablesWrapperPass` in legacy pass manager.
Commit: 28695dd104ef3a27f9410663640aa8f5b99f8c34
https://github.com/llvm/llvm-project/commit/28695dd104ef3a27f9410663640aa8f5b99f8c34
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libc/test/src/__support/CMakeLists.txt
Log Message:
-----------
[libc] Disable block test on NVPTX
Summary:
We already disable the freelist, the block test also causes issues. We
don't use this code at all on the GPU so we can disable this test for
now.
Commit: 50881d03fc46271fc827adcd3d89ba04593b7f08
https://github.com/llvm/llvm-project/commit/50881d03fc46271fc827adcd3d89ba04593b7f08
Author: vporpo <vporpodas at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Add BasicBlock and adds functionality to Function and Context (#97637)
We can now create SandboxIR from LLVM IR using the Context::create*
functions.
Commit: 1d5ac72cd282484c16fb0fe8853ac6e2305b82bf
https://github.com/llvm/llvm-project/commit/1d5ac72cd282484c16fb0fe8853ac6e2305b82bf
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/include/llvm/MC/MCPseudoProbe.h
M llvm/lib/MC/MCPseudoProbe.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.h
Log Message:
-----------
[MC][NFC] Fix typo in MCPseudoProbeFrameLocation (#98090)
Commit: 87d58ab22af0627b2c90138713c19b5263b6c132
https://github.com/llvm/llvm-project/commit/87d58ab22af0627b2c90138713c19b5263b6c132
Author: PeterChou1 <peter.chou at mail.utoronto.ca>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M clang-tools-extra/clang-doc/tool/CMakeLists.txt
Log Message:
-----------
[clang-doc] fix paths by hard coding path to share (#98099)
Commit: 4010f894a1e880f88bda78a49a8bece5affaa848
https://github.com/llvm/llvm-project/commit/4010f894a1e880f88bda78a49a8bece5affaa848
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SlotIndexes.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/LiveStacks.cpp
M llvm/lib/CodeGen/MLRegAllocPriorityAdvisor.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineFunctionPrinterPass.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocPBQP.cpp
M llvm/lib/CodeGen/RegAllocPriorityAdvisor.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
M llvm/lib/CodeGen/SlotIndexes.cpp
M llvm/lib/CodeGen/StackColoring.cpp
M llvm/lib/CodeGen/StackSlotColoring.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp
M llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.cpp
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/lib/Target/Hexagon/HexagonCopyHoisting.cpp
M llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
M llvm/lib/Target/Hexagon/HexagonTfrCleanup.cpp
M llvm/lib/Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp
M llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
A llvm/test/CodeGen/X86/slot-indexes.ll
Log Message:
-----------
[CodeGen][NewPM] Port `SlotIndexes` to new pass manager (#97941)
- Add `SlotIndexesAnalysis`.
- Add `SlotIndexesPrinterPass`.
- Use `SlotIndexesWrapperPass` in legacy pass.
Commit: d0f3943a027347685905080f6f5ee423b1c8714a
https://github.com/llvm/llvm-project/commit/d0f3943a027347685905080f6f5ee423b1c8714a
Author: Luke Lau <luke at igalia.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Log Message:
-----------
[RISCV] Remove -riscv-disable-insert-vsetvl-phi-opt flag (#97991)
This flag was added in https://reviews.llvm.org/D103277 out of
precaution, but it's been enabled by default for 3 years now and I
haven't seen any miscompiles upstream stemming from needVSETVLIPHI. This
would remove it just to simplify the number of configurations.
Commit: 3f83a69bcb2c6b5fa3efbc41d1822e6fa69a6620
https://github.com/llvm/llvm-project/commit/3f83a69bcb2c6b5fa3efbc41d1822e6fa69a6620
Author: Luke Lau <luke at igalia.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-masked-vops.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vpload.ll
Log Message:
-----------
[RISCV] Allow folding vmerge into masked ops when mask is the same (#97989)
We currently only fold a vmerge into a masked true operand if the vmerge
has an all-ones mask, since we end up keeping the mask from the true
operand.
But if the masks are the same then we can still fold, because vmerge and
true have the same passthru. If an element was masked off in the
original vmerge, it will also be masked off in the resulting true, and
will have the same passthru value.
The motivation for this is to lower masked VP loads and stores with
passthrus to masked RVV instructions. Normally you can express a masked
RVV instruction with a mask undisturbed passthru via a combination of a
VP op with an all-ones mask and a vp.merge. But for loads and stores you
need the same mask on the VP op as well as the vp.merge.
Commit: 84741940f2d9cb858ecb29ce5197714a45e7e67a
https://github.com/llvm/llvm-project/commit/84741940f2d9cb858ecb29ce5197714a45e7e67a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/utils/TableGen/RISCVVEmitter.cpp
Log Message:
-----------
[RISCV] Remove unused RequiredFeatures argument from RVVIntrinsic constructor. NFC (#98067)
Looks like the usage was removed by
7a5cb15ea6facd82756adafae76d60f36a0b60fd
Commit: 50fea9943fa59ed1aeb4538e0f715cc01db58a9a
https://github.com/llvm/llvm-project/commit/50fea9943fa59ed1aeb4538e0f715cc01db58a9a
Author: Mingming Liu <mingmingl at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/include/llvm/Bitcode/BitcodeWriter.h
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/LTO/legacy/ThinLTOCodeGenerator.h
M llvm/include/llvm/Transforms/IPO/FunctionImport.h
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/test/ThinLTO/X86/import_callee_declaration.ll
M llvm/tools/llvm-lto/llvm-lto.cpp
Log Message:
-----------
Reland "[ThinLTO][Bitcode] Generate import type in bitcode" (#97253)
https://github.com/llvm/llvm-project/pull/87600 was reverted in order to
revert
https://github.com/llvm/llvm-project/commit/6262763341fcd71a2b0708cf7485f9abd1d26ba8.
Now https://github.com/llvm/llvm-project/pull/95482 is fix forward for
https://github.com/llvm/llvm-project/commit/6262763341fcd71a2b0708cf7485f9abd1d26ba8.
This patch is a reland for
https://github.com/llvm/llvm-project/pull/87600
**Changes on top of original patch**
In `llvm/include/llvm/IR/ModuleSummaryIndex.h`, make the type of
`GVSummaryPtrSet` an `unordered_set` which is more memory efficient when
the number of elements is smaller than 128 [1]
**Original commit message**
For distributed ThinLTO, the LTO indexing step generates combined
summary for each module, and postlink pipeline reads the combined
summary which stores the information for link-time optimization.
This patch populates the 'import type' of a summary in bitcode, and
updates bitcode reader to parse the bit correctly.
[1]
https://github.com/llvm/llvm-project/blob/393eff4e02e7ab3d234d246a8d6912c8e745e6f9/llvm/lib/Support/SmallPtrSet.cpp#L43
Commit: 2217933c6d3850948dced70097847f5a684ed069
https://github.com/llvm/llvm-project/commit/2217933c6d3850948dced70097847f5a684ed069
Author: Christian Sigg <csigg at google.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel][libc] Fix BUILD after 0182f5174f7cab31f8275718ae0aca7e9ac6fcd2.
Commit: 7eb1a320ccc5ce608eb9ea2a0de760fa6c346774
https://github.com/llvm/llvm-project/commit/7eb1a320ccc5ce608eb9ea2a0de760fa6c346774
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
A llvm/test/CodeGen/AMDGPU/insert-skips-gfx10.mir
A llvm/test/CodeGen/AMDGPU/insert-skips-gfx12.mir
Log Message:
-----------
[AMDGPU] Update EXECZ retention in SIPreEmitPeephole for GFX10/12 (#97676)
The check to maintain EXECZ branches only checks S_WAITCNT.
Add handling for new waitcnt instructions in GFX10 and GFX12.
Commit: bb8998dd3b74a6936452d7ddeb341e79c1d8f001
https://github.com/llvm/llvm-project/commit/bb8998dd3b74a6936452d7ddeb341e79c1d8f001
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll
Log Message:
-----------
[RISCV] Don't custom legalize vXf16 SPLAT_VECTOR with Zvfhmin without Zfhmin.
Marking SPLAT_VECTOR as Custom enables generic DAGCombine to turn
BUILD_VECTOR into SPLAT_VECTOR. We need to custom type legalize BUILD_VECTOR
without Zfhmin since we don't have the scalar f16 type. If we allow
SPLAT_VECTOR to be formed, we'll need to custom type legalize it too.
Easiest fix is to only enable SPLAT_VECTOR with Zvfhmin+Zfhmin. There's
still an issue that we need to properly support BUILD_VECTOR with Zvfhmin+Zfhmin.
Should fix the new case reported in #97849.
I've also changed the predicates to Zfhmin instead of ZfhminOrZhinxmin
since Zhinx isn't compatible with Zvfhmin.
Commit: 626c7ce33f850831949e4e724016ddbff3a34990
https://github.com/llvm/llvm-project/commit/626c7ce33f850831949e4e724016ddbff3a34990
Author: Zhaoxin Yang <yangzhaoxin at loongson.cn>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Driver/Options.td
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
A clang/test/Driver/loongarch-msimd.c
M clang/test/Preprocessor/init-loongarch.c
Log Message:
-----------
[LoongArch][clang] Add support for option `-msimd=` and macro `__loongarch_simd_width`. (#97984)
Commit: 32597685574e594d745df1bb15dc0e626bd60566
https://github.com/llvm/llvm-project/commit/32597685574e594d745df1bb15dc0e626bd60566
Author: Jianjian Guan <jacquesguan at me.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M clang/lib/Sema/SemaRISCV.cpp
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vcreate.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vget.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlmul_ext_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlmul_trunc_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vreinterpret.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vset.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vundefined.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/sf_vfwmacc_4x4x4.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmaccbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vget.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlmul_ext_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlmul_trunc_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vreinterpret.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vset.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/sf_vfwmacc_4x4x4.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwmaccbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/sf_vfwmacc_4x4x4.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmaccbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/sf_vfwmacc_4x4x4.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwmaccbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/rvv-intrinsic-datatypes.cpp
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Sema/riscv-types.c
M llvm/docs/RISCVUsage.rst
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-args.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-ret.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/bfloat-arith.ll
M llvm/test/CodeGen/RISCV/bfloat-br-fcmp.ll
M llvm/test/CodeGen/RISCV/bfloat-convert.ll
M llvm/test/CodeGen/RISCV/bfloat-fcmp.ll
M llvm/test/CodeGen/RISCV/bfloat-frem.ll
M llvm/test/CodeGen/RISCV/bfloat-imm.ll
M llvm/test/CodeGen/RISCV/bfloat-isnan.ll
M llvm/test/CodeGen/RISCV/bfloat-mem.ll
M llvm/test/CodeGen/RISCV/bfloat-select-fcmp.ll
M llvm/test/CodeGen/RISCV/bfloat-select-icmp.ll
M llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fpext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-load-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfpext-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfptrunc-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/select-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/sf_vfwmacc_4x4x4.ll
M llvm/test/CodeGen/RISCV/rvv/vfncvtbf16-f-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfpext-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfpext-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfpext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvtbf16-f-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmaccbf16.ll
M llvm/test/CodeGen/RISCV/rvv/vle.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vse.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-bf16.ll
M llvm/test/CodeGen/RISCV/zfbfmin.ll
M llvm/test/MC/RISCV/attribute-arch-invalid.s
M llvm/test/MC/RISCV/fp-default-rounding-mode.s
M llvm/test/MC/RISCV/rv32zfbfmin-invalid.s
M llvm/test/MC/RISCV/rv32zfbfmin-valid.s
M llvm/test/MC/RISCV/rvv/zvfbfmin.s
M llvm/test/MC/RISCV/rvv/zvfbfwma-invalid.s
M llvm/test/MC/RISCV/rvv/zvfbfwma.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Remove experimental for bf16 extensions (#97996)
They are already ratified now.
Commit: 9acaccbaeef50fda3b73b7760fc48771e623efc9
https://github.com/llvm/llvm-project/commit/9acaccbaeef50fda3b73b7760fc48771e623efc9
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M clang/lib/Driver/ToolChains/Arch/RISCV.h
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
Log Message:
-----------
[RISCV][Driver] Refactor `riscv::getRISCVArch` to return `std::string`. NFC. (#97965)
See the discussion in
https://github.com/llvm/llvm-project/pull/94352#discussion_r1657074801
Commit: f3fe14fabc42f890cde58db8f50db4dd5e01f9b7
https://github.com/llvm/llvm-project/commit/f3fe14fabc42f890cde58db8f50db4dd5e01f9b7
Author: Petr Hosek <phosek at google.com>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/src/stdio/baremetal/CMakeLists.txt
A libc/src/stdio/baremetal/puts.cpp
Log Message:
-----------
[libc] puts implementation for baremetal (#98051)
This is a simple baremetal implementation of puts akin to putchar.
Commit: 2abe53a17f486a055a3715f19a37e3e91b4415fc
https://github.com/llvm/llvm-project/commit/2abe53a17f486a055a3715f19a37e3e91b4415fc
Author: Fangrui Song <i at maskray.me>
Date: 2024-07-08 (Mon, 08 Jul 2024)
Changed paths:
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
M llvm/test/tools/llvm-objcopy/ELF/remove-section-in-group.test
Log Message:
-----------
Revert "[llvm-objcopy] Remove empty SHT_GROUP sections (#97141)"
This reverts commit 359c64f314ad568e78ee9a3723260286e3425c2d.
This caused heap-use-after-free. See #98106.
Commit: ed51908cec879c9dff435abdc70d8b03afc35c07
https://github.com/llvm/llvm-project/commit/ed51908cec879c9dff435abdc70d8b03afc35c07
Author: Luke Lau <luke at igalia.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Emit VP strided load in mgather combine. NFCI (#98112)
This combine is a duplication of the transform in
RISCVGatherScatterLowering but at the SelectionDAG level, so similarly
to #98111 we can replace the use of riscv_masked_strided_load with a VP
strided load.
Unlike #98111 we don't require #97800 or #97798 since it only operates
on fixed vectors with a non-zero stride.
Commit: be7239e5a60927f5b4932f995dc4b57423ea8534
https://github.com/llvm/llvm-project/commit/be7239e5a60927f5b4932f995dc4b57423ea8534
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M llvm/lib/Analysis/InlineCost.cpp
A llvm/test/Transforms/Inline/pr97590.ll
Log Message:
-----------
[Inline] Remove bitcast handling in `CallAnalyzer::stripAndComputeInBoundsConstantOffsets` (#97988)
As we are now using opaque pointers, bitcast handling is no longer
needed.
Closes https://github.com/llvm/llvm-project/issues/97590.
Commit: cff8d716bdf017a2af8eb8623257fd33ee43f30e
https://github.com/llvm/llvm-project/commit/cff8d716bdf017a2af8eb8623257fd33ee43f30e
Author: v01dXYZ <14996868+v01dXYZ at users.noreply.github.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Transforms/LoopUnroll/peel-loop-scev-invalidate-with-overflow-inst.ll
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
Log Message:
-----------
[SCEV] forgetValue: support (with-overflow-inst op0, op1) (#98015)
The use-def walk in forgetValue() was skipping instructions with
non-SCEVable types. However, SCEV may look past with.overflow
intrinsics returning aggregates.
Fixes #97586.
Commit: a1e1f31570adf2805ae9cc3bc690a4eef72ba4f2
https://github.com/llvm/llvm-project/commit/a1e1f31570adf2805ae9cc3bc690a4eef72ba4f2
Author: Mariya Podchishchaeva <mariya.podchishchaeva at intel.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[NFC][clang] Add a release note for `#embed` (#97997)
Commit: eee9efb09c1a3cbbb1ad5471713f3da218c8b00e
https://github.com/llvm/llvm-project/commit/eee9efb09c1a3cbbb1ad5471713f3da218c8b00e
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M clang/test/AST/Interp/records.cpp
Log Message:
-----------
[clang][Interp][NFC] Add empty initializer list to test decl
This was missing in the test.
Commit: 93869dfd89387844bf8b605ebcd1abc0cc81bde8
https://github.com/llvm/llvm-project/commit/93869dfd89387844bf8b605ebcd1abc0cc81bde8
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M clang/test/AST/Interp/lifetimes.cpp
Log Message:
-----------
[clang][Interp][NFC] Simplify a test case
Commit: 58e750bfd621ac7ef8647eb1170b254e05ffc10d
https://github.com/llvm/llvm-project/commit/58e750bfd621ac7ef8647eb1170b254e05ffc10d
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M lldb/test/API/python_api/global_module_cache/TestGlobalModuleCache.py
Log Message:
-----------
[lldb] Put the new debugger in synchronous mode in TestGlobalModuleCache (#98041)
In async mode, the test terminates sooner than it should
(`run_to_source_breakpoint` does not work in this mode), and then the
test crashes due to #76057. Most of the time, the test does not fail
because its already XFAILed, but the crash still registers as a failure.
Commit: 3655de73809b0f8f100040c4b9c9ad889dca2225
https://github.com/llvm/llvm-project/commit/3655de73809b0f8f100040c4b9c9ad889dca2225
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M clang/lib/AST/Interp/InterpBlock.cpp
Log Message:
-----------
[clang][Interp] Avoid a dangling pointer
We've just moved all the pointers from the Block to the DeadBlock,
so make sure the old Block doesn't point to a linked list of Pointers
that don't even point to it anymore.
Commit: efc5a6aa82081aaa002f90baa21fc16655af0729
https://github.com/llvm/llvm-project/commit/efc5a6aa82081aaa002f90baa21fc16655af0729
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M clang/lib/AST/Interp/Disasm.cpp
Log Message:
-----------
[clang][Interp][NFC] Print Block descriptor in ::dump()
Commit: 1e7d6d345518de0738eb5b2eb71addd499fea0fb
https://github.com/llvm/llvm-project/commit/1e7d6d345518de0738eb5b2eb71addd499fea0fb
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
Log Message:
-----------
[mlir][vector] Propagate scalability to gather/scatter ptrs vector (#97584)
In convert-vector-to-llvm the first operand (vector of pointers holding
all memory addresses to read) to the masked.gather (and scatter)
intrinsic has a fixed vector type.
This may result in intrinsics where the scalable flag has been dropped:
```
%0 = llvm.intr.masked.gather %1, %2, %3 {alignment = 4 : i32}
: (!llvm.vec<4 x ptr>, vector<[4]xi1>, vector<[4]xi32>) -> vector<[4]xi32>
```
Fortunately the operand is overloaded on the result type so we end up
with the correct IR when lowering to LLVM, but this is still incorrect.
This patch fixes it by propagating scalability.
Commit: 8011a23948cb18a6771b5acb8c73a7d6bae7e40d
https://github.com/llvm/llvm-project/commit/8011a23948cb18a6771b5acb8c73a7d6bae7e40d
Author: Cullen Rhodes <cullen.rhodes at arm.com>
Date: 2024-07-09 (Tue, 09 Jul 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorization-scalable.mlir
M mlir/test/Dialect/Linalg/vectorize-tensor-extract-masked.mlir
Log Message:
-----------
[mlir][linalg] Support scalable vectorization of linalg.index operations (#96778)
The vectorization of linalg.index operations doesn't support scalable
vectors when computing the index vector. This patch fixes this with the
vector.step operation.
Depends on #96776
Commit: b0bc3cae353cd1e4a82751cb6b9677211a94f7ae
https://github.com/llvm/llvm-project/commit/b0bc3cae353cd1e4a82751cb6b9677211a94f7ae
Author: Sayhaan Siddiqui <sayhaan at meta.com>
Date: 2024-07-10 (Wed, 10 Jul 2024)
Changed paths:
M .github/new-prs-labeler.yml
M bolt/include/bolt/Core/DebugData.h
M bolt/lib/Core/DebugData.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
M clang-tools-extra/clang-doc/HTMLGenerator.cpp
M clang-tools-extra/clang-doc/tool/CMakeLists.txt
M clang-tools-extra/clang-tidy/boost/BoostTidyModule.cpp
M clang-tools-extra/clang-tidy/boost/CMakeLists.txt
A clang-tools-extra/clang-tidy/boost/UseRangesCheck.cpp
A clang-tools-extra/clang-tidy/boost/UseRangesCheck.h
M clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
M clang-tools-extra/clang-tidy/modernize/CMakeLists.txt
M clang-tools-extra/clang-tidy/modernize/ModernizeTidyModule.cpp
A clang-tools-extra/clang-tidy/modernize/UseRangesCheck.cpp
A clang-tools-extra/clang-tidy/modernize/UseRangesCheck.h
M clang-tools-extra/clang-tidy/utils/CMakeLists.txt
M clang-tools-extra/clang-tidy/utils/ExprSequence.cpp
A clang-tools-extra/clang-tidy/utils/UseRangesCheck.cpp
A clang-tools-extra/clang-tidy/utils/UseRangesCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/boost/use-ranges.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/docs/clang-tidy/checks/modernize/use-ranges.rst
A clang-tools-extra/test/clang-tidy/checkers/boost/use-ranges.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move.cpp
A clang-tools-extra/test/clang-tidy/checkers/modernize/use-ranges.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/BuiltinsAArch64.def
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Driver/Options.td
M clang/include/clang/Sema/DeclSpec.h
M clang/include/clang/Support/RISCVVIntrinsicUtils.h
M clang/lib/AST/Decl.cpp
M clang/lib/AST/Interp/Disasm.cpp
M clang/lib/AST/Interp/InterpBlock.cpp
M clang/lib/Basic/Targets/LoongArch.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExprComplex.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
M clang/lib/Driver/ToolChains/Arch/RISCV.h
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Headers/float.h
M clang/lib/Headers/intrin.h
M clang/lib/Index/USRGeneration.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaCodeComplete.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Support/RISCVVIntrinsicUtils.cpp
M clang/test/AST/Interp/lifetimes.cpp
M clang/test/AST/Interp/records.cpp
A clang/test/C/C2y/n3254.c
A clang/test/C/C2y/n3274.c
M clang/test/CodeGen/RISCV/abi-empty-structs.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vcreate.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vget.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlmul_ext_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlmul_trunc_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vreinterpret.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vset.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/bfloat16/vundefined.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/sf_vfwmacc_4x4x4.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vfwmaccbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vget.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlmul_ext_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlmul_trunc_v.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vreinterpret.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vset.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsoxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vssseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vsuxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/sf_vfwmacc_4x4x4.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vfwmaccbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/sf_vfwmacc_4x4x4.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vfwmaccbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vle16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vle16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlse16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg2e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg3e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg4e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg5e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg6e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg7e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg8e16ff.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg2e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg3e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg4e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg5e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg6e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg7e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlsseg8e16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg2ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg3ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg4ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg5ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg6ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg7ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg8ei16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/sf_vfwmacc_4x4x4.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfncvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwcvtbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vfwmaccbf16.c
M clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/rvv-intrinsic-datatypes.cpp
M clang/test/CodeGen/arm64-microsoft-intrinsics.c
A clang/test/CodeGen/constexpr-c23-internal-linkage.c
M clang/test/CodeGen/sanitize-metadata-ignorelist.c
M clang/test/CodeGen/sanitize-metadata-nosanitize.c
M clang/test/CodeGen/sanitize-metadata.c
M clang/test/CodeGen/stdcall-fastcall.c
M clang/test/CodeGen/vectorcall.c
M clang/test/Driver/aarch64-v81a.c
M clang/test/Driver/aarch64-v82a.c
M clang/test/Driver/aarch64-v83a.c
M clang/test/Driver/aarch64-v84a.c
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M clang/test/Driver/aarch64-v94a.c
M clang/test/Driver/aarch64-v95a.c
M clang/test/Driver/aarch64-v9a.c
M clang/test/Driver/frame-pointer.c
A clang/test/Driver/loongarch-msimd.c
A clang/test/Driver/print-enabled-extensions/aarch64-a64fx.c
A clang/test/Driver/print-enabled-extensions/aarch64-ampere1.c
A clang/test/Driver/print-enabled-extensions/aarch64-ampere1a.c
A clang/test/Driver/print-enabled-extensions/aarch64-ampere1b.c
A clang/test/Driver/print-enabled-extensions/aarch64-apple-a10.c
A clang/test/Driver/print-enabled-extensions/aarch64-apple-a11.c
A clang/test/Driver/print-enabled-extensions/aarch64-apple-a12.c
A clang/test/Driver/print-enabled-extensions/aarch64-apple-a13.c
A clang/test/Driver/print-enabled-extensions/aarch64-apple-a14.c
A clang/test/Driver/print-enabled-extensions/aarch64-apple-a15.c
A clang/test/Driver/print-enabled-extensions/aarch64-apple-a16.c
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A clang/test/Driver/print-enabled-extensions/aarch64-apple-a7.c
A clang/test/Driver/print-enabled-extensions/aarch64-apple-m4.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv8-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv8-r.c
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A clang/test/Driver/print-enabled-extensions/aarch64-armv8.6-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv8.7-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv8.8-a.c
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A clang/test/Driver/print-enabled-extensions/aarch64-armv9.2-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv9.3-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv9.4-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-armv9.5-a.c
A clang/test/Driver/print-enabled-extensions/aarch64-carmel.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a34.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a35.c
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A clang/test/Driver/print-enabled-extensions/aarch64-cortex-a78c.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-r82.c
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A clang/test/Driver/print-enabled-extensions/aarch64-cortex-x1.c
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A clang/test/Driver/print-enabled-extensions/aarch64-cortex-x2.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-x3.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-x4.c
A clang/test/Driver/print-enabled-extensions/aarch64-cortex-x925.c
A clang/test/Driver/print-enabled-extensions/aarch64-exynos-m3.c
A clang/test/Driver/print-enabled-extensions/aarch64-exynos-m4.c
A clang/test/Driver/print-enabled-extensions/aarch64-exynos-m5.c
A clang/test/Driver/print-enabled-extensions/aarch64-falkor.c
A clang/test/Driver/print-enabled-extensions/aarch64-generic.c
A clang/test/Driver/print-enabled-extensions/aarch64-kryo.c
A clang/test/Driver/print-enabled-extensions/aarch64-neoverse-512tvb.c
A clang/test/Driver/print-enabled-extensions/aarch64-neoverse-e1.c
A clang/test/Driver/print-enabled-extensions/aarch64-neoverse-n1.c
A clang/test/Driver/print-enabled-extensions/aarch64-neoverse-n2.c
A clang/test/Driver/print-enabled-extensions/aarch64-neoverse-n3.c
A clang/test/Driver/print-enabled-extensions/aarch64-neoverse-v1.c
A clang/test/Driver/print-enabled-extensions/aarch64-neoverse-v2.c
A clang/test/Driver/print-enabled-extensions/aarch64-neoverse-v3.c
A clang/test/Driver/print-enabled-extensions/aarch64-neoverse-v3ae.c
A clang/test/Driver/print-enabled-extensions/aarch64-oryon-1.c
A clang/test/Driver/print-enabled-extensions/aarch64-saphira.c
A clang/test/Driver/print-enabled-extensions/aarch64-thunderx.c
A clang/test/Driver/print-enabled-extensions/aarch64-thunderx2t99.c
A clang/test/Driver/print-enabled-extensions/aarch64-thunderx3t110.c
A clang/test/Driver/print-enabled-extensions/aarch64-thunderxt81.c
A clang/test/Driver/print-enabled-extensions/aarch64-thunderxt83.c
A clang/test/Driver/print-enabled-extensions/aarch64-thunderxt88.c
A clang/test/Driver/print-enabled-extensions/aarch64-tsv110.c
A clang/test/Driver/print-supported-extensions-aarch64.c
A clang/test/Driver/print-supported-extensions-arm.c
A clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/print-supported-extensions.c
M clang/test/Headers/float.c
A clang/test/Index/USR/func-template.cpp
A clang/test/Modules/use-after-free-2.c
A clang/test/OpenMP/requires_default_atomic_mem_order.cpp
M clang/test/Preprocessor/init-loongarch.c
M clang/test/Sema/builtins-microsoft-arm64.c
M clang/test/Sema/riscv-types.c
M clang/utils/TableGen/RISCVVEmitter.cpp
M clang/www/c_status.html
M compiler-rt/lib/builtins/cpu_model/x86.c
M compiler-rt/lib/scudo/standalone/allocator_config.def
M flang/include/flang/Optimizer/Builder/IntrinsicCall.h
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/config/baremetal/arm/entrypoints.txt
M libc/config/baremetal/riscv/entrypoints.txt
M libc/config/config.json
M libc/config/darwin/arm/entrypoints.txt
M libc/config/gpu/config.json
M libc/config/gpu/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/windows/entrypoints.txt
M libc/docs/configure.rst
M libc/docs/math/index.rst
M libc/include/llvm-libc-macros/math-macros.h
M libc/newhdrgen/class_implementation/classes/function.py
M libc/newhdrgen/tests/test_integration.py
M libc/newhdrgen/yaml/inttypes.yaml
M libc/newhdrgen/yaml/pthread.yaml
M libc/newhdrgen/yaml/sched.yaml
M libc/newhdrgen/yaml/signal.yaml
M libc/newhdrgen/yaml/stdio.yaml
M libc/newhdrgen/yaml/stdlib.yaml
M libc/newhdrgen/yaml/string.yaml
M libc/newhdrgen/yaml/sys_mman.yaml
A libc/newhdrgen/yaml/sys_syscall.yaml
M libc/newhdrgen/yaml/sys_types.yaml
M libc/newhdrgen/yaml/termios.yaml
M libc/newhdrgen/yaml/threads.yaml
M libc/newhdrgen/yaml/time.yaml
M libc/newhdrgen/yaml/unistd.yaml
M libc/spec/stdc.td
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/FEnvImpl.h
M libc/src/__support/File/file.cpp
M libc/src/__support/File/file.h
M libc/src/__support/File/linux/file.cpp
M libc/src/__support/File/linux/file.h
M libc/src/__support/block.h
M libc/src/math/CMakeLists.txt
M libc/src/math/amdgpu/CMakeLists.txt
A libc/src/math/cbrtf.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/cbrtf.cpp
M libc/src/math/generic/tan.cpp
M libc/src/math/nvptx/CMakeLists.txt
M libc/src/math/nvptx/llrint.cpp
M libc/src/math/nvptx/llrintf.cpp
M libc/src/math/nvptx/lrint.cpp
M libc/src/stdio/baremetal/CMakeLists.txt
A libc/src/stdio/baremetal/puts.cpp
M libc/src/stdio/fopencookie.cpp
M libc/src/stdio/generic/ftell.cpp
M libc/src/stdio/scanf_core/CMakeLists.txt
M libc/src/sys/mman/linux/mmap.cpp
M libc/src/sys/statvfs/linux/statfs_utils.h
M libc/src/unistd/linux/pread.cpp
M libc/src/unistd/linux/pwrite.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/File/file_test.cpp
M libc/test/src/math/CMakeLists.txt
M libc/test/src/math/RoundToIntegerTest.h
A libc/test/src/math/cbrtf_test.cpp
M libc/test/src/math/exhaustive/CMakeLists.txt
A libc/test/src/math/exhaustive/cbrtf_test.cpp
M libc/test/src/math/exhaustive/exhaustive_test.h
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/RoundToIntegerTest.h
A libc/test/src/math/smoke/cbrtf_test.cpp
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/MPFRWrapper/MPFRUtils.h
M libcxx/docs/FeatureTestMacroTable.rst
M libcxx/docs/Status/Cxx2c.rst
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/docs/Status/Cxx2cPapers.csv
M libcxx/include/version
M libcxx/modules/std.compat.cppm.in
M libcxx/modules/std.cppm.in
M libcxx/test/std/language.support/support.limits/support.limits.general/execution.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/new.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/optional.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/random.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/type_traits.version.compile.pass.cpp
M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
A libcxx/test/std/numerics/complex.number/complex/bit_cast.pass.cpp
M libcxx/utils/generate_feature_test_macro_components.py
M libcxx/utils/libcxx/header_information.py
M libcxxabi/src/cxa_exception_storage.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/ObjC.cpp
M lld/test/ELF/riscv-attributes.s
A lld/test/MachO/implicit-and-allowable-clients.test
A lld/test/MachO/objc-category-merging-swift-class-ext.s
M lldb/examples/synthetic/gnu_libstdcpp.py
M lldb/include/lldb/Symbol/ObjectFile.h
M lldb/include/lldb/Utility/Listener.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
M lldb/source/API/SBAttachInfo.cpp
M lldb/source/API/SBLaunchInfo.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxx.h
M lldb/source/Plugins/Language/CPlusPlus/LibCxxMap.cpp
M lldb/source/Plugins/Language/CPlusPlus/LibCxxUnorderedMap.cpp
M lldb/source/Symbol/ObjectFile.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Utility/Listener.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/iterator/TestDataFormatterLibccIterator.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/iterator/main.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/variant/TestDataFormatterLibStdcxxVariant.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/variant/main.cpp
M lldb/test/API/functionalities/unwind/zeroth_frame/TestZerothFrame.py
M lldb/test/API/python_api/global_module_cache/TestGlobalModuleCache.py
M lldb/test/Shell/ObjectFile/PECOFF/invalid-export-table.yaml
M llvm/docs/CommandGuide/llvm-objcopy.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm/Analysis/ValueLattice.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/Bitcode/BitcodeWriter.h
M llvm/include/llvm/CodeGen/LiveVariables.h
M llvm/include/llvm/CodeGen/MachineLoopInfo.h
M llvm/include/llvm/CodeGen/SlotIndexes.h
A llvm/include/llvm/IR/DbgVariableFragmentInfo.h
M llvm/include/llvm/IR/DebugInfoMetadata.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LTO/legacy/ThinLTOCodeGenerator.h
A llvm/include/llvm/MC/MCELFExtras.h
M llvm/include/llvm/MC/MCPseudoProbe.h
M llvm/include/llvm/ObjCopy/CommonConfig.h
M llvm/include/llvm/Object/ELF.h
M llvm/include/llvm/Object/ELFObjectFile.h
M llvm/include/llvm/Object/ELFTypes.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/include/llvm/Transforms/IPO/FunctionImport.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/EarlyIfConversion.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/LazyMachineBlockFrequencyInfo.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/LiveStacks.cpp
M llvm/lib/CodeGen/LiveVariables.cpp
M llvm/lib/CodeGen/MIRSampleProfile.cpp
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
M llvm/lib/CodeGen/MLRegAllocPriorityAdvisor.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineBlockFrequencyInfo.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineCombiner.cpp
M llvm/lib/CodeGen/MachineFunctionPrinterPass.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachineLoopInfo.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/MachineTraceMetrics.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/ModuloSchedule.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/PeepholeOptimizer.cpp
M llvm/lib/CodeGen/PostRASchedulerList.cpp
M llvm/lib/CodeGen/PrologEpilogInserter.cpp
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocPBQP.cpp
M llvm/lib/CodeGen/RegAllocPriorityAdvisor.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/ShrinkWrap.cpp
M llvm/lib/CodeGen/SlotIndexes.cpp
M llvm/lib/CodeGen/StackColoring.cpp
M llvm/lib/CodeGen/StackSlotColoring.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/CodeGen/UnreachableBlockElim.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/CodeGen/XRayInstrumentation.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCPseudoProbe.cpp
M llvm/lib/ObjCopy/ConfigManager.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
M llvm/lib/Object/ELF.cpp
M llvm/lib/Object/ELFObjectFile.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
M llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp
M llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.cpp
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/R600MachineCFGStructurizer.cpp
M llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
M llvm/lib/Target/AMDGPU/R600Packetizer.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/lib/Target/ARM/ARMBlockPlacement.cpp
M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
M llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp
M llvm/lib/Target/Hexagon/HexagonCopyHoisting.cpp
M llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
M llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
M llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
M llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
M llvm/lib/Target/Hexagon/HexagonTfrCleanup.cpp
M llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
M llvm/lib/Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
M llvm/lib/Target/PowerPC/PPCCTRLoops.cpp
M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
M llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/lib/Target/X86/X86.h
M llvm/lib/Target/X86/X86CmovConversion.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
M llvm/lib/Target/X86/X86PreTileConfig.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
A llvm/lib/Target/X86/X86WinFixupBufferSecurityCheck.cpp
M llvm/lib/TargetParser/Host.cpp
M llvm/lib/Transforms/IPO/FunctionImport.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerBinaryMetadata.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-udiv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-dup.mir
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
A llvm/test/CodeGen/AArch64/arm64-hlt.ll
A llvm/test/CodeGen/AArch64/asm-ld1-wrong-constraint.ll
M llvm/test/CodeGen/AArch64/cmp-to-cmn.ll
A llvm/test/CodeGen/AArch64/ctlz_zero_undef.ll
M llvm/test/CodeGen/AArch64/neon-mov.ll
A llvm/test/CodeGen/AArch64/sitofp-to-tbl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir
M llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
A llvm/test/CodeGen/AMDGPU/insert-skips-gfx10.mir
A llvm/test/CodeGen/AMDGPU/insert-skips-gfx12.mir
M llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-bitcounts.mir
M llvm/test/CodeGen/Hexagon/bitmanip.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-args.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-ret.ll
M llvm/test/CodeGen/RISCV/atomic-load-store.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/bfloat-arith.ll
M llvm/test/CodeGen/RISCV/bfloat-br-fcmp.ll
M llvm/test/CodeGen/RISCV/bfloat-convert.ll
M llvm/test/CodeGen/RISCV/bfloat-fcmp.ll
M llvm/test/CodeGen/RISCV/bfloat-frem.ll
M llvm/test/CodeGen/RISCV/bfloat-imm.ll
M llvm/test/CodeGen/RISCV/bfloat-isnan.ll
M llvm/test/CodeGen/RISCV/bfloat-mem.ll
M llvm/test/CodeGen/RISCV/bfloat-select-fcmp.ll
M llvm/test/CodeGen/RISCV/bfloat-select-icmp.ll
M llvm/test/CodeGen/RISCV/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/RISCV/forced-atomics.ll
M llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64xtheadbb.ll
M llvm/test/CodeGen/RISCV/rvv/ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fpext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-load-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfpext-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfptrunc-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-masked-vops.ll
M llvm/test/CodeGen/RISCV/rvv/select-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/sf_vfwmacc_4x4x4.ll
M llvm/test/CodeGen/RISCV/rvv/vfncvtbf16-f-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfpext-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfpext-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfpext-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwcvtbf16-f-f.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vfwmaccbf16.ll
M llvm/test/CodeGen/RISCV/rvv/vle.ll
M llvm/test/CodeGen/RISCV/rvv/vpload.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vse.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-vp-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-bf16.ll
M llvm/test/CodeGen/RISCV/zfbfmin.ll
M llvm/test/CodeGen/SystemZ/scalar-ctlz-01.ll
M llvm/test/CodeGen/VE/Scalar/ctlz.ll
M llvm/test/CodeGen/X86/ctlo.ll
M llvm/test/CodeGen/X86/ctlz.ll
A llvm/test/CodeGen/X86/live-vars.ll
M llvm/test/CodeGen/X86/lzcnt.ll
A llvm/test/CodeGen/X86/machine-loops.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/test/CodeGen/X86/pr38539.ll
A llvm/test/CodeGen/X86/pr97968.ll
A llvm/test/CodeGen/X86/slot-indexes.ll
M llvm/test/CodeGen/X86/stack-protector-msvc.ll
M llvm/test/CodeGen/X86/tailcc-ssp.ll
M llvm/test/DebugInfo/Generic/assignment-tracking/slp-vectorizer/merge-scalars.ll
M llvm/test/Instrumentation/SanitizerBinaryMetadata/atomics.ll
M llvm/test/Instrumentation/SanitizerBinaryMetadata/ctor.ll
M llvm/test/MC/RISCV/attribute-arch-invalid.s
M llvm/test/MC/RISCV/fp-default-rounding-mode.s
M llvm/test/MC/RISCV/rv32zfbfmin-invalid.s
M llvm/test/MC/RISCV/rv32zfbfmin-valid.s
M llvm/test/MC/RISCV/rvv/zvfbfmin.s
M llvm/test/MC/RISCV/rvv/zvfbfwma-invalid.s
M llvm/test/MC/RISCV/rvv/zvfbfwma.s
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-variadics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
M llvm/test/ThinLTO/X86/import_callee_declaration.ll
A llvm/test/Transforms/Inline/pr97590.ll
A llvm/test/Transforms/LoopUnroll/peel-loop-scev-invalidate-with-overflow-inst.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
A llvm/test/Transforms/LoopVectorize/X86/ephemeral-recipes.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-di.ll
M llvm/test/Transforms/SLPVectorizer/SystemZ/pr34619.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-add-ssat.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-add-usat.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-add.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fix.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshl.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr-rot.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-fshr.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-mul.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-smax.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-smin.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-sub-ssat.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-sub-usat.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-sub.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-umax.ll
M llvm/test/Transforms/SLPVectorizer/X86/arith-umin.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelement-single-use-many-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractlements-gathered-first-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/reordering-single-phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/shift-ashr.ll
M llvm/test/Transforms/SLPVectorizer/X86/shift-lshr.ll
M llvm/test/Transforms/SLPVectorizer/X86/shift-shl.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-casts.ll
A llvm/test/tools/llvm-objcopy/ELF/change-section-lma.test
A llvm/test/tools/llvm-objcopy/ELF/crel.test
M llvm/test/tools/llvm-objcopy/ELF/reloc-error-remove-symtab.test
M llvm/test/tools/llvm-objcopy/ELF/strip-reloc-symbol.test
A llvm/test/tools/llvm-objdump/ELF/crel.test
M llvm/test/tools/llvm-objdump/X86/elf-disassemble-relocs.test
M llvm/tools/llvm-lto/llvm-lto.cpp
M llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
M llvm/tools/llvm-objcopy/ObjcopyOpts.td
M llvm/tools/llvm-objdump/ELFDump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-profgen/ProfiledBinary.h
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
M llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
M llvm/unittests/IR/MetadataTest.cpp
M llvm/unittests/MI/LiveIntervalTest.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/boost/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/modernize/BUILD.gn
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/utils/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
M llvm/utils/mlgo-utils/README.md
M llvm/utils/mlgo-utils/mlgo/__init__.py
M llvm/utils/mlgo-utils/pyproject.toml
M mlir/include/mlir-c/IR.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/lib/CAPI/IR/IR.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/Linalg/Transforms/DataLayoutPropagation.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/CAPI/CMakeLists.txt
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Dialect/Linalg/data-layout-propagation.mlir
M mlir/test/Dialect/Linalg/vectorization-scalable.mlir
M mlir/test/Dialect/Linalg/vectorize-tensor-extract-masked.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
A mlir/test/Integration/Dialect/Arith/CPU/addition.mlir
A mlir/test/Integration/Dialect/Arith/CPU/multiplication.mlir
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
M mlir/test/Target/LLVMIR/openmp-llvm.mlir
M mlir/test/lib/Dialect/Linalg/TestDataLayoutPropagation.cpp
M utils/bazel/llvm-project-overlay/clang-tools-extra/clang-tidy/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.4
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/72040d390615...b0bc3cae353c
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