[all-commits] [llvm/llvm-project] 19cc46: [RISCV] Use VP strided load in concat_vectors comb...

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 19cc46144d10964a55cc7e7f3abeeba5f8c161ba
      https://github.com/llvm/llvm-project/commit/19cc46144d10964a55cc7e7f3abeeba5f8c161ba
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-07-09 (Tue, 09 Jul 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-combine.ll

  Log Message:
  -----------
  [RISCV] Use VP strided load in concat_vectors combine (#98131)



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