[all-commits] [llvm/llvm-project] 3f83a6: [RISCV] Allow folding vmerge into masked ops when ...

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 3f83a69bcb2c6b5fa3efbc41d1822e6fa69a6620
      https://github.com/llvm/llvm-project/commit/3f83a69bcb2c6b5fa3efbc41d1822e6fa69a6620
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-07-09 (Tue, 09 Jul 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-masked-vops.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwmacc-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vpload.ll

  Log Message:
  -----------
  [RISCV] Allow folding vmerge into masked ops when mask is the same (#97989)

We currently only fold a vmerge into a masked true operand if the vmerge
has an all-ones mask, since we end up keeping the mask from the true
operand.

But if the masks are the same then we can still fold, because vmerge and
true have the same passthru. If an element was masked off in the
original vmerge, it will also be masked off in the resulting true, and
will have the same passthru value.

The motivation for this is to lower masked VP loads and stores with
passthrus to masked RVV instructions. Normally you can express a masked
RVV instruction with a mask undisturbed passthru via a combination of a
VP op with an all-ones mask and a vp.merge. But for loads and stores you
need the same mask on the VP op as well as the vp.merge.



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