[all-commits] [llvm/llvm-project] 4010f8: [CodeGen][NewPM] Port `SlotIndexes` to new pass ma...

[paperchalice via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4010f894a1e880f88bda78a49a8bece5affaa848
      https://github.com/llvm/llvm-project/commit/4010f894a1e880f88bda78a49a8bece5affaa848
  Author: paperchalice <liujunchang97 at outlook.com>
  Date:   2024-07-09 (Tue, 09 Jul 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/SlotIndexes.h
    M llvm/include/llvm/InitializePasses.h
    M llvm/include/llvm/Passes/MachinePassRegistry.def
    M llvm/lib/CodeGen/CodeGen.cpp
    M llvm/lib/CodeGen/LiveIntervals.cpp
    M llvm/lib/CodeGen/LiveStacks.cpp
    M llvm/lib/CodeGen/MLRegAllocPriorityAdvisor.cpp
    M llvm/lib/CodeGen/MachineBasicBlock.cpp
    M llvm/lib/CodeGen/MachineFunctionPrinterPass.cpp
    M llvm/lib/CodeGen/MachineScheduler.cpp
    M llvm/lib/CodeGen/MachineVerifier.cpp
    M llvm/lib/CodeGen/PHIElimination.cpp
    M llvm/lib/CodeGen/RegAllocBasic.cpp
    M llvm/lib/CodeGen/RegAllocGreedy.cpp
    M llvm/lib/CodeGen/RegAllocPBQP.cpp
    M llvm/lib/CodeGen/RegAllocPriorityAdvisor.cpp
    M llvm/lib/CodeGen/RegisterCoalescer.cpp
    M llvm/lib/CodeGen/RenameIndependentSubregs.cpp
    M llvm/lib/CodeGen/SlotIndexes.cpp
    M llvm/lib/CodeGen/StackColoring.cpp
    M llvm/lib/CodeGen/StackSlotColoring.cpp
    M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
    M llvm/lib/CodeGen/VirtRegMap.cpp
    M llvm/lib/Passes/PassBuilder.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp
    M llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.cpp
    M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
    M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
    M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
    M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
    M llvm/lib/Target/Hexagon/HexagonCopyHoisting.cpp
    M llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
    M llvm/lib/Target/Hexagon/HexagonTfrCleanup.cpp
    M llvm/lib/Target/LoongArch/LoongArchDeadRegisterDefinitions.cpp
    M llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
    M llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
    M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
    A llvm/test/CodeGen/X86/slot-indexes.ll

  Log Message:
  -----------
  [CodeGen][NewPM] Port `SlotIndexes` to new pass manager (#97941)

- Add `SlotIndexesAnalysis`.
- Add `SlotIndexesPrinterPass`.
- Use `SlotIndexesWrapperPass` in legacy pass.



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