[all-commits] [llvm/llvm-project] 03d433: [RISCV] Pack build_vectors into largest available ...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 03d4332625d13014ac94dcd145f538fbfe4c4d0c
      https://github.com/llvm/llvm-project/commit/03d4332625d13014ac94dcd145f538fbfe4c4d0c
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-07-08 (Mon, 08 Jul 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll

  Log Message:
  -----------
  [RISCV] Pack build_vectors into largest available element type (#97351)

Our worst case build_vector lowering is a serial chain of vslide1down.vx
operations which creates a serial dependency chain through a relatively
high latency operation. We can instead pack together elements into ELEN
sized chunks, and move them from integer to scalar in a single
operation.

This reduces the length of the serial chain on the vector side, and
costs at most three scalar instructions per element. This is a win for
all cores when the sum of the latencies of the scalar instructions is
less than the vslide1down.vx being replaced, and is particularly
profitable for out-of-order cores which can overlap the scalar
computation.

This patch is restricted to configurations with zba and zbb. Without
both, the zero extend might require two instructions which would bring
the total scalar instructions per element to 4. zba and zba are both
present in the rva22u64 baseline which is looking to be quite common for
hardware in practice; we could extend this to systems without bitmanip
with a bit of extra effort.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications