[all-commits] [llvm/llvm-project] 90109d: [RISCV] Improve constant materialisation for store...

Alex Bradbury via All-commits all-commits at lists.llvm.org
Tue May 14 11:08:26 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 90109d444839683b09f0aafdc50b749cb4b3203b
      https://github.com/llvm/llvm-project/commit/90109d444839683b09f0aafdc50b749cb4b3203b
  Author: Alex Bradbury <asb at igalia.com>
  Date:   2024-05-14 (Tue, 14 May 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
    M llvm/test/CodeGen/RISCV/imm.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-formation.ll
    M llvm/test/CodeGen/RISCV/unaligned-load-store.ll

  Log Message:
  -----------
  [RISCV] Improve constant materialisation for stores of i8 negative constants (#92131)

This follows the same pattern as 20e62658735a1b03ecadc. Although we
can't reduce the number of instructions used, if we are able to use a
sign-extended 6-bit immediate then the 16-bit c.li instruction can be
selected (thus saving code size). Although this _could_ be gated so it
only happens if C is enabled, I've opted not to because at worst it's
neutral and it doesn't seem helpful to add unnecessary divergence
between the RVC and non-RVC paths.



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