[all-commits] [llvm/llvm-project] 8b400d: [X86] Enable TuningSlowDivide64 on Barcelona/Bobca...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8b400de79eff2a4fb95f06b6e4d167e65abbf448
      https://github.com/llvm/llvm-project/commit/8b400de79eff2a4fb95f06b6e4d167e65abbf448
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-05-09 (Thu, 09 May 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86.td
    M llvm/test/CodeGen/X86/bypass-slow-division-64.ll

  Log Message:
  -----------
  [X86] Enable TuningSlowDivide64 on Barcelona/Bobcat/Bulldozer/Ryzen Families (#91277)

Despite most AMD cpus having a lower latency for i64 divisions that converge early, we are still better off testing for values representable as i32 and performing a i32 division if possible.

All AMD cpus appear to have been missed when we added the "idivq-to-divl" attribute - this patch now matches Intel cpu behaviour (and the x86-64/v2/3/4 levels).

Unfortunately the difference in code scheduling means I've had to stop using the update_llc_test_checks script and just use old-fashioned CHECK-DAG checks for divl/divq pairs.

Fixes #90985



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