[all-commits] [llvm/llvm-project] 856313: [MLIR][Interfaces] Change MemorySlotInterface to u...
Christian Ulmann via All-commits
all-commits at lists.llvm.org
Wed May 8 01:11:09 PDT 2024
Branch: refs/heads/users/dinistro/change-memory-slot-interface-to-builders
Home: https://github.com/llvm/llvm-project
Commit: 8563136c648979de0618b5e0c4bd9c79c601de9f
https://github.com/llvm/llvm-project/commit/8563136c648979de0618b5e0c4bd9c79c601de9f
Author: Christian Ulmann <christian.ulmann at nextsilicon.com>
Date: 2024-05-07 (Tue, 07 May 2024)
Changed paths:
M mlir/include/mlir/Interfaces/MemorySlotInterfaces.td
M mlir/include/mlir/Transforms/Mem2Reg.h
M mlir/include/mlir/Transforms/SROA.h
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefMemorySlot.cpp
M mlir/lib/Transforms/Mem2Reg.cpp
M mlir/lib/Transforms/SROA.cpp
Log Message:
-----------
[MLIR][Interfaces] Change MemorySlotInterface to use OpBuilder
This commit changes the `MemorySlotInterface` back to using `OpBuilder`
instead of a rewriter. This was originally introduced in
https://reviews.llvm.org/D150432 but it was shown that patterns are a
bad idea for both Mem2Reg and SROA.
Mem2Reg suffers from the usage of a rewriter due to neing forced to
create new basic blocks. This is an issue, as it leads to the
invalidation of the dominance information, which can be expensive to
recompute.
Commit: a1505b6307026af07d62bc5db5758b1c84559a71
https://github.com/llvm/llvm-project/commit/a1505b6307026af07d62bc5db5758b1c84559a71
Author: Christian Ulmann <christian.ulmann at nextsilicon.com>
Date: 2024-05-08 (Wed, 08 May 2024)
Changed paths:
M mlir/include/mlir/Transforms/Mem2Reg.h
M mlir/lib/Transforms/Mem2Reg.cpp
Log Message:
-----------
[MLIR][Mem2Reg] Improve performance by avoiding recomputations
This commit ensures that Mem2Reg reuses the `DominanceInfo` as well as
block index maps to avoid expensive recomputations. Due to the recent
migration to `OpBuilder`, the promotion of a slot does no longer replace
blocks. Having stable blocks makes the `DominanceInfo` preservable and
additionally allows to cache block index maps between different
promotions.
Performance measurements on very large functions show an up to 4x
speedup by these changes.
Compare: https://github.com/llvm/llvm-project/compare/8563136c6489%5E...a1505b630702
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