[all-commits] [llvm/llvm-project] 080978: [DirectX][DXIL] Set DXIL Version in DXIL target tr...

Krzysztof Parzyszek via All-commits all-commits at lists.llvm.org
Tue May 7 06:55:30 PDT 2024


  Branch: refs/heads/users/kparzysz/spr/d09-recurse
  Home:   https://github.com/llvm/llvm-project
  Commit: 080978dd2067d0c9ea7e229aa7696c2480d89ef1
      https://github.com/llvm/llvm-project/commit/080978dd2067d0c9ea7e229aa7696c2480d89ef1
  Author: S. Bharadwaj Yadavalli <Bharadwaj.Yadavalli at microsoft.com>
  Date:   2024-05-06 (Mon, 06 May 2024)

  Changed paths:
    M clang/lib/Basic/Targets.cpp
    M clang/lib/Driver/ToolChains/HLSL.cpp
    M clang/test/CodeGenHLSL/basic-target.c
    M clang/test/Driver/dxc_dxv_path.hlsl
    M clang/test/Options/enable_16bit_types_validation.hlsl
    M clang/unittests/Driver/DXCModeTest.cpp
    M llvm/include/llvm/TargetParser/Triple.h
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/TargetParser/Triple.cpp
    M llvm/unittests/TargetParser/TripleTest.cpp

  Log Message:
  -----------
  [DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version (#90809)

An earlier commit provided a way to decouple DXIL version from Shader
Model version by representing the DXIL version as `SubArch` in the DXIL 
Target Triple and adding corresponding valid DXIL Arch types.

This change constructs DXIL target triple with DXIL version that is
deduced from Shader Model version specified in the following scenarios:

1. When compilation target profile is specified: 
For e.g., DXIL target triple `dxilv1.8-unknown-shader6.8-library` is
constructed when `-T lib_6_8` is specified. 
2. When DXIL target triple without DXIL version is specified:
For e.g., DXIL target triple `dxilv1.8-pc-shadermodel6.8-library` is
constructed when `-mtriple=dxil-pc-shadermodel6.8-library` is specified.

Updated relevant HLSL tests that check for target triple. 

Validated that Clang (`check-clang`) and LLVM (`check-llvm`) regression
tests pass.


  Commit: ee9ca120e037b668c5d26853719368490a71fd40
      https://github.com/llvm/llvm-project/commit/ee9ca120e037b668c5d26853719368490a71fd40
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2024-05-06 (Mon, 06 May 2024)

  Changed paths:
    M flang/include/flang/Semantics/tools.h
    M flang/test/Lower/CUDA/cuda-data-attribute.cuf

  Log Message:
  -----------
  [flang][cuda] Avoid generating wrong fir.cuda_free op (#91255)

fir.cuda_free operation was wrongly generated for dummy argument.


  Commit: 096f85e827b6fdf52ff1f8d99aa8335a885b46a1
      https://github.com/llvm/llvm-project/commit/096f85e827b6fdf52ff1f8d99aa8335a885b46a1
  Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
  Date:   2024-05-06 (Mon, 06 May 2024)

  Changed paths:
    M libc/src/__support/CPP/atomic.h

  Log Message:
  -----------
  [libc] add more APIs of cmgxchg variants (#91208)

Such APIs are useful in lock implementations


  Commit: 29d447a6e446e7fd78bd28af28bbf7dd377ade10
      https://github.com/llvm/llvm-project/commit/29d447a6e446e7fd78bd28af28bbf7dd377ade10
  Author: Ian Anderson <iana at apple.com>
  Date:   2024-05-06 (Mon, 06 May 2024)

  Changed paths:
    M clang-tools-extra/clang-include-fixer/find-all-symbols/STLPostfixHeaderMap.cpp
    M clang-tools-extra/clangd/index/CanonicalIncludes.cpp
    M clang/lib/Headers/CMakeLists.txt
    A clang/lib/Headers/__stdarg_header_macro.h
    A clang/lib/Headers/__stddef_header_macro.h
    M clang/lib/Headers/module.modulemap
    M clang/lib/Headers/stdarg.h
    M clang/lib/Headers/stddef.h
    M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn

  Log Message:
  -----------
  [clang][modules] stdarg.h and stddef.h shouldn't directly declare anything (#90676)

stdarg.h and especially stddef.h are textual and so everything they
declare gets precompiled into all of their clients' pcm files. They
shouldn't directly declare anything though, their purpose is to select
what submodules get imported, and not to add duplicate declarations to
all of their clients. Make it so that they always ignore their header
guards, even without modules, and declare them in separate header files
so that they only go into the stdarg/stddef pcms. Still declare them in
case clients rely on them.


  Commit: b86accceee0c7c5d36ecdc1629d00e6303f29955
      https://github.com/llvm/llvm-project/commit/b86accceee0c7c5d36ecdc1629d00e6303f29955
  Author: Ryosuke Niwa <rniwa at webkit.org>
  Date:   2024-05-06 (Mon, 06 May 2024)

  Changed paths:
    M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
    M clang/test/Analysis/Checkers/WebKit/call-args.cpp

  Log Message:
  -----------
  [alpha.webkit.UncountedCallArgsChecker] Treat (foo())->bar() like foo()->bar(). (#91052)


  Commit: 6d6693e9f5376ac8c809a36e1ba4a8c47f311a70
      https://github.com/llvm/llvm-project/commit/6d6693e9f5376ac8c809a36e1ba4a8c47f311a70
  Author: Ryosuke Niwa <rniwa at webkit.org>
  Date:   2024-05-06 (Mon, 06 May 2024)

  Changed paths:
    M clang/lib/StaticAnalyzer/Checkers/WebKit/RefCntblBaseVirtualDtorChecker.cpp
    M clang/test/Analysis/Checkers/WebKit/ref-cntbl-base-virtual-dtor-templates.cpp

  Log Message:
  -----------
  [webkit.RefCntblBaseVirtualDtor] Ignore WTF::RefCounted<T> and its variants missing virtual destructor (#91009)


  Commit: 2287f8d2353dadcbe210e07776c927c9fabca57c
      https://github.com/llvm/llvm-project/commit/2287f8d2353dadcbe210e07776c927c9fabca57c
  Author: antangelo <contact at antangelo.com>
  Date:   2024-05-06 (Mon, 06 May 2024)

  Changed paths:
    M llvm/test/CodeGen/X86/dynamic-regmask-preserve-none.ll

  Log Message:
  -----------
  [NFC][X86] Fix check directive typo in preserve_none dynamic regmask test (#91048)

Fixes an inactive check line and updates the check to match output and
other cases.


  Commit: 6e5ed351be68017e46120b8ad1aa89d75b0ca204
      https://github.com/llvm/llvm-project/commit/6e5ed351be68017e46120b8ad1aa89d75b0ca204
  Author: alx32 <103613512+alx32 at users.noreply.github.com>
  Date:   2024-05-06 (Mon, 06 May 2024)

  Changed paths:
    M lld/MachO/ObjC.cpp

  Log Message:
  -----------
  [lld-macho] Fix category merging category map non-determinism (#91159)

Currently in `ObjcCategoryMerger::doMerge` and
`generateCatListForNonErasedCategories` we use maps of pointers which
leads to non-determinism. Switch instead to using `MapVector` which
preserves determinism.


  Commit: 924384161ffceda08099536dd07a953299a69b53
      https://github.com/llvm/llvm-project/commit/924384161ffceda08099536dd07a953299a69b53
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M llvm/include/llvm/Analysis/CFG.h
    M llvm/lib/Analysis/CFG.cpp
    M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
    R llvm/test/Transforms/Coroutines/coro-lifetime-end.ll

  Log Message:
  -----------
  Revert "[coro][CoroSplit] Use `llvm.lifetime.end` to compute putting objects on the frame vs the stack (#90265)"

This reverts commit fcf341d3ddfe2289ac88aa3c122b25df8732cc8e.

Causes major compile-time regressions when not using coroutines.


  Commit: de8cf69abf4f8b16d5c5ecb77a6dfb1f5c09e45a
      https://github.com/llvm/llvm-project/commit/de8cf69abf4f8b16d5c5ecb77a6dfb1f5c09e45a
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M llvm/docs/LangRef.rst

  Log Message:
  -----------
  [LangRef] callbr result can be used in all successors (#91167)

Originally, the callbr result could only be used on the fallthrough
destination. This limitation has been lifted, and the result is now also
available on the indirect destinations. However, LangRef was not updated
to reflect this.


  Commit: f34d30cdae0f59698f660d5cc8fb993fb3441064
      https://github.com/llvm/llvm-project/commit/f34d30cdae0f59698f660d5cc8fb993fb3441064
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
    M llvm/test/Transforms/FunctionAttrs/nocapture.ll
    M llvm/test/Transforms/FunctionAttrs/nonnull.ll

  Log Message:
  -----------
  [FunctionAttrs] Fix incorrect nonnull inference for non-inbounds GEP (#91180)

For inbounds GEPs, if the source pointer is non-null, the result must
also be non-null. However, this does not hold for non-inbounds GEPs.
    
Fixes https://github.com/llvm/llvm-project/issues/91177.


  Commit: fd0ffb74389d6bf52c5c2afc8cd0a4e26cfa6c2f
      https://github.com/llvm/llvm-project/commit/fd0ffb74389d6bf52c5c2afc8cd0a4e26cfa6c2f
  Author: Monad <yanwqmonad at gmail.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/test/Analysis/ValueTracking/known-power-of-two-urem.ll

  Log Message:
  -----------
  [ValueTracking] Recognize `LShr(UINT_MAX, Y) + 1` as a power-of-two (#91171)

There is a missed optimization in
``` llvm
define i8 @known_power_of_two_rust_next_power_of_two(i8 %x, i8 %y) {
  %2 = add i8 %x, -1
  %3 = tail call i8 @llvm.ctlz.i8(i8 %2, i1 true)
  %4 = lshr i8 -1, %3
  %5 = add i8 %4, 1
  %6 = icmp ugt i8 %x, 1
  %p = select i1 %6, i8 %5, i8 1

  %r = urem i8 %y, %p
  ret i8 %r
}
```
which is extracted from the Rust code
``` rust
fn func(x: usize, y: usize) -> usize {
    let z = x.next_power_of_two();
    y % z
}
```
Here `%p` (a.k.a `z`) is semantically a power-of-two, so `y urem p` can
be optimized to `y & (p - 1)`. (Alive2 proof:
https://alive2.llvm.org/ce/z/H3zooY)

---

It could be generalized to recognizing `LShr(UINT_MAX, Y) + 1` as a
power-of-two, which is what this PR does.
Alive2 proof: https://alive2.llvm.org/ce/z/zUPTbc


  Commit: 0ab4458df0688955620b72cc2c72a32dffad3615
      https://github.com/llvm/llvm-project/commit/0ab4458df0688955620b72cc2c72a32dffad3615
  Author: Monad <yanwqmonad at gmail.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    M llvm/test/Transforms/InstCombine/cttz.ll

  Log Message:
  -----------
  [InstCombine] Fold `cttz(lshr(-1, x) + 1)` to `width - x` (#91244)

Fold
``` llvm
define i64 @src(i64 %50) {
  %52 = lshr i64 -1, %50
  %53 = add i64 %52, 1
  %54 = call i64 @llvm.cttz.i64(i64 %53, i1 false)
  ret i64 %54
}
```
to
``` llvm
define i64 @tgt(i64 %50) {
  %52 = sub i64 64, %50
  ret i64 %52
}
```

as
https://github.com/llvm/llvm-project/pull/91171#pullrequestreview-2040663002
pointed out.

Alive2 proof: https://alive2.llvm.org/ce/z/2aHfYa

Note: the `ctlz` version of this pattern seems not exist in dtcxzyw's
benchmark, so put it aside for now.


  Commit: 178ff395006f204265b4f6fe72a3dbb2b9a79b47
      https://github.com/llvm/llvm-project/commit/178ff395006f204265b4f6fe72a3dbb2b9a79b47
  Author: S. Bharadwaj Yadavalli <Bharadwaj.Yadavalli at microsoft.com>
  Date:   2024-05-06 (Mon, 06 May 2024)

  Changed paths:
    M clang/lib/Basic/Targets.cpp
    M clang/lib/Driver/ToolChains/HLSL.cpp
    M clang/test/CodeGenHLSL/basic-target.c
    M clang/test/Driver/dxc_dxv_path.hlsl
    M clang/test/Options/enable_16bit_types_validation.hlsl
    M clang/unittests/Driver/DXCModeTest.cpp
    M llvm/include/llvm/TargetParser/Triple.h
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/TargetParser/Triple.cpp
    M llvm/unittests/TargetParser/TripleTest.cpp

  Log Message:
  -----------
  Revert "[DirectX][DXIL] Set DXIL Version in DXIL target triple based on shader model version" (#91290)

Reverts llvm/llvm-project#90809

Need to investigate ASAN failures.


  Commit: 3e54768d7a0e1cfa65e892b6602993192ecad91e
      https://github.com/llvm/llvm-project/commit/3e54768d7a0e1cfa65e892b6602993192ecad91e
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2024-05-06 (Mon, 06 May 2024)

  Changed paths:
    M offload/plugins-nextgen/host/CMakeLists.txt
    M offload/plugins-nextgen/host/src/rtl.cpp

  Log Message:
  -----------
  [Offload] Detect target triple from preprocessor instead of CMake (#91283)

Summary:
This patch removes the special-case handling for the target triple
inside of the CMake. I moved it into the implementation so it's easier
to see and modify.


  Commit: 37fcb323f61efb8dfb74548a1b472fa20e829170
      https://github.com/llvm/llvm-project/commit/37fcb323f61efb8dfb74548a1b472fa20e829170
  Author: Jianjian Guan <jacquesguan at me.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
    M llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fpext-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptrunc-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-load-store.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-load.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfpext-constrained-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfptrunc-constrained-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
    M llvm/test/CodeGen/RISCV/rvv/vfpext-constrained-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfpext-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfpext-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfptrunc-constrained-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfptrunc-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll

  Log Message:
  -----------
  [RISCV] Add codegen support for Zvfbfmin (#87911)

This patch adds basic codegen support for Zvfbfmin extension.


  Commit: aac83fcf3ec6bbe5e0d83b76d2d236b1b4bfbe89
      https://github.com/llvm/llvm-project/commit/aac83fcf3ec6bbe5e0d83b76d2d236b1b4bfbe89
  Author: SahilPatidar <patidarsahil2001 at gmail.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    A llvm/test/Transforms/Reassociate/reassoc_bool.ll
    A llvm/test/Transforms/Reassociate/reassoc_bool_vec.ll

  Log Message:
  -----------
  [Reassociate] Adds test coverage for reassociation of scalar & vector boolean types (#89899)

First step for #64840.


  Commit: 236b3e1aad45e2bab8ede0da6397b7b01f9cc9d8
      https://github.com/llvm/llvm-project/commit/236b3e1aad45e2bab8ede0da6397b7b01f9cc9d8
  Author: Owen Pan <owenpiano at gmail.com>
  Date:   2024-05-06 (Mon, 06 May 2024)

  Changed paths:
    M clang/docs/ClangFormatStyleOptions.rst
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/Format/Format.h
    M clang/lib/Format/Format.cpp
    M clang/lib/Format/FormatToken.h
    M clang/lib/Format/TokenAnnotator.cpp
    M clang/lib/Format/UnwrappedLineFormatter.cpp
    M clang/lib/Format/UnwrappedLineParser.cpp
    M clang/lib/Format/UnwrappedLineParser.h
    M clang/lib/Format/WhitespaceManager.cpp
    M clang/lib/Format/WhitespaceManager.h
    M clang/unittests/Format/ConfigParseTest.cpp
    M clang/unittests/Format/FormatTestJava.cpp
    M clang/unittests/Format/TokenAnnotatorTest.cpp

  Log Message:
  -----------
  [clang-format] Handle Java switch expressions (#91112)

Also adds AllowShortCaseExpressionOnASingleLine option and
AlignCaseArrows suboption of AlignConsecutiveShortCaseStatements.

Fixes #55903.


  Commit: f9d76197ff0099502cf001abe3f5310c5bc4532d
      https://github.com/llvm/llvm-project/commit/f9d76197ff0099502cf001abe3f5310c5bc4532d
  Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M clang/lib/AST/ASTContext.cpp
    M clang/lib/AST/Type.cpp
    A clang/test/Modules/pr91105.cppm

  Log Message:
  -----------
  [ASTContext] Profile Dependently-sized array types that do not have a specified number
of elements

Close https://github.com/llvm/llvm-project/issues/91105

The root reason for the issue is that we always generate the
dependently-sized array types which don't specify a number of elements.

The original comment says:

> We do no canonicalization here at all, which is okay
> because they can't be used in most locations.

But now we find the locations.


  Commit: 4cce9fbb4e086170f69bfc8766f9613673b441c9
      https://github.com/llvm/llvm-project/commit/4cce9fbb4e086170f69bfc8766f9613673b441c9
  Author: Eli Friedman <efriedma at quicinc.com>
  Date:   2024-05-06 (Mon, 06 May 2024)

  Changed paths:
    M clang/lib/Headers/arm_acle.h
    M clang/test/Headers/arm-acle-header.c

  Log Message:
  -----------
  [Arm64EC] Fix compilation of arm_acle.h (#91281)


  Commit: dfa7ff97b24dc5a3dd714b45af288812c13d0110
      https://github.com/llvm/llvm-project/commit/dfa7ff97b24dc5a3dd714b45af288812c13d0110
  Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M clang/include/clang/Serialization/ASTWriter.h
    M clang/lib/Serialization/ASTWriter.cpp
    A clang/test/Modules/function-transitive-change.cppm
    M clang/test/Modules/no-transitive-source-location-change.cppm

  Log Message:
  -----------
  [C++20] [Modules] [Reduced BMI] Combine the signature of used modules
into the current module

Following of https://github.com/llvm/llvm-project/pull/86912. After
https://github.com/llvm/llvm-project/pull/86912, with reduced BMI, the
BMI can keep unchange if the dependent modules only changes the
implementation (without introduing new decls). However, this is not
strictly correct.

For example:

```
// a.cppm
export module a;
export inline int a() { ... }

// b.cppm
export module b;
import a;
export inline int b() { return a(); }
```

Since both `a()` and `b()` are inline, we need to make sure the BMI of
`b.pcm` will change after the implementation of `a()` changes.

We can't get that naturally since we won't record the body of `a()`
during the writing process. We can't reuse ODRHash here since ODRHash
won't calculate the called function recursively. So ODRHash will be
problematic if `a()` calls other inline functions.

Probably we can solve this by a new hash mechanism. But the safety and
efficiency may a problem too. Here we just combine the hash value of the
used modules conservatively.


  Commit: 02ce8227ac28e0b83cf780716ae8f912d076eebe
      https://github.com/llvm/llvm-project/commit/02ce8227ac28e0b83cf780716ae8f912d076eebe
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2024-05-06 (Mon, 06 May 2024)

  Changed paths:
    M openmp/runtime/src/include/ompx.h.var

  Log Message:
  -----------
  [NFC][OpenMP][OMPX] Move `declare variant` up


  Commit: 879245e2b5d48b629e8b085afacf69cc1fd6a6ec
      https://github.com/llvm/llvm-project/commit/879245e2b5d48b629e8b085afacf69cc1fd6a6ec
  Author: Mingming Liu <mingmingl at google.com>
  Date:   2024-05-06 (Mon, 06 May 2024)

  Changed paths:
    M llvm/include/llvm/Analysis/IndirectCallVisitor.h

  Log Message:
  -----------
  [NFC]Extract the heuristic to find vtable for an indirect call into a helper function  (#81024)

* This way the helper function could be re-used by
indirect-call-promotion pass to find out the vtable for an indirect call
and extract the value profiles if any.
* The parent patch is https://github.com/llvm/llvm-project/pull/80762


  Commit: b42f553af5179b26efe38bee2c1b7aa365b06517
      https://github.com/llvm/llvm-project/commit/b42f553af5179b26efe38bee2c1b7aa365b06517
  Author: Thorsten Schütt <schuett at gmail.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
    M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
    M llvm/include/llvm/Target/GlobalISel/Combine.td
    M llvm/lib/CodeGen/GlobalISel/CombinerHelperVectorOps.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/combine-extract-vec-elt.mir
    M llvm/test/CodeGen/AArch64/extract-vector-elt.ll

  Log Message:
  -----------
  [GlobalIsel] Combine extract vector element (#90339)

look through shuffle vectors


  Commit: ad9f38d0e3a5e7e06c39dbd7da88a921a49aa805
      https://github.com/llvm/llvm-project/commit/ad9f38d0e3a5e7e06c39dbd7da88a921a49aa805
  Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M clang/test/Modules/no-transitive-source-location-change.cppm

  Log Message:
  -----------
  [NFC] Fix Modules/no-transitive-source-location-change.cppm after dfa7ff97b2

The test fails after dfa7ff97b2. I didn't find this locally due to
cache.


  Commit: 05f4448d40f00b9fb2447e1c32cd18a7a9b8b011
      https://github.com/llvm/llvm-project/commit/05f4448d40f00b9fb2447e1c32cd18a7a9b8b011
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    A clang/test/AST/Interp/eval-order.cpp

  Log Message:
  -----------
  [clang][Interp][NFC] Add eval-order test

Demonstrate that this isn't yet working right.


  Commit: 5f2f3900138cc519e1cb807e99920337eede2b6c
      https://github.com/llvm/llvm-project/commit/5f2f3900138cc519e1cb807e99920337eede2b6c
  Author: Timm Bäder <tbaeder at redhat.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M clang/lib/AST/Interp/Pointer.cpp

  Log Message:
  -----------
  [clang][Interp][NFC] Allow Pointer assignment if both are zero

... even if the storage types are different.


  Commit: 2b9210d1aa9ce9c204b3af0158636c71a5a72e17
      https://github.com/llvm/llvm-project/commit/2b9210d1aa9ce9c204b3af0158636c71a5a72e17
  Author: Abhishek Varma <abhvarma at amd.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
    M mlir/lib/Dialect/SCF/IR/SCF.cpp
    M mlir/test/Dialect/SCF/canonicalize.mlir

  Log Message:
  -----------
  [MLIR][SCF] Add canonicalization pattern to fold away iter args of scf.forall (#90189)

-- This commit adds a canonicalization pattern to fold away iter args of
scf.forall if :-
   a. The corresponding tied result has no use.
   b. It is not being modified within the loop.

Signed-off-by: Abhishek Varma <avarma094 at gmail.com>


  Commit: fc866fd2a2cfca6d62f48dcf83778959fd24f559
      https://github.com/llvm/llvm-project/commit/fc866fd2a2cfca6d62f48dcf83778959fd24f559
  Author: Haojian Wu <hokein.wu at gmail.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M clang-tools-extra/clangd/unittests/HoverTests.cpp
    M clang/lib/Sema/SemaDecl.cpp
    M clang/test/AST/ast-dump-recovery.cpp

  Log Message:
  -----------
  [clang] Don't preserve the typo expr in the recovery expr for invalid VarDecls (#90948)

With the commit d5308949cf884d8e4b971d51a8b4f73584c4adec, we now
preserve the initializer for invalid decls with the recovery-expr.

However there is a chance that the original init expr is a typo-expr, we
should not preserve it in the final AST, as typo-expr is an internal AST
node. We should use the one after the typo correction.

This is spotted by a clangd hover crash on the testcase.


  Commit: 6ad37a41b5489ce66ea890bf92fca66ea1ae41e0
      https://github.com/llvm/llvm-project/commit/6ad37a41b5489ce66ea890bf92fca66ea1ae41e0
  Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M flang/lib/Semantics/check-omp-structure.cpp

  Log Message:
  -----------
  [Flang][OpenMP] NFC: Trivial changes in OmpCycleChecker (#91024)

Cycle is associated with construct-names and not labels. Change name of
a few variables to reflect this. Also add appropriate comment to
describe the else case of error checking.


  Commit: a62a7024164c2977cd0e77f77807f957802d204a
      https://github.com/llvm/llvm-project/commit/a62a7024164c2977cd0e77f77807f957802d204a
  Author: jinchen <49575973+jinchen62 at users.noreply.github.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/Math/Transforms/Passes.h
    M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
    M mlir/test/lib/Dialect/Math/TestExpandMath.cpp
    M mlir/test/mlir-cpu-runner/test-expand-math-approx.mlir

  Log Message:
  -----------
  [mlir][math] Add expand patterns for acosh, asinh, atanh (#90718)


  Commit: ebde770c3e6f0dd9d297659cbaeb486cef9471d6
      https://github.com/llvm/llvm-project/commit/ebde770c3e6f0dd9d297659cbaeb486cef9471d6
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir

  Log Message:
  -----------
  [RISCV] Use IMPLICIT_DEF for undef GPR reg in vsetvli test. NFC

Only VRs should use $noreg, this GPR was accidentally changed in d392520c6


  Commit: ad59967336d2279eee77fff3a92e52ec87010aae
      https://github.com/llvm/llvm-project/commit/ad59967336d2279eee77fff3a92e52ec87010aae
  Author: hev <wangrui at loongson.cn>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
    M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
    M llvm/test/CodeGen/LoongArch/rotl-rotr.ll

  Log Message:
  -----------
  [LoongArch] Optimize codegen for ISD::{ROTL,ROTR} (#91174)


  Commit: d9f2b9391887af95acdd91dfea2e72eb3a9d8d05
      https://github.com/llvm/llvm-project/commit/d9f2b9391887af95acdd91dfea2e72eb3a9d8d05
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
    M llvm/test/CodeGen/RISCV/rvv/copyprop.mir
    M llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir
    M llvm/test/CodeGen/RISCV/rvv/vxrm.mir

  Log Message:
  -----------
  [RISCV] Change more undef passthrus to $noreg in vector tests. NFC


  Commit: f3fbd21fa4e25496725c22d987e4e47e4c39c8b0
      https://github.com/llvm/llvm-project/commit/f3fbd21fa4e25496725c22d987e4e47e4c39c8b0
  Author: martinboehme <mboehme at google.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M clang/lib/Analysis/FlowSensitive/Transfer.cpp
    M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp

  Log Message:
  -----------
  [clang][dataflow] Strengthen pointer comparison. (#75170)

-  Instead of comparing the identity of the `PointerValue`s, compare the
   underlying `StorageLocation`s.

- If the `StorageLocation`s are the same, return a definite "true" as
the
result of the comparison. Before, if the `PointerValue`s were different,
we
would return an atom, even if the storage locations themselves were the
same.

- If the `StorageLocation`s are different, return an atom (as before).
Pointers
that have different storage locations may still alias, so we can't
return a
   definite "false" in this case.

The application-level gains from this are relatively modest. For the
Crubit
nullability check running on an internal codebase, this change reduces
the
number of functions on which the SAT solver times out from 223 to 221;
the
number of "pointer expression not modeled" errors reduces from 3815 to
3778.

Still, it seems that the gain in precision is generally worthwhile.

@Xazax-hun inspired me to think about this with his

[comments](https://github.com/llvm/llvm-project/pull/73860#pullrequestreview-1761484615)
on a different PR.


  Commit: 1de0535e84f03941badc8021bbc87a8c674a379f
      https://github.com/llvm/llvm-project/commit/1de0535e84f03941badc8021bbc87a8c674a379f
  Author: Peter Waller <peter.waller at arm.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M llvm/docs/CommandGuide/llvm-mca.rst
    M llvm/docs/ReleaseNotes.rst
    M llvm/test/tools/llvm-mca/AArch64/Exynos/float-divide-multiply.s
    M llvm/test/tools/llvm-mca/AArch64/Exynos/float-integer.s
    M llvm/test/tools/llvm-mca/ARM/cortex-a57-basic-instructions.s
    M llvm/test/tools/llvm-mca/ARM/cortex-a57-thumb.s
    M llvm/test/tools/llvm-mca/X86/BtVer2/simple-test.s
    M llvm/test/tools/llvm-mca/X86/BtVer2/skip-unsupported-instructions-none-remain.s
    M llvm/test/tools/llvm-mca/X86/BtVer2/unsupported-instruction.s
    A llvm/test/tools/llvm-mca/bad-input.s
    M llvm/tools/llvm-mca/CodeRegionGenerator.cpp
    M llvm/tools/llvm-mca/CodeRegionGenerator.h
    M llvm/tools/llvm-mca/llvm-mca.cpp

  Log Message:
  -----------
  [llvm-mca] Abort on parse error without -skip-unsupported-instructions (#90474)

[llvm-mca] Abort on parse error without -skip-unsupported-instructions

Prior to this patch, llvm-mca would continue executing after parse
errors. These errors can lead to some confusion since some analysis
results are printed on the standard output, and they're printed after
the errors, which could otherwise be easy to miss.

However it is still useful to be able to continue analysis after errors;
so extend the recently added -skip-unsupported-instructions to support
this.

Two tests which have parse errors for some of the 'RUN' branches are
updated to use -skip-unsupported-instructions so they can remain as-is.

Add a description of -skip-unsupported-instructions to the llvm-mca
command guide, and add it to the llvm-mca --help output:

```
  --skip-unsupported-instructions=<value> - Force analysis to continue in the presence of unsupported instructions
    =none                                 -   Exit with an error when an instruction is unsupported for any reason (default)
    =lack-sched                           -   Skip instructions on input which lack scheduling information
    =parse-failure                        -   Skip lines on the input which fail to parse for any reason
    =any                                  -   Skip instructions or lines on input which are unsupported for any reason
```

Tests within this patch are intended to cover each of the cases.

Reason        | Flag | Comment
--------------|------|-------
none          | none | Usual case, existing test suite
lack-sched    | none | Advises user to use -skip-unsupported-instructions=lack-sched, tested in llvm/test/tools/llvm-mca/X86/BtVer2/unsupported-instruction.s
parse-failure | none | Advises user to use -skip-unsupported-instructions=parse-failure, tested in llvm/test/tools/llvm-mca/bad-input.s
any           | none | (N/A, covered above)
lack-sched    | any  | Continues, prints warnings, tested in llvm/test/tools/llvm-mca/X86/BtVer2/unsupported-instruction.s
parse-failure | any  | Continues, prints errors, tested in llvm/test/tools/llvm-mca/bad-input.s
lack-sched    | parse-failure | Advises user to use -skip-unsupported-instructions=lack-sched, tested in llvm/test/tools/llvm-mca/X86/BtVer2/unsupported-instruction.s
parse-failure | lack-sched    | Advises user to use -skip-unsupported-instructions=parse-failure, tested in llvm/test/tools/llvm-mca/bad-input.s
none          | * | This would be any test case with skip-unsupported-instructions, coverage added in llvm/test/tools/llvm-mca/X86/BtVer2/simple-test.s
any           | * | (Logically covered by the other cases)


  Commit: 1530f319311908b06fe935c89fca692d3e53184f
      https://github.com/llvm/llvm-project/commit/1530f319311908b06fe935c89fca692d3e53184f
  Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M llvm/unittests/Analysis/IRSimilarityIdentifierTest.cpp
    M llvm/unittests/Transforms/Utils/LocalTest.cpp

  Log Message:
  -----------
  [RemoveDIs] Update some unittests to the new format (#90476)

This patch updates the unittests that can be changed to the new format
after #89799 (which changes the default format everywhere) to avoid a
loss in coverage for the (new) default debug info format.


  Commit: 1fd196c8df8e9fa4e0eddddc92b012824d8d1b0b
      https://github.com/llvm/llvm-project/commit/1fd196c8df8e9fa4e0eddddc92b012824d8d1b0b
  Author: ostannard <oliver.stannard at arm.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M clang/lib/CodeGen/CGCall.cpp
    M clang/lib/CodeGen/TargetInfo.h
    M clang/lib/CodeGen/Targets/AArch64.cpp
    M clang/lib/CodeGen/Targets/X86.cpp
    M clang/test/CodeGen/aarch64-soft-float-abi-errors.c

  Log Message:
  -----------
  [AArch64] Diagnose more functions when FP not enabled (#90832)

When using a hard-float ABI for a target without FP registers, it's not
possible to correctly generate code for functions with arguments which
must be passed in floating-point registers. This is diagnosed in CodeGen
instead of Sema, to more closely match GCC's behaviour around inline
functions, which is relied on by the Linux kernel.

Previously, this only checked function signatures as they were
code-generated, but this missed some cases:
* Calls to functions not defined in this translation unit.
* Calls through function pointers.
* Calls to variadic functions, where the variadic arguments have a
floating-point type.

This adds checks to function calls, as well as definitions, so that
these cases are correctly diagnosed.


  Commit: 50da7680d882dac122fac442348649c9951011a0
      https://github.com/llvm/llvm-project/commit/50da7680d882dac122fac442348649c9951011a0
  Author: Ben Shi <2283975856 at qq.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M llvm/lib/Target/AVR/AVRInstrInfo.td

  Log Message:
  -----------
  [AVR][NFC] Improve format of target description files (#91296)


  Commit: 6aed0ab6547f577cceaccfc6d710f96b645c3af7
      https://github.com/llvm/llvm-project/commit/6aed0ab6547f577cceaccfc6d710f96b645c3af7
  Author: Anthony Ha <anthonyha96 at gmail.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M lldb/docs/use/qemu-testing.rst
    M lldb/tools/lldb-server/lldb-platform.cpp

  Log Message:
  -----------
  [lldb] Have lldb-server assign ports to children in platform mode (#88845)

Fixes #47549

`lldb-server`'s platform mode seems to have an issue with its
`--min-gdbserver-port` `--max-gdbserver-port` flags (and probably the
`--gdbserver-port` flag, but I didn't test it).

How the platform code seems to work is that it listens on a port, and
whenever there's an incoming connection, it forks the process to handle
the connection. To handle the port flags, the main process uses an
instance of the helper class
`GDBRemoteCommunicationServerPlatform::PortMap`, that can be configured
and track usages of ports. The child process handling the platform
connection, can then use the port map to allocate a port for the
gdb-server connection it will make (this is another process it spawns).

However, in the current code, this works only once. After the first
connection is handled by forking a child process, the main platform
listener code loops around, and then 'forgets' about the port map. This
is because this code:
```cpp
GDBRemoteCommunicationServerPlatform platform(
    acceptor_up->GetSocketProtocol(), acceptor_up->GetSocketScheme());
if (!gdbserver_portmap.empty()) {
  platform.SetPortMap(std::move(gdbserver_portmap));
}
```
is within the connection listening loop. This results in the
`gdbserver_portmap` being moved into the platform object at the
beginning of the first iteration of the loop, but on the second
iteration, after the first fork, the next instance of the platform
object will not have its platform port mapped.
The result of this bug is that subsequent connections to the platform,
when spawning the gdb-remote connection, will be supplied a random port
- which isn't bounded by the `--min-gdbserver-port` and
`--max-gdbserver--port` parameters passed in by the user.

This PR fixes this issue by having the port map be maintained by the
parent platform listener process. On connection, the listener allocates
a single available port from the port map, associates the child process
pid with the port, and lets the connection handling child use that
single port number.

Additionally, when cleaning up child processes, the main listener
process tracks the child that exited to deallocate the previously
associated port, so it can be reused for a new connection.


  Commit: d838e5b3e86e7b3b4b2f75ee9c2854e23782888e
      https://github.com/llvm/llvm-project/commit/d838e5b3e86e7b3b4b2f75ee9c2854e23782888e
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86.td
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/cmp16.ll

  Log Message:
  -----------
  [X86] Add FastImm16 tuning flag to Intel Atom + AMD Bobcat/Ryzen Families (#90635)

This patch limits the icmp_i16(x,c) -> icmp_i32(ext(x),ext(c)) fold to CPUs that aren't known to have fast handling for length-changing prefixes for imm16 operands.

We are always assuming that 66/67h length-changing prefixes cause severe stalls and we should always extend imm16 operands and use a i32 icmp instead, the only exception being Intel Bonnell CPUs.

Agner makes this clear (see microarchitecture.pdf) that there are no stalls for any of the Intel Atom family (at least as far as Tremont - not sure about Gracemont or later). This is also true for AMD Bobcat/Jaguar and Ryzen families.

Recent performance Intel CPUs are trickier - Core2/Nehalem and earlier could have a 6-11cy stall, while SandyBridge onwards this is reduced to 3cy or less. I'm not sure if we should accept this as fast or not, we only use this flag for the icmp_i16 case, so that might be acceptable? If so, we should add this to x86-64-v3/v4 tuning as well.

Part of #90355 + #62952


  Commit: 6ce04747cff524b4c5c8738e25144659a5cf6691
      https://github.com/llvm/llvm-project/commit/6ce04747cff524b4c5c8738e25144659a5cf6691
  Author: Quentin Colombet <quentin.colombet at gmail.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/test/CodeGen/NVPTX/addrspacecast.ll

  Log Message:
  -----------
  [SDISel] Teach the type legalizer about ADDRSPACECAST (#90969)

Vectorized ADDRSPACECASTs were not supported by the type legalizer.

This patch adds the support for:
- splitting the vector result: <2 x ptr> => 2 x <1 x ptr>
- scalarization: <1 x ptr> => ptr
- widening: <3 x ptr> => <4 x ptr>

This is all exercised by the added NVPTX tests.


  Commit: abd314938dda1b117f289be5e630e43e68533929
      https://github.com/llvm/llvm-project/commit/abd314938dda1b117f289be5e630e43e68533929
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/X86/fshl-codesize.ll
    M llvm/test/Analysis/CostModel/X86/fshl-latency.ll
    M llvm/test/Analysis/CostModel/X86/fshl-sizelatency.ll
    M llvm/test/Analysis/CostModel/X86/fshl.ll
    M llvm/test/Analysis/CostModel/X86/fshr-codesize.ll
    M llvm/test/Analysis/CostModel/X86/fshr-latency.ll
    M llvm/test/Analysis/CostModel/X86/fshr-sizelatency.ll
    M llvm/test/Analysis/CostModel/X86/fshr.ll
    M llvm/test/Analysis/CostModel/X86/vshift-ashr-codesize.ll
    M llvm/test/Analysis/CostModel/X86/vshift-ashr-latency.ll
    M llvm/test/Analysis/CostModel/X86/vshift-ashr-sizelatency.ll
    M llvm/test/Analysis/CostModel/X86/vshift-lshr-codesize.ll
    M llvm/test/Analysis/CostModel/X86/vshift-lshr-latency.ll
    M llvm/test/Analysis/CostModel/X86/vshift-lshr-sizelatency.ll
    M llvm/test/Analysis/CostModel/X86/vshift-shl-codesize.ll
    M llvm/test/Analysis/CostModel/X86/vshift-shl-latency.ll
    M llvm/test/Analysis/CostModel/X86/vshift-shl-sizelatency.ll
    M llvm/test/CodeGen/X86/gfni-funnel-shifts.ll
    M llvm/test/CodeGen/X86/gfni-rotates.ll
    M llvm/test/CodeGen/X86/gfni-shifts.ll
    M llvm/test/CodeGen/X86/min-legal-vector-width.ll

  Log Message:
  -----------
  [X86] Use GFNI for vXi8 shifts/rotates (#89115)

As detailed here: https://github.com/InstLatx64/InstLatX64_Demo/blob/master/GFNI_Demo.h

We can use the gf2p8affine instruction to lower byte shifts/rotates as well as the existing bitreverse case.

Based off the original patch here: https://reviews.llvm.org/D137026


  Commit: e232659028365b51feb001565884b3b8e62cc2a9
      https://github.com/llvm/llvm-project/commit/e232659028365b51feb001565884b3b8e62cc2a9
  Author: Kristof Beyls <kristof.beyls at arm.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M bolt/lib/Core/ParallelUtilities.cpp

  Log Message:
  -----------
  [NFC][BOLT] Call EnsureAllocatorExists instead of copy pasting code


  Commit: 235cea720c0fa6dcf0bf5aff15001de88b6042f9
      https://github.com/llvm/llvm-project/commit/235cea720c0fa6dcf0bf5aff15001de88b6042f9
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicInst.h
    M llvm/include/llvm/IR/Intrinsics.h
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/IR/Function.cpp
    M llvm/lib/IR/IRBuilder.cpp
    M llvm/lib/IR/IntrinsicInst.cpp
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/Transforms/Utils/CloneFunction.cpp

  Log Message:
  -----------
  [NFC][LLVM] Refactor rounding mode detection of constrained fp intrinsic IDs (#90854)

I've refactored the code to genericise the implementation to better
allow for target specific constrained fp intrinsics.


  Commit: 651bdb96b16d4e522f4611b60103234b1f890b24
      https://github.com/llvm/llvm-project/commit/651bdb96b16d4e522f4611b60103234b1f890b24
  Author: Chris Copeland <chris at chrisnc.net>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M clang/test/Driver/arm-cortex-cpus-1.c
    M clang/test/Driver/arm-features.c
    M clang/test/Preprocessor/arm-target-features.c
    M llvm/docs/ReleaseNotes.rst
    M llvm/include/llvm/TargetParser/ARMTargetParser.def
    M llvm/lib/Target/ARM/ARMArchitectures.td
    M llvm/lib/Target/ARM/ARMProcessors.td
    M llvm/test/Analysis/CostModel/ARM/arith.ll
    M llvm/test/Analysis/CostModel/ARM/cast.ll
    M llvm/test/Analysis/CostModel/ARM/cast_ldst.ll
    M llvm/test/Analysis/CostModel/ARM/cmps.ll
    M llvm/test/Analysis/CostModel/ARM/divrem.ll
    M llvm/test/CodeGen/ARM/cortex-a57-misched-basic.ll
    M llvm/test/CodeGen/ARM/fpconv.ll
    M llvm/test/CodeGen/ARM/half.ll
    M llvm/test/CodeGen/ARM/useaa.ll
    M llvm/unittests/TargetParser/TargetParserTest.cpp

  Log Message:
  -----------
  [ARM] Armv8-R does not require fp64 or neon. (#88287)

This was [addressed for AArch64
here](https://github.com/llvm/llvm-project/pull/79004), but the same
applies to ARM.

Move the enablement of neon+fp64 to `-mcpu=cortex-r52`, which optionally
supports these features.


  Commit: 97dd8e3c4f38ef345b01fbbf0a2052c7875ff7e0
      https://github.com/llvm/llvm-project/commit/97dd8e3c4f38ef345b01fbbf0a2052c7875ff7e0
  Author: Donát Nagy <donat.nagy at ericsson.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
    M clang/lib/StaticAnalyzer/Checkers/ReturnValueChecker.cpp
    M clang/test/Analysis/return-value-guaranteed.cpp

  Log Message:
  -----------
  [analyzer] Clean up apiModeling.llvm.ReturnValue (#91231)

This commit heavily refactors and simplifies the small and trivial
checker `apiModeling.llvm.ReturnValue`, which is responsible for
modeling the peculiar coding convention that in the LLVM/Clang codebase
certain Error() methods always return true.

Changes included in this commit:
- The call description mode is now specified explicitly (this is not the
most significant change, but it was the original reason for touching
this checker).
- Previously the code provided support for modeling functions that
always return `false`; but there was no need for that, so this commit
hardcodes that the return value is `true`.
- The overcomplicated constraint/state handling logic was simplified.
- The separate `checkEndFunction` callback was removed to simplify the
code. Admittedly this means that the note tag for the "<method> returns
false, breaking the convention" case is placed on the method call
instead of the `return` statement; but that case will _never_ appear in
practice, so this difference is mostly academical.
- The text of the note tags was clarified.
- The descriptions in the header comment and Checkers.td were clarified.
- Some minor cleanup was applied in the associated test file.

This change is very close to NFC because it only affects a hidden
`apiModeling.llvm` checker that's only relevant during the analysis of
the LLVM/Clang codebase, and even there it doesn't affect the normal
behavior of the checker.


  Commit: dcc7ef3ce87d7ea1ed9e64bb91e3bb2026df9644
      https://github.com/llvm/llvm-project/commit/dcc7ef3ce87d7ea1ed9e64bb91e3bb2026df9644
  Author: Emma Pilkington <emma.pilkington95 at gmail.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/SIDefines.h
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.h
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/test/MC/AMDGPU/gfx9-asm-err.s
    M llvm/test/MC/AMDGPU/sopp-err.s
    M llvm/test/MC/AMDGPU/sopp-gfx9.s

  Log Message:
  -----------
  [AMDGPU][MC] Disable sendmsg SYSMSG_OP_HOST_TRAP_ACK on gfx9+ (#90203)

This is no longer supported as of gfx9. Fixes #52903

This commit also includes some refactoring of sendmsg operand parsing:
  - Use CustomOperand for sendmsg operations, this allows them to be
    conditionally available based on a STI check (and automatically in
    sync with SIDefines.h).
  - Move CustomOperand table lookups from AMDGPUBaseInfo to
    AMDGPUAsmUtils. This cleans up an awkward interface where
    AMDGPUAsmUtils defined a table/size as globals that AMDGPUBaseInfo
    had to loop over.
  - Clean up a few of the operand lookup functions while moving them.


  Commit: 6d64f8e1feee014e72730a78b62d9d415df112ff
      https://github.com/llvm/llvm-project/commit/6d64f8e1feee014e72730a78b62d9d415df112ff
  Author: Donát Nagy <donat.nagy at ericsson.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
    M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
    M clang/lib/StaticAnalyzer/Checkers/InnerPointerChecker.cpp
    M clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp
    M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp

  Log Message:
  -----------
  [analyzer] Use explicit call description mode in more checkers (#90974)

This commit explicitly specifies the matching mode (C library function,
any non-method function, or C++ method) for the `CallDescription`s
constructed in various checkers.

Some code was simplified to use `CallDescriptionSet`s instead of
individual `CallDescription`s.

This change won't cause major functional changes, but isn't NFC because
it ensures that e.g. call descriptions for a non-method function won't
accidentally match a method that has the same name.

Separate commits have already performed this change in other checkers:
- easy cases: e2f1cbae45f81f3cd9a4d3c2bcf69a094eb060fa
- MallocChecker: d6d84b5d1448e4f2e24b467a0abcf42fe9d543e9
- iterator checkers: 06eedffe0d2782922e63cc25cb927f4acdaf7b30
- InvalidPtr checker: 024281d4d26344f9613b9115ea1fcbdbdba23235

... and follow-up commits will handle the remaining checkers.

My goal is to ensure that the call description mode is always explicitly
specified and eliminate (or strongly restrict) the vague "may be either
a method or a simple function" mode that's the current default.


  Commit: afc10fc9b7ce3d23d9012f5a1496e849fe873ba2
      https://github.com/llvm/llvm-project/commit/afc10fc9b7ce3d23d9012f5a1496e849fe873ba2
  Author: Peter Waller <peter.waller at arm.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    A llvm/test/tools/llvm-mca/AArch64/bad-input.s
    A llvm/test/tools/llvm-mca/X86/bad-input.s
    R llvm/test/tools/llvm-mca/bad-input.s

  Log Message:
  -----------
  [llvm-mca] Move bad-input.s test to be target specific

... for now.

This is a follow up to #90474 in response to build bot failures.

This test is intended to check a case where invalid assembly is passed
to llvm-mca.

Unfortunately it appears that a cross-toolchain built with
-DTOOLCHAIN_TARGET_TRIPLE does not have an llvm-mca which works out of
the box if the host target is not enabled.

As a quick fix to make the build bots green, move the test into AArch64
and X86 so that there is reasonable coverage for this test; later I hope
mca can be fixed to work out of the box in this configuration.


  Commit: 458d70674190c4d043d5dfd2e41aecddff5cdb69
      https://github.com/llvm/llvm-project/commit/458d70674190c4d043d5dfd2e41aecddff5cdb69
  Author: Peter Waller <peter.waller at arm.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    A llvm/test/tools/llvm-mca/AArch64/Neoverse/bad-input.s
    R llvm/test/tools/llvm-mca/AArch64/bad-input.s
    M llvm/test/tools/llvm-mca/X86/bad-input.s

  Log Message:
  -----------
  [llvm-mca] Make bad-input.s even more CPU specific

Note: This patch is distinct from the previous one titled
  "[llvm-mca] Move bad-input.s test to be target specific"

This is a followup to #90474 and commit
afc10fc9b7ce3d23d9012f5a1496e849fe873ba2

Context: Builders failing because they're unable to run the failure
test.

This still doesn't work in various circumstances, it seems MCA doesn't
want to run on a wide variety of hosts in various configurations, so
stick to the tried and tested method and pass -mtriple and -mcpu.


  Commit: 6f2997cefc1e32c11a891ede2e3a2d73310e6ce1
      https://github.com/llvm/llvm-project/commit/6f2997cefc1e32c11a891ede2e3a2d73310e6ce1
  Author: Nikolas Klauser <nikolasklauser at berlin.de>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M libcxx/include/__type_traits/is_equality_comparable.h

  Log Message:
  -----------
  [libc++][NFC] Remove unused include from <__type_traits/is_equality_comparable.h> (#90950)


  Commit: b22a6f1eba8e27b2a21bf6b96a3bd349230cb80a
      https://github.com/llvm/llvm-project/commit/b22a6f1eba8e27b2a21bf6b96a3bd349230cb80a
  Author: Vincent Belliard <81770341+v-bulle at users.noreply.github.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
    M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
    A lldb/test/Shell/ExecControl/StepIn/Inputs/aarch64_thunk.cc
    A lldb/test/Shell/ExecControl/StepIn/step_through-aarch64-thunk.test

  Log Message:
  -----------
  [lldb] fix step in AArch64 trampoline (#90783)

Detects AArch64 trampolines in order to be able to step in a function
through a trampoline on AArch64.

---------

Co-authored-by: Vincent Belliard <v-bulle at github.com>


  Commit: 66364e65405d4964709e67574abf1b519a55296c
      https://github.com/llvm/llvm-project/commit/66364e65405d4964709e67574abf1b519a55296c
  Author: martinboehme <mboehme at google.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M clang/include/clang/Analysis/FlowSensitive/Solver.h
    M clang/include/clang/Analysis/FlowSensitive/WatchedLiteralsSolver.h

  Log Message:
  -----------
  [clang][dataflow] Add `reachedLimit()` to the `Solver` interface. (#91320)

We may want code to call this that doesn't know which specific solver
implementation it is dealing with.


  Commit: fff2db2e426ebe3a349bd0f00555d4a3dc8a6de7
      https://github.com/llvm/llvm-project/commit/fff2db2e426ebe3a349bd0f00555d4a3dc8a6de7
  Author: Louis Dionne <ldionne.2 at gmail.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M libcxx/include/__availability

  Log Message:
  -----------
  [libc++] Rename _LIBCPP_INTRODUCED_foo_MARKUP to _LIBCPP_INTRODUCED_foo_ATTRIBUTE (#91269)

This was discussed in #87563 and overlooked when I landed the patch.


  Commit: 27becf0c3c1e7ac4a2f2e848b44d872f1aa1db9a
      https://github.com/llvm/llvm-project/commit/27becf0c3c1e7ac4a2f2e848b44d872f1aa1db9a
  Author: Haojian Wu <hokein.wu at gmail.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M clang/lib/Sema/SemaTemplate.cpp
    M clang/test/SemaCXX/cxx20-ctad-type-alias.cpp
    M clang/test/SemaTemplate/deduction-guide.cpp

  Log Message:
  -----------
  [clang] CTAD: fix the aggregate deduction guide for alias templates. (#90894)

For alias templates, our current way of constructing their aggregate
deduction guides deviates from the standard approach. We should align it
with how we handle implicit deduction guides.

This patch has a refactoring change which pulls the construction logic
out from `DeclareImplicitDeductionGuidesForTypeAlia` and reusing it for
building aggregate deduction guides.


  Commit: 227fe1c1995dea1850483449e8510db2726bcbee
      https://github.com/llvm/llvm-project/commit/227fe1c1995dea1850483449e8510db2726bcbee
  Author: David Truby <david.truby at arm.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M flang/runtime/extensions.cpp

  Log Message:
  -----------
  [flang] Remove C++ runtime dependency from Sleep extension (#84911)

The Sleep extension currently has a potential dependency on the C++
runtime. I run into this dependency using libc++ on Linux. This patch 
uses the POSIX `sleep` function or the Windows `Sleep` function 
instead to avoid this dependency.


  Commit: 1d87465a0a95cee9accc5dce7abdabbbc3f3c122
      https://github.com/llvm/llvm-project/commit/1d87465a0a95cee9accc5dce7abdabbbc3f3c122
  Author: Benjamin Kramer <benny.kra at googlemail.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M libc/test/src/math/FModTest.h

  Log Message:
  -----------
  [libc][math] fmod: clear exceptions before the test instead of after

The test has no control over the CPU state before the test runs.

This test checks whether no exception flags are set, which may not be
true at the start of the test. This used to be not a problem because the
check was broken but that was fixed in ecfb5d9951554d8bdb6a499c958f48cc35f78a88


  Commit: 54b637dfa83c36b836702733712e0d3f8e1fb449
      https://github.com/llvm/llvm-project/commit/54b637dfa83c36b836702733712e0d3f8e1fb449
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
    M flang/lib/Lower/OpenMP/Decomposer.cpp
    M llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h

  Log Message:
  -----------
  Address review comments


  Commit: 64d9ec56009b98da1de24b0835cab5f43157dda2
      https://github.com/llvm/llvm-project/commit/64d9ec56009b98da1de24b0835cab5f43157dda2
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M bolt/lib/Core/ParallelUtilities.cpp
    M clang-tools-extra/clang-include-fixer/find-all-symbols/STLPostfixHeaderMap.cpp
    M clang-tools-extra/clangd/index/CanonicalIncludes.cpp
    M clang-tools-extra/clangd/unittests/HoverTests.cpp
    M clang/docs/ClangFormatStyleOptions.rst
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/Analysis/FlowSensitive/Solver.h
    M clang/include/clang/Analysis/FlowSensitive/WatchedLiteralsSolver.h
    M clang/include/clang/Format/Format.h
    M clang/include/clang/Serialization/ASTWriter.h
    M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
    M clang/lib/AST/ASTContext.cpp
    M clang/lib/AST/Interp/Pointer.cpp
    M clang/lib/AST/Type.cpp
    M clang/lib/Analysis/FlowSensitive/Transfer.cpp
    M clang/lib/CodeGen/CGCall.cpp
    M clang/lib/CodeGen/TargetInfo.h
    M clang/lib/CodeGen/Targets/AArch64.cpp
    M clang/lib/CodeGen/Targets/X86.cpp
    M clang/lib/Format/Format.cpp
    M clang/lib/Format/FormatToken.h
    M clang/lib/Format/TokenAnnotator.cpp
    M clang/lib/Format/UnwrappedLineFormatter.cpp
    M clang/lib/Format/UnwrappedLineParser.cpp
    M clang/lib/Format/UnwrappedLineParser.h
    M clang/lib/Format/WhitespaceManager.cpp
    M clang/lib/Format/WhitespaceManager.h
    M clang/lib/Headers/CMakeLists.txt
    A clang/lib/Headers/__stdarg_header_macro.h
    A clang/lib/Headers/__stddef_header_macro.h
    M clang/lib/Headers/arm_acle.h
    M clang/lib/Headers/module.modulemap
    M clang/lib/Headers/stdarg.h
    M clang/lib/Headers/stddef.h
    M clang/lib/Sema/SemaDecl.cpp
    M clang/lib/Sema/SemaTemplate.cpp
    M clang/lib/Serialization/ASTWriter.cpp
    M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
    M clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
    M clang/lib/StaticAnalyzer/Checkers/InnerPointerChecker.cpp
    M clang/lib/StaticAnalyzer/Checkers/ReturnValueChecker.cpp
    M clang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp
    M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
    M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
    M clang/lib/StaticAnalyzer/Checkers/WebKit/RefCntblBaseVirtualDtorChecker.cpp
    A clang/test/AST/Interp/eval-order.cpp
    M clang/test/AST/ast-dump-recovery.cpp
    M clang/test/Analysis/Checkers/WebKit/call-args.cpp
    M clang/test/Analysis/Checkers/WebKit/ref-cntbl-base-virtual-dtor-templates.cpp
    M clang/test/Analysis/return-value-guaranteed.cpp
    M clang/test/CodeGen/aarch64-soft-float-abi-errors.c
    M clang/test/Driver/arm-cortex-cpus-1.c
    M clang/test/Driver/arm-features.c
    M clang/test/Headers/arm-acle-header.c
    A clang/test/Modules/function-transitive-change.cppm
    M clang/test/Modules/no-transitive-source-location-change.cppm
    A clang/test/Modules/pr91105.cppm
    M clang/test/Preprocessor/arm-target-features.c
    M clang/test/SemaCXX/cxx20-ctad-type-alias.cpp
    M clang/test/SemaTemplate/deduction-guide.cpp
    M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
    M clang/unittests/Format/ConfigParseTest.cpp
    M clang/unittests/Format/FormatTestJava.cpp
    M clang/unittests/Format/TokenAnnotatorTest.cpp
    M flang/include/flang/Semantics/tools.h
    M flang/lib/Semantics/check-omp-structure.cpp
    M flang/runtime/extensions.cpp
    M flang/test/Lower/CUDA/cuda-data-attribute.cuf
    M libc/src/__support/CPP/atomic.h
    M libc/test/src/math/FModTest.h
    M libcxx/include/__availability
    M libcxx/include/__type_traits/is_equality_comparable.h
    M lld/MachO/ObjC.cpp
    M lldb/docs/use/qemu-testing.rst
    M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
    M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
    A lldb/test/Shell/ExecControl/StepIn/Inputs/aarch64_thunk.cc
    A lldb/test/Shell/ExecControl/StepIn/step_through-aarch64-thunk.test
    M lldb/tools/lldb-server/lldb-platform.cpp
    M llvm/docs/CommandGuide/llvm-mca.rst
    M llvm/docs/LangRef.rst
    M llvm/docs/ReleaseNotes.rst
    M llvm/include/llvm/Analysis/CFG.h
    M llvm/include/llvm/Analysis/IndirectCallVisitor.h
    M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
    M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
    M llvm/include/llvm/IR/IntrinsicInst.h
    M llvm/include/llvm/IR/Intrinsics.h
    M llvm/include/llvm/Target/GlobalISel/Combine.td
    M llvm/include/llvm/TargetParser/ARMTargetParser.def
    M llvm/lib/Analysis/CFG.cpp
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/lib/CodeGen/GlobalISel/CombinerHelperVectorOps.cpp
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/IR/Function.cpp
    M llvm/lib/IR/IRBuilder.cpp
    M llvm/lib/IR/IntrinsicInst.cpp
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
    M llvm/lib/Target/AMDGPU/SIDefines.h
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.h
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/lib/Target/ARM/ARMArchitectures.td
    M llvm/lib/Target/ARM/ARMProcessors.td
    M llvm/lib/Target/AVR/AVRInstrInfo.td
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
    M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
    M llvm/lib/Target/X86/X86.td
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
    M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
    M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    M llvm/lib/Transforms/Utils/CloneFunction.cpp
    M llvm/test/Analysis/CostModel/ARM/arith.ll
    M llvm/test/Analysis/CostModel/ARM/cast.ll
    M llvm/test/Analysis/CostModel/ARM/cast_ldst.ll
    M llvm/test/Analysis/CostModel/ARM/cmps.ll
    M llvm/test/Analysis/CostModel/ARM/divrem.ll
    M llvm/test/Analysis/CostModel/X86/fshl-codesize.ll
    M llvm/test/Analysis/CostModel/X86/fshl-latency.ll
    M llvm/test/Analysis/CostModel/X86/fshl-sizelatency.ll
    M llvm/test/Analysis/CostModel/X86/fshl.ll
    M llvm/test/Analysis/CostModel/X86/fshr-codesize.ll
    M llvm/test/Analysis/CostModel/X86/fshr-latency.ll
    M llvm/test/Analysis/CostModel/X86/fshr-sizelatency.ll
    M llvm/test/Analysis/CostModel/X86/fshr.ll
    M llvm/test/Analysis/CostModel/X86/vshift-ashr-codesize.ll
    M llvm/test/Analysis/CostModel/X86/vshift-ashr-latency.ll
    M llvm/test/Analysis/CostModel/X86/vshift-ashr-sizelatency.ll
    M llvm/test/Analysis/CostModel/X86/vshift-lshr-codesize.ll
    M llvm/test/Analysis/CostModel/X86/vshift-lshr-latency.ll
    M llvm/test/Analysis/CostModel/X86/vshift-lshr-sizelatency.ll
    M llvm/test/Analysis/CostModel/X86/vshift-shl-codesize.ll
    M llvm/test/Analysis/CostModel/X86/vshift-shl-latency.ll
    M llvm/test/Analysis/CostModel/X86/vshift-shl-sizelatency.ll
    M llvm/test/Analysis/ValueTracking/known-power-of-two-urem.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/combine-extract-vec-elt.mir
    M llvm/test/CodeGen/AArch64/extract-vector-elt.ll
    M llvm/test/CodeGen/ARM/cortex-a57-misched-basic.ll
    M llvm/test/CodeGen/ARM/fpconv.ll
    M llvm/test/CodeGen/ARM/half.ll
    M llvm/test/CodeGen/ARM/useaa.ll
    M llvm/test/CodeGen/LoongArch/rotl-rotr.ll
    M llvm/test/CodeGen/NVPTX/addrspacecast.ll
    M llvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
    M llvm/test/CodeGen/RISCV/rvv/copyprop.mir
    M llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fpext-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fptrunc-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-load-store.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-load.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfpext-constrained-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfptrunc-constrained-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
    M llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir
    M llvm/test/CodeGen/RISCV/rvv/vfpext-constrained-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfpext-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfpext-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfptrunc-constrained-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfptrunc-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
    M llvm/test/CodeGen/RISCV/rvv/vxrm.mir
    M llvm/test/CodeGen/X86/cmp16.ll
    M llvm/test/CodeGen/X86/dynamic-regmask-preserve-none.ll
    M llvm/test/CodeGen/X86/gfni-funnel-shifts.ll
    M llvm/test/CodeGen/X86/gfni-rotates.ll
    M llvm/test/CodeGen/X86/gfni-shifts.ll
    M llvm/test/CodeGen/X86/min-legal-vector-width.ll
    M llvm/test/MC/AMDGPU/gfx9-asm-err.s
    M llvm/test/MC/AMDGPU/sopp-err.s
    M llvm/test/MC/AMDGPU/sopp-gfx9.s
    R llvm/test/Transforms/Coroutines/coro-lifetime-end.ll
    M llvm/test/Transforms/FunctionAttrs/nocapture.ll
    M llvm/test/Transforms/FunctionAttrs/nonnull.ll
    M llvm/test/Transforms/InstCombine/cttz.ll
    A llvm/test/Transforms/Reassociate/reassoc_bool.ll
    A llvm/test/Transforms/Reassociate/reassoc_bool_vec.ll
    M llvm/test/tools/llvm-mca/AArch64/Exynos/float-divide-multiply.s
    M llvm/test/tools/llvm-mca/AArch64/Exynos/float-integer.s
    A llvm/test/tools/llvm-mca/AArch64/Neoverse/bad-input.s
    M llvm/test/tools/llvm-mca/ARM/cortex-a57-basic-instructions.s
    M llvm/test/tools/llvm-mca/ARM/cortex-a57-thumb.s
    M llvm/test/tools/llvm-mca/X86/BtVer2/simple-test.s
    M llvm/test/tools/llvm-mca/X86/BtVer2/skip-unsupported-instructions-none-remain.s
    M llvm/test/tools/llvm-mca/X86/BtVer2/unsupported-instruction.s
    A llvm/test/tools/llvm-mca/X86/bad-input.s
    M llvm/tools/llvm-mca/CodeRegionGenerator.cpp
    M llvm/tools/llvm-mca/CodeRegionGenerator.h
    M llvm/tools/llvm-mca/llvm-mca.cpp
    M llvm/unittests/Analysis/IRSimilarityIdentifierTest.cpp
    M llvm/unittests/TargetParser/TargetParserTest.cpp
    M llvm/unittests/Transforms/Utils/LocalTest.cpp
    M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
    M mlir/include/mlir/Dialect/Math/Transforms/Passes.h
    M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
    M mlir/lib/Dialect/Math/Transforms/ExpandPatterns.cpp
    M mlir/lib/Dialect/SCF/IR/SCF.cpp
    M mlir/test/Dialect/SCF/canonicalize.mlir
    M mlir/test/lib/Dialect/Math/TestExpandMath.cpp
    M mlir/test/mlir-cpu-runner/test-expand-math-approx.mlir
    M offload/plugins-nextgen/host/CMakeLists.txt
    M offload/plugins-nextgen/host/src/rtl.cpp
    M openmp/runtime/src/include/ompx.h.var

  Log Message:
  -----------
  Merge branch 'main' into users/kparzysz/spr/d09-recurse


  Commit: 682ce7f7a555d526c717c12defabd7f6c499c5bd
      https://github.com/llvm/llvm-project/commit/682ce7f7a555d526c717c12defabd7f6c499c5bd
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2024-05-07 (Tue, 07 May 2024)

  Changed paths:
    M flang/lib/Lower/OpenMP/Decomposer.h

  Log Message:
  -----------
  Add comment to `buildConstructQueue`


Compare: https://github.com/llvm/llvm-project/compare/3748f49357dd...682ce7f7a555

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