[all-commits] [llvm/llvm-project] 3219c0: [LAA] Directly pass DepChecker to getSource/getDes...
Fangrui Song via All-commits
all-commits at lists.llvm.org
Mon May 6 11:01:24 PDT 2024
Branch: refs/heads/users/MaskRay/spr/cc1-report-an-error-for-multiple-actions-unless-separated-by-main-file-name
Home: https://github.com/llvm/llvm-project
Commit: 3219c0edb2a4e18774227c8b35278df0e89c85fe
https://github.com/llvm/llvm-project/commit/3219c0edb2a4e18774227c8b35278df0e89c85fe
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-05-05 (Sun, 05 May 2024)
Changed paths:
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp
Log Message:
-----------
[LAA] Directly pass DepChecker to getSource/getDestination (NFC).
Instead of passing LoopAccessInfo only to fetch the MemoryDepChecker,
directly pass MemoryDepChecker. This simplifies the code and also allows
new uses in places where no LAI is available.
Commit: c18bcd0a5702a85adb4063ee94689a88e05686ea
https://github.com/llvm/llvm-project/commit/c18bcd0a5702a85adb4063ee94689a88e05686ea
Author: Kazu Hirata <kazu at google.com>
Date: 2024-05-05 (Sun, 05 May 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp
M llvm/lib/Target/BPF/BTFDebug.cpp
M llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
Log Message:
-----------
[Target] Use StringRef::operator== instead of StringRef::equals (NFC) (#91072) (#91138)
I'm planning to remove StringRef::equals in favor of
StringRef::operator==.
- StringRef::operator==/!= outnumber StringRef::equals by a factor of
38 under llvm/ in terms of their usage.
- The elimination of StringRef::equals brings StringRef closer to
std::string_view, which has operator== but not equals.
- S == "foo" is more readable than S.equals("foo"), especially for
!Long.Expression.equals("str") vs Long.Expression != "str".
Commit: 2574cabdc2090a19a15332b2c00a912b36df6ab8
https://github.com/llvm/llvm-project/commit/2574cabdc2090a19a15332b2c00a912b36df6ab8
Author: Eric <eric at efcs.ca>
Date: 2024-05-05 (Sun, 05 May 2024)
Changed paths:
M libcxx/test/libcxx/clang_modules_include.gen.py
M libcxx/test/libcxx/clang_tidy.gen.py
M libcxx/test/libcxx/double_include.gen.py
M libcxx/test/libcxx/transitive_includes.gen.py
Log Message:
-----------
[NFC] Remove BLOCKLIT workaround. (#91001)
Lit already has support for stopping LIT from parsing further test
directives. It is
// END.
After that directive, LIT will stop parsing.
This change removes the BLOCKLIT hack and replaces it with END.
Commit: 2aaec48d883b2550f053dc5c07b2400d725e77b5
https://github.com/llvm/llvm-project/commit/2aaec48d883b2550f053dc5c07b2400d725e77b5
Author: Fangrui Song <i at maskray.me>
Date: 2024-05-05 (Sun, 05 May 2024)
Changed paths:
M llvm/lib/Target/X86/X86FixupBWInsts.cpp
Log Message:
-----------
X86FixupBWInsts: Remove redundant code. NFC
Commit: e12364301e3370456e610c3f23ca18050f61f77e
https://github.com/llvm/llvm-project/commit/e12364301e3370456e610c3f23ca18050f61f77e
Author: Allen <zhongyunde at huawei.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/mul_pow2.ll
Log Message:
-----------
[AArch64][SelectionDAG] Lower multiplication by a constant to shl+sub+shl+sub (#90199)
Change the costmodel to lower a = b * C where C = 1 - (1 - 2^m) * 2^n to
sub w8, w0, w0, lsl #m
sub w0, w0, w8, lsl #n
Fix https://github.com/llvm/llvm-project/issues/89430
Commit: ddecadabebdd4b301bd65534b58009e57ac1bbe5
https://github.com/llvm/llvm-project/commit/ddecadabebdd4b301bd65534b58009e57ac1bbe5
Author: Doug Wyatt <doug at sonosphere.com>
Date: 2024-05-05 (Sun, 05 May 2024)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
M clang/test/CodeGen/aarch64-type-sizes.c
M clang/test/CodeGen/coff-aarch64-type-sizes.c
M clang/test/CodeGen/target-data.c
M clang/test/CodeGenCXX/member-alignment.cpp
M clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
Log Message:
-----------
[clang backend] In AArch64's DataLayout, specify a minimum function alignment of 4. (#90702)
This addresses an issue where the explicit alignment of 2 (for C++ ABI
reasons) was being propagated to the back end and causing under-aligned
functions (in special sections).
This is an alternate approach suggested by @efriedma-quic in PR #90415.
Fixes #90358
Commit: 3d6cf533cb258371177ee4912b3b09b62d328d29
https://github.com/llvm/llvm-project/commit/3d6cf533cb258371177ee4912b3b09b62d328d29
Author: Jeremy Kun <jkun at google.com>
Date: 2024-05-05 (Sun, 05 May 2024)
Changed paths:
M mlir/docs/DefiningDialects/Operations.md
Log Message:
-----------
fix formatting issues with ODS docs around assembly format directives (#91149)
- Some sentences are incorrectly split across list items.
- Some pre-formatted syntax is left in plaintext
- Some lines end in spaces
Co-authored-by: Jeremy Kun <j2kun at users.noreply.github.com>
Commit: f7bfb078cf037205a812dc4eece777130cfa88f5
https://github.com/llvm/llvm-project/commit/f7bfb078cf037205a812dc4eece777130cfa88f5
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/pr91005.ll
Log Message:
-----------
[X86][FP16] Do not create VBROADCAST_LOAD for f16 without AVX2 (#91125)
AVX doesn't provide 16-bit BROADCAST instruction.
Fixes #91005
Commit: 774b7eb7bacceaca3986fc73a236c3cd44f28599
https://github.com/llvm/llvm-project/commit/774b7eb7bacceaca3986fc73a236c3cd44f28599
Author: Kazu Hirata <kazu at google.com>
Date: 2024-05-05 (Sun, 05 May 2024)
Changed paths:
M llvm/include/llvm/ADT/StringRef.h
Log Message:
-----------
[ADT] Reimplement operator==(StringRef, StringRef) (NFC) (#91139)
I'm planning to deprecate and eventually remove StringRef::equals in
favor of operator==. This patch reimplements operator== without using
StringRef::equals.
I'm not sure if there is a good way to make StringRef::compareMemory
available to operator==, which is not a member function. "friend"
works to some extent but breaks corner cases, which is why I've chosen
to "inline" compareMemory.
Commit: c609043dd00955bf177ff57b0bad2a87c1e61a36
https://github.com/llvm/llvm-project/commit/c609043dd00955bf177ff57b0bad2a87c1e61a36
Author: Emilia Kond <emilia at rymiel.space>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Don't allow comma in front of structural enum (#91056)
Assume that a comma in front of `enum` means it is actually a part of an
elaborated type in a template parameter list.
Fixes https://github.com/llvm/llvm-project/issues/47782
Commit: db0ed5533368414b1c4e1c884eef651c66359da2
https://github.com/llvm/llvm-project/commit/db0ed5533368414b1c4e1c884eef651c66359da2
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-05-05 (Sun, 05 May 2024)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Don't remove parentheses of fold expressions (#91045)
Fixes #90966.
Commit: b944b543d60c73995a0760f7c53a0a645d3e56df
https://github.com/llvm/llvm-project/commit/b944b543d60c73995a0760f7c53a0a645d3e56df
Author: Luke Lau <luke at igalia.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/rvv/coalesce-vsetvli.mir
Log Message:
-----------
[RISCV] Add RISCVCoalesceVSETVLI tests for removing dead AVLs. NFC
Commit: 947b06282324db8fe2784c4054af9de493a876af
https://github.com/llvm/llvm-project/commit/947b06282324db8fe2784c4054af9de493a876af
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M clang/include/clang/Basic/SourceLocation.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Serialization/SourceLocationEncoding.h
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ModuleFile.cpp
A clang/test/Modules/no-transitive-source-location-change.cppm
M clang/unittests/Serialization/SourceLocationEncodingTest.cpp
Log Message:
-----------
Reland "[Modules] No transitive source location change (#86912)"
This relands 6c31104.
The patch was reverted due to incorrectly introduced alignment. And the
patch was re-commited after fixing the alignment issue.
Following off are the original message:
This is part of "no transitive change" patch series, "no transitive
source location change". I talked this with @Bigcheese in the tokyo's
WG21 meeting.
The idea comes from @jyknight posted on LLVM discourse. That for:
```
// A.cppm
export module A;
...
// B.cppm
export module B;
import A;
...
//--- C.cppm
export module C;
import C;
```
Almost every time A.cppm changes, we need to recompile `B`. Due to we
think the source location is significant to the semantics. But it may be
good if we can avoid recompiling `C` if the change from `A` wouldn't
change the BMI of B.
This patch only cares source locations. So let's focus on source
location's example. We can see the full example from the attached test.
```
//--- A.cppm
export module A;
export template <class T>
struct C {
T func() {
return T(43);
}
};
export int funcA() {
return 43;
}
//--- A.v1.cppm
export module A;
export template <class T>
struct C {
T func() {
return T(43);
}
};
export int funcA() {
return 43;
}
//--- B.cppm
export module B;
import A;
export int funcB() {
return funcA();
}
//--- C.cppm
export module C;
import A;
export void testD() {
C<int> c;
c.func();
}
```
Here the only difference between `A.cppm` and `A.v1.cppm` is that
`A.v1.cppm` has an additional blank line. Then the test shows that two
BMI of `B.cppm`, one specified `-fmodule-file=A=A.pcm` and the other
specified `-fmodule-file=A=A.v1.pcm`, should have the bit-wise same
contents.
However, it is a different story for C, since C instantiates templates
from A, and the instantiation records the source information from module
A, which is different from `A` and `A.v1`, so it is expected that the
BMI `C.pcm` and `C.v1.pcm` can and should differ.
To fully understand the patch, we need to understand how we encodes
source locations and how we serialize and deserialize them.
For source locations, we encoded them as:
```
|
|
| _____ base offset of an imported module
|
|
|
|_____ base offset of another imported module
|
|
|
|
| ___ 0
```
As the diagram shows, we encode the local (unloaded) source location
from 0 to higher bits. And we allocate the space for source locations
from the loaded modules from high bits to 0. Then the source locations
from the loaded modules will be mapped to our source location space
according to the allocated offset.
For example, for,
```
// a.cppm
export module a;
...
// b.cppm
export module b;
import a;
...
```
Assuming the offset of a source location (let's name the location as
`S`) in a.cppm is 45 and we will record the value `45` into the BMI
`a.pcm`. Then in b.cppm, when we import a, the source manager will
allocate a space for module 'a' (according to the recorded number of
source locations) as the base offset of module 'a' in the current source
location spaces. Let's assume the allocated base offset as 90 in this
example. Then when we want to get the location in the current source
location space for `S`, we can get it simply by adding `45` to `90` to
`135`. Finally we can get the source location for `S` in module B as
`135`.
And when we want to write module `b`, we would also write the source
location of `S` as `135` directly in the BMI. And to clarify the
location `S` comes from module `a`, we also need to record the base
offset of module `a`, 90 in the BMI of `b`.
Then the problem comes. Since the base offset of module 'a' is computed
by the number source locations in module 'a'. In module 'b', the
recorded base offset of module 'a' will change every time the number of
source locations in module 'a' increase or decrease. In other words, the
contents of BMI of B will change every time the number of locations in
module 'a' changes. This is pretty sensitive. Almost every change will
change the number of locations. So this is the problem this patch want
to solve.
Let's continue with the existing design to understand what's going on.
Another interesting case is:
```
// c.cppm
export module c;
import whatever;
import a;
import b;
...
```
In `c.cppm`, when we import `a`, we still need to allocate a base
location offset for it, let's say the value becomes to `200` somehow.
Then when we reach the location `S` recorded in module `b`, we need to
translate it into the current source location space. The solution is
quite simple, we can get it by `135 + (200 - 90) = 245`. In another
word, the offset of a source location in current module can be computed
as `Recorded Offset + Base Offset of the its module file - Recorded Base
Offset`.
Then we're almost done about how we handle the offset of source
locations in serializers.
>From the abstract level, what we want to do is to remove the hardcoded
base offset of imported modules and remain the ability to calculate the
source location in a new module unit. To achieve this, we need to be
able to find the module file owning a source location from the encoding
of the source location.
So in this patch, for each source location, we will store the local
offset of the location and the module file index. For the above example,
in `b.pcm`, the source location of `S` will be recorded as `135`
directly. And in the new design, the source location of `S` will be
recorded as `<1, 45>`. Here `1` stands for the module file index of `a`
in module `b`. And `45` means the offset of `S` to the base offset of
module `a`.
So the trade-off here is that, to make the BMI more independent, we need
to record more abstract information. And I feel it is worthy. The
recompilation problem of modules is really annoying and there are still
people complaining this. But if we can make this (including stopping
other changes transitively), I think this may be a killer feature for
modules. And from @Bigcheese , this should be helpful for clang explicit
modules too.
And the benchmarking side, I tested this patch against
https://github.com/alibaba/async_simple/tree/CXX20Modules. No
significant change on compilation time. The size of .pcm files becomes
to 204M from 200M. I think the trade-off is pretty fair.
I didn't use another slot to record the module file index. I tried to
use the higher 32 bits of the existing source location encodings to
store that information. This design may be safe. Since we use `unsigned`
to store source locations but we use uint64_t in serialization. And
generally `unsigned` is 32 bit width in most platforms. So it might not
be a safe problem. Since all the bits we used to store the module file
index is not used before. So the new encodings may be:
```
|-----------------------|-----------------------|
| A | B | C |
* A: 32 bit. The index of the module file in the module manager + 1.
* The +1
here is necessary since we wish 0 stands for the current
module file.
* B: 31 bit. The offset of the source location to the module file
* containing it.
* C: The macro bit. We rotate it to the lowest bit so that we can save
* some
space in case the index of the module file is 0.
```
(The B and C is the existing raw encoding for source locations)
Another reason to reuse the same slot of the source location is to
reduce the impact of the patch. Since there are a lot of places assuming
we can store and get a source location from a slot. And if I tried to
add another slot, a lot of codes breaks. I don't feel it is worhty.
Another impact of this decision is that, the existing small
optimizations for encoding source location may be invalided. The key of
the optimization is that we can turn large values into small values then
we can use VBR6 format to reduce the size. But if we decided to put the
module file index into the higher bits, then maybe it simply doesn't
work. An example may be the `SourceLocationSequence` optimization.
This will only affect the size of on-disk .pcm files. I don't expect
this impact the speed and memory use of compilations. And seeing my
small experiments above, I feel this trade off is worthy.
The mental model for handling source location offsets is not so complex
and I believe we can solve it by adding module file index to each stored
source location.
For the practical side, since the source location is pretty sensitive,
and the patch can pass all the in-tree tests and a small scale projects,
I feel it should be correct.
I'll continue to work on no transitive decl change and no transitive
identifier change (if matters) to achieve the goal to stop the
propagation of unnecessary changes. But all of this depends on this
patch. Since, clearly, the source locations are the most sensitive
thing.
---
The release nots and documentation will be added seperately.
Commit: d70267fbae228990c47b5bdbce7aa659e8b5146e
https://github.com/llvm/llvm-project/commit/d70267fbae228990c47b5bdbce7aa659e8b5146e
Author: Yeting Kuo <46629943+yetingk at users.noreply.github.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
A clang/test/Driver/riscv-option-arch.c
A clang/test/Driver/riscv-option-arch.s
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/test/MC/RISCV/option-arch.s
Log Message:
-----------
[RISCV] Teach .option arch to support experimental extensions. (#89727)
Previously `.option arch` denied extenions are not belongs to RISC-V
features. But experimental features have experimental- prefix, so
`.option arch` can not serve for experimental extension.
This patch uses the features of extensions to identify extension
existance.
Commit: 0348e71885ee8c07e1ae789059ff6d3c9ffce596
https://github.com/llvm/llvm-project/commit/0348e71885ee8c07e1ae789059ff6d3c9ffce596
Author: martinboehme <mboehme at google.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
[clang][dataflow] Fix crash when `operator=` result type is not destination type. (#90898)
The existing code was full of comments about how we assume this is
always the
case, but it's not mandated by the standard, and there is code out there
that
returns a different type. So check that the result type is in fact the
same as
the destination type before attempting to copy to the result.
To make sure that we don't bail out in more cases than intended, I've
extended
existing tests to verify that in the common case, we do return the
destination
object (by reference or value, as the case may be).
Commit: 1500dc0af985db8997744cb103a4b23dd4a81b2d
https://github.com/llvm/llvm-project/commit/1500dc0af985db8997744cb103a4b23dd4a81b2d
Author: Luke Lau <luke at igalia.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/coalesce-vsetvli.mir
Log Message:
-----------
[RISCV] Use virtual registers for AVL instrs in coalesce-vsetvli.mir. NFC
All GPR registers will still be virtual at this stage, so update the test
to reflect that.
Commit: db532ff9584a2fe4b375188400986e0dd17ad92b
https://github.com/llvm/llvm-project/commit/db532ff9584a2fe4b375188400986e0dd17ad92b
Author: xiaoleis-nv <99947620+xiaoleis-nv at users.noreply.github.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/IndirectionUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
Log Message:
-----------
Remove redundant move in return statement (#90546)
This pull request removes unnecessary move in the return statement to
suppress compilation warnings.
Co-authored-by: Xiaolei Shi <xiaoleis at nvidia.com>
Commit: d654278bde8cfc87b962249b6781f079e0384535
https://github.com/llvm/llvm-project/commit/d654278bde8cfc87b962249b6781f079e0384535
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIModeRegisterDefaults.cpp
M llvm/lib/Target/AMDGPU/SIModeRegisterDefaults.h
A llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
Log Message:
-----------
Reapply "AMDGPU: Implement llvm.set.rounding (#88587)" series (#91113)
Revert "Revert 4 last AMDGPU commits to unbreak Windows bots"
This reverts commit 0d493ed2c6e664849a979b357a606dcd8273b03f.
MSVC does not like constexpr on the definition after an extern
declaration of a global.
Commit: 0140ba031c9b6a4028b36adb292fb37eb62f3dc0
https://github.com/llvm/llvm-project/commit/0140ba031c9b6a4028b36adb292fb37eb62f3dc0
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M clang/include/clang/Basic/LangOptions.h
M clang/test/AST/ast-dump-fpfeatures.cpp
M clang/test/AST/ast-dump-fpfeatures.m
M clang/test/AST/ast-dump-late-parsing.cpp
Log Message:
-----------
[clang] Enable FPContract with optnone (#91061)
Previously treatment of the attribute `optnone` was modified in
https://github.com/llvm/llvm-project/pull/85605 ([clang] Set correct
FPOptions if attribute 'optnone' presents). As a side effect FPContract
was disabled for optnone. It created unneeded divergence with the
behavior of -O0, which enables this optimization.
In the discussion
https://github.com/llvm/llvm-project/pull/85605#issuecomment-2089350379
it was pointed out that FP contraction should be enabled even if all
optimizations are turned off, otherwise results of calculations would be
different. This change enables FPContract at optnone.
Commit: ef8d8148b448f9bbeef7cee7bf4f82e3233111cd
https://github.com/llvm/llvm-project/commit/ef8d8148b448f9bbeef7cee7bf4f82e3233111cd
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/IndirectionUtils.h
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
Log Message:
-----------
Revert "Remove redundant move in return statement" (#91169)
Reverts llvm/llvm-project#90546
This broke some bots, seems like some toolchain don’t consider the
implicit move here.
Commit: 181e82143e0069a03ad4d601185665f035b4cc4d
https://github.com/llvm/llvm-project/commit/181e82143e0069a03ad4d601185665f035b4cc4d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/test/CodeGen/SystemZ/zos-ppa2.ll
Log Message:
-----------
SystemZ: Remove redundant REQUIRES systemz from test
Commit: 4b61d04645a5289354b8f0884a132a70bc8b4350
https://github.com/llvm/llvm-project/commit/4b61d04645a5289354b8f0884a132a70bc8b4350
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/test/CodeGen/SystemZ/frame-26.mir
M llvm/test/CodeGen/SystemZ/frame-28.mir
M llvm/test/CodeGen/SystemZ/memcmp-03.ll
Log Message:
-----------
SystemZ: Remove unnecessary REQUIRES asserts from tests
Commit: e2c89254e12e844214d02f1d12bf29ba2ca322c7
https://github.com/llvm/llvm-project/commit/e2c89254e12e844214d02f1d12bf29ba2ca322c7
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
Log Message:
-----------
[AMDGPU] Fix typo in function name
Commit: eb75af223fb07d83808bd40ffde942435e9779d6
https://github.com/llvm/llvm-project/commit/eb75af223fb07d83808bd40ffde942435e9779d6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
A llvm/test/CodeGen/SystemZ/fold-copy-vector-immediate.mir
Log Message:
-----------
Reapply "SystemZ: Fold copy of vector immediate to gr128" (#91099)
This reverts commit a415b4dfcc02e3e82b8c8a7836f7c04b9d65dc9b.
Modify the instruction in place to transform it into a REG_SEQUENCE,
which is what other implementations of foldImmediate do. Also start
erasing the def instruction if there are no other uses.
Fixes #91110.
Commit: 30367cb5982dfdab2655401f020711311e7d78b9
https://github.com/llvm/llvm-project/commit/30367cb5982dfdab2655401f020711311e7d78b9
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M lldb/include/lldb/API/SBType.h
M lldb/source/API/SBType.cpp
M lldb/test/API/python_api/type/TestTypeList.py
M lldb/test/API/python_api/type/main.cpp
Log Message:
-----------
[lldb] Add SBType::GetByteAlign (#90960)
lldb already mostly(*) tracks this information. This just makes it
available to the SB users.
(*) It does not do that for typedefs right now see llvm.org/pr90958
Commit: d3dad7a74be50d90754bf5c072e1a2330e92712c
https://github.com/llvm/llvm-project/commit/d3dad7a74be50d90754bf5c072e1a2330e92712c
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-of-trunc-ext.ll
Log Message:
-----------
[InstCombine] Fix miscompilation caused by #90436 (#91133)
Proof: https://alive2.llvm.org/ce/z/iRnJ4i
Fixes https://github.com/llvm/llvm-project/issues/91127.
Commit: 8a65ee8b2a05e276ab64682c3c9d3f93490cedcc
https://github.com/llvm/llvm-project/commit/8a65ee8b2a05e276ab64682c3c9d3f93490cedcc
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.if-invalid.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.if.xfail.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.64.mir
M llvm/test/CodeGen/AMDGPU/convergence-tokens.ll
Log Message:
-----------
[AMDGPU] don't mark control-flow intrinsics as convergent (#90026)
This is really a workaround to allow control flow lowering in the
presence of convergence control tokens. Control-flow intrinsics in LLVM
IR are convergent because they indirectly represent the wave CFG, i.e.,
sets of threads that are "converged" or "execute in lock-step". But they
exist during a small window in the lowering process, inserted after the
structurizer and then translated to equivalent MIR pseudos. So rather
than create convergence tokens for these builtins, we simply mark them
as not convergent.
The corresponding MIR pseudos are marked as having side effects, which
is sufficient to prevent optimizations without having to mark them as
convergent.
Commit: 9a521e274d0ad4a4a461952d23809320e080ffb4
https://github.com/llvm/llvm-project/commit/9a521e274d0ad4a4a461952d23809320e080ffb4
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/lambda.cpp
Log Message:
-----------
[clang][Interp] Fix primitive lambda capture defaults
We need to use InitField here, not SetField.
Commit: e9bcd2bf6775483a394e24772b66c2bbdf8f4c30
https://github.com/llvm/llvm-project/commit/e9bcd2bf6775483a394e24772b66c2bbdf8f4c30
Author: hev <wangrui at loongson.cn>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/lib/Target/LoongArch/CMakeLists.txt
M llvm/lib/Target/LoongArch/LoongArch.h
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchMachineFunctionInfo.h
A llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/LoongArch/gep-imm.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/add.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-fp.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-minmax.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
A llvm/test/CodeGen/LoongArch/prefer-w-inst.ll
M llvm/test/CodeGen/LoongArch/preferred-alignments.ll
M llvm/test/CodeGen/LoongArch/sextw-removal.ll
M llvm/utils/gn/secondary/llvm/lib/Target/LoongArch/BUILD.gn
Log Message:
-----------
[LoongArch] Optimize *W Instructions at MI level (#90463)
Referring to RISC-V, adding an MI level pass to optimize *W instructions
for LoongArch.
First it removes unneeded sext(addi.w rd, rs, 0) instructions. Either
because the sign extended bits aren't consumed or because the input was
already sign extended by an earlier instruction.
Then:
1. Unless explicit disabled or the target prefers instructions with W
suffix, it removes the -w suffix from opw instructions whenever all
users are dependent only on the lower word of the result of the
instruction. The cases handled are:
* addi.w because it helps reduce test differences between LA32 and LA64
w/o being a pessimization.
2. Or if explicit enabled or the target prefers instructions with W
suffix, it adds the W suffix to the instruction whenever all users are
dependent only on the lower word of the result of the instruction. The
cases handled are:
* add.d/addi.d/sub.d/mul.d.
* slli.d with imm < 32.
* ld.d/ld.wu.
Commit: d98a78590f4f9e43fdfb69fde7d154a985e4560f
https://github.com/llvm/llvm-project/commit/d98a78590f4f9e43fdfb69fde7d154a985e4560f
Author: WANG Rui <wangrui at loongson.cn>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/test/CodeGen/LoongArch/rotl-rotr.ll
Log Message:
-----------
[LoongArch] Mark data type i32 are sign-extended. NFC
Commit: 69d740e5d64257524914aabd6dfead7565185d4f
https://github.com/llvm/llvm-project/commit/69d740e5d64257524914aabd6dfead7565185d4f
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeEmitter.cpp
M clang/test/AST/Interp/cxx23.cpp
M clang/test/SemaCXX/cxx2b-deducing-this-constexpr.cpp
Log Message:
-----------
[clang][Interp] Fix creating functions with explicit instance parameters
Commit: 0933a7a12508901f1c99c3a23f2841740a1cf845
https://github.com/llvm/llvm-project/commit/0933a7a12508901f1c99c3a23f2841740a1cf845
Author: WANG Rui <wangrui at loongson.cn>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp
M llvm/test/CodeGen/LoongArch/prefer-w-inst.ll
Log Message:
-----------
[LoongArch] Rename some OptWInstrs functions. NFC
Commit: 522b4bfe5b140068a7f9b3d899740a460aa0e715
https://github.com/llvm/llvm-project/commit/522b4bfe5b140068a7f9b3d899740a460aa0e715
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/RISCV/bitreverse-shift.ll
M llvm/test/CodeGen/X86/combine-bitreverse.ll
Log Message:
-----------
[DAG] Fold bitreverse(shl/srl(bitreverse(x),y)) -> srl/shl(x,y) (#89897)
Noticed while investigating GFNI per-element vector shifts (we can form SHL but not SRL/SRA)
Alive2: https://alive2.llvm.org/ce/z/fSH-rf
Commit: 0a0cac6dbd0ef67eb473f85a968bbf4ebea5220d
https://github.com/llvm/llvm-project/commit/0a0cac6dbd0ef67eb473f85a968bbf4ebea5220d
Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/test/CodeGen/SystemZ/atomic-load-08.ll
M llvm/test/CodeGen/SystemZ/atomic-store-08.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-fmax-03.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-fmin-03.ll
Log Message:
-----------
[SystemZ] Simplify f128 atomic load/store (#90977)
Change definition of expandBitCastI128ToF128 and expandBitCastF128ToI128
to allow for simplified use in atomic load/store.
Update logic to split 128-bit loads and stores in DAGCombine to also
handle the f128 case where appropriate. This fixes the regressions
introduced by recent atomic load/store patches.
Commit: 8e7618aa21652132f930b6576b92291c5f1d46b6
https://github.com/llvm/llvm-project/commit/8e7618aa21652132f930b6576b92291c5f1d46b6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/horizontal-sum.ll
M llvm/test/CodeGen/X86/oddshuffles.ll
M llvm/test/CodeGen/X86/pr34592.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll
Log Message:
-----------
[X86] Fold BLEND(PERMUTE(X),PERMUTE(Y)) -> PERMUTE(BLEND(X,Y)) (#90219)
If we don't demand the same element from both single source shuffles (permutes), then attempt to blend the sources together first and then perform a merged permute.
For vXi16 blends we have to be careful as these are much more likely to involve byte/word vector shuffles that will result in the creation of additional shuffle instructions.
This fold might be worth it for VSELECT with constant masks on AVX512 targets, but I haven't investigated this yet, but I've tried to write combineBlendOfPermutes so to be prepared for this.
The PR34592 -O0 regression is an unfortunate failure to cleanup with a later pass that calls SimplifyDemandedElts like the -O3 does - I'm not sure how worried we should be tbh.
Commit: 6217abce86b55778cf39f7db7f591a16b9fd4d28
https://github.com/llvm/llvm-project/commit/6217abce86b55778cf39f7db7f591a16b9fd4d28
Author: Hans Wennborg <hans at chromium.org>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M clang/test/Driver/riscv-option-arch.c
M clang/test/Driver/riscv-option-arch.s
Log Message:
-----------
Add requires clause to risc-v clang driver tests
Followup to #89727
Commit: 47214903b1c6d0590780c7e69a2e3e612f43e4a2
https://github.com/llvm/llvm-project/commit/47214903b1c6d0590780c7e69a2e3e612f43e4a2
Author: Xing Xue <xingxue at outlook.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M libcxxabi/src/aix_state_tab_eh.inc
Log Message:
-----------
[libc++abi][AIX] Use different function pointer types for destructors with 1 or 2 args (#89624)
The destructors generated by the legacy IBM `xlclang++` compiler can
take 1 or 2 arguments and the differences were handled by type `cast`
where it is needed. Clang now treats the `cast` here as an error after
https://github.com/llvm/llvm-project/commit/999d4f840777bf8de26d45947192aa0728edc0fb
landed with `-Xextra -Werror`. The issue had been worked around by using
`#pragma GCC diagnostic push/pop`. This patch defines 2 separate
destructor types for 1 argument and 2 arguments respectively so `cast`
is not needed.
Commit: a9241998fcded780b9c6473dc4e5f8b732027f99
https://github.com/llvm/llvm-project/commit/a9241998fcded780b9c6473dc4e5f8b732027f99
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Fix -Wsign-compare in X86ISelLowering.cpp (NFC)
llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp:40081:21:
error: comparison of integers of different signs: 'int' and 'unsigned int' [-Werror,-Wsign-compare]
for (int I = 0; I != NumElts; ++I) {
~ ^ ~~~~~~~
1 error generated.
Commit: b2c2fef5fa5a000629c22be4955641e1ab0ca491
https://github.com/llvm/llvm-project/commit/b2c2fef5fa5a000629c22be4955641e1ab0ca491
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Fix -Wunused-function in X86ISelLowering.cpp (NFC)
llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp:3582:13:
error: unused function 'isBlendOrUndef' [-Werror,-Wunused-function]
static bool isBlendOrUndef(ArrayRef<int> Mask) {
^
1 error generated.
Commit: 1e9625e59571042ad11039d11d7744c95c4da2f7
https://github.com/llvm/llvm-project/commit/1e9625e59571042ad11039d11d7744c95c4da2f7
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.h
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Lower/OpenMP/default-clause-byref.f90
M flang/test/Lower/OpenMP/default-clause.f90
A flang/test/Lower/OpenMP/implicit-dsa.f90
A flang/test/Semantics/OpenMP/implicit-dsa.f90
M flang/test/Semantics/OpenMP/symbol08.f90
Log Message:
-----------
[flang][OpenMP] Support tasks' implicit firstprivate DSA (#85989)
Handle implicit firstprivate DSAs on task generating constructs.
Fixes https://github.com/llvm/llvm-project/issues/64480
Commit: e365ac809e1c01bbbcf70a20057f3dbbc7e14b49
https://github.com/llvm/llvm-project/commit/e365ac809e1c01bbbcf70a20057f3dbbc7e14b49
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Semantics/OpenMP/parallel-critical-do.f90
A flang/test/Semantics/OpenMP/parallel-sections-do.f90
Log Message:
-----------
[flang][OpenMP] Fix symbol handling in critical/sections constructs (#90671)
Fixes https://github.com/llvm/llvm-project/issues/78936
Commit: 6e31a49931b8b057868a64e89838e3c9b40f9198
https://github.com/llvm/llvm-project/commit/6e31a49931b8b057868a64e89838e3c9b40f9198
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/test/Driver/plugin-driver-args.cpp
Log Message:
-----------
[driver] Do not warn about unused plugin flags. (#88948)
Plugins are not loaded without the -cc1 phase. Do not report them when
running on an assembly file or when linking. Many build tools add these
options to all driver invocations, including LLVM's build system.
Fixes #88173
Commit: 148b721772ca626cf42be2c24a23e4aa3c62a6e0
https://github.com/llvm/llvm-project/commit/148b721772ca626cf42be2c24a23e4aa3c62a6e0
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/test/Analysis/LoopAccessAnalysis/multiple-strides-rt-memory-checks.ll
Log Message:
-----------
[LAA] Update check line in test to fully match message.
Commit: 10ec0d20892c170182a50129614675d3173a3f44
https://github.com/llvm/llvm-project/commit/10ec0d20892c170182a50129614675d3173a3f44
Author: Yuanqiang Liu <liuyuanqiang.yqliu at bytedance.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M mlir/python/mlir/ir.py
M mlir/test/python/dialects/python_test.py
Log Message:
-----------
[MLIR] fix _f64ElementsAttr in ir.py (#91176)
Commit: 09adb53118e50ad433b7df6d84a4e2937bfb97d5
https://github.com/llvm/llvm-project/commit/09adb53118e50ad433b7df6d84a4e2937bfb97d5
Author: Chris <cbate at nvidia.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M mlir/lib/Dialect/EmitC/Transforms/FormExpressions.cpp
M mlir/test/Dialect/EmitC/transforms.mlir
Log Message:
-----------
[MLIR][EmitC] Fix bug in EmitC form-expressions pass (#91084)
An `emitc.expression` can only yield a single result, but some
operations which have the `CExpression` trait can have multiple results,
which can result in a crash when applying the `fold-expressions` pass.
This change adds a check for the single-result condition and a simple
test.
Commit: 5f73d29cb74abf5b4eca113386b18110a53b1b6a
https://github.com/llvm/llvm-project/commit/5f73d29cb74abf5b4eca113386b18110a53b1b6a
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
A llvm/test/Analysis/LoopAccessAnalysis/unknown-dependence-retry-with-runtime-checks.ll
Log Message:
-----------
[LAA] Add tests showing extra unnecessary runtime checks.
Pre-commit tests for an upcoming patch.
Commit: 4d839d8f18e41bd97e1c5e82d53ad5687c07e586
https://github.com/llvm/llvm-project/commit/4d839d8f18e41bd97e1c5e82d53ad5687c07e586
Author: martinboehme <mboehme at google.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
[clang][dataflow] Don't propagate result objects in unevaluated contexts (reland #90438) (#91172)
This relands #90348 with a fix for a [buildbot
failure](https://lab.llvm.org/buildbot/#/builders/216/builds/38446)
caused by the test being run with `-fno-rtti`.
Commit: d751e407def4e1540ae0af12a179ce4f2a8f676c
https://github.com/llvm/llvm-project/commit/d751e407def4e1540ae0af12a179ce4f2a8f676c
Author: Danny Mösch <danny.moesch at icloud.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M clang/lib/Frontend/InterfaceStubFunctionsConsumer.cpp
Log Message:
-----------
[NFC] Use `const&` avoiding copies (#90334)
Fixes #90285.
Commit: ecfb5d9951554d8bdb6a499c958f48cc35f78a88
https://github.com/llvm/llvm-project/commit/ecfb5d9951554d8bdb6a499c958f48cc35f78a88
Author: Michael Flanders <flanders.michaelk at gmail.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M libc/test/UnitTest/FPMatcher.h
M libc/test/src/math/RoundToIntegerTest.h
M libc/test/src/math/atanf_test.cpp
M libc/test/src/math/atanhf_test.cpp
M libc/test/src/math/smoke/NextAfterTest.h
M libc/test/src/math/smoke/NextTowardTest.h
M libc/test/src/math/smoke/RoundToIntegerTest.h
M libc/test/src/math/smoke/atan2f_test.cpp
M libc/test/src/math/smoke/atanf_test.cpp
M libc/test/src/math/smoke/atanhf_test.cpp
Log Message:
-----------
[libc][math] fix loose except check in `{EXPECT,ASSERT}_FP_EXCEPTION` macros (#88816)
Adds more FP test macros for the upcoming test adds for #61092 and the
issues opened from it: #88768, #88769, #88770, #88771, #88772.
Fix bug in `{EXPECT,ASSERT}_FP_EXCEPTION`. `EXPECT_FP_EXCEPTION(0)`
seems to be used to test that an exception did not happen, but it always
does `EXPECT_GE(... & 0, 0)` which never fails.
Update and refactor tests that break after the above bug fix. An
interesting way things broke after the above change is that
`ForceRoundingMode` and `quick_get_round()` were raising the inexact
exception, breaking a lot of the `atan*` tests.
The changes for all files other than `FPMatcher.h` and
`libc/test/src/math/smoke/RoundToIntegerTest.h` should have the same
semantics as before. For `RoundToIntegerTest.h`, lines 56-58 before the
changes do not always hold since this test is used for functions with
different exception and errno behavior like `lrint` and `lround`. I've
deleted those lines for now, but tests for those cases should be added
for the different nearest int functions to account for this.
Adding @nickdesaulniers for review.
Commit: d71771dd2748057532603813139d8fd61e83ea79
https://github.com/llvm/llvm-project/commit/d71771dd2748057532603813139d8fd61e83ea79
Author: Jan Voung <jvoung at gmail.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M lld/test/COFF/thinlto-index-only.ll
M lld/test/ELF/lto/thinlto-emit-index.ll
M lld/test/ELF/lto/thinlto-index-only.ll
M lld/test/MachO/thinlto-emit-index.ll
M lld/test/MachO/thinlto-index-only.ll
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/test/Assembler/thinlto-summary.ll
M llvm/test/Bitcode/summary_version.ll
M llvm/test/Bitcode/thinlto-alias.ll
M llvm/test/Bitcode/thinlto-func-summary-vtableref-pgo.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-partial-sample-profile-summary.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-pgo.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-profile-summary.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-sample-profile-summary.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph.ll
M llvm/test/Bitcode/thinlto-function-summary-originalnames.ll
M llvm/test/Bitcode/thinlto-function-summary-paramaccess.ll
M llvm/test/ThinLTO/X86/distributed_indexes.ll
M llvm/test/tools/gold/X86/thinlto.ll
M llvm/test/tools/llvm-lto/thinlto.ll
Log Message:
-----------
Revert "Reapply "Use an abbrev to reduce size of VALUE_GUID records in ThinLTO summaries" (#90610)" (#91194)
Reverts llvm/llvm-project#90692
Breaking PPC buildbots. The bots are not meant to test LLD, but are
running a test that is using an old version of LLD without the change
(so is incompatible). Revert until a fix is found.
Commit: 7b040d01c59505d62d4700c75b0438269a0f7bb4
https://github.com/llvm/llvm-project/commit/7b040d01c59505d62d4700c75b0438269a0f7bb4
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Don't fail when SBProcess::GetMemoryRegionInfo returns error. (#87649)
`SBProcess::GetMemoryRegionInfo` uses `qMemoryRegionInfo` packet to get
memory region info, but this is not supported in gdb-server and causing
downstream lldb test failures. This change ignores the the error from
`SBProcess::GetMemoryRegionInfo` .
Reported by @tedwoodward @jerinphilip.
Commit: 1b22ecae1f53af48f4c0e6438ae6fb4d73a8769d
https://github.com/llvm/llvm-project/commit/1b22ecae1f53af48f4c0e6438ae6fb4d73a8769d
Author: David Tenty <daltenty at ibm.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/cmake/modules/LLVMExternalProjectUtils.cmake
Log Message:
-----------
Revert "[AIX][CMake] Use top-level tools in llvm_ExternalProject_Add" (#91019)
This reverts commit 11066449d49e20f18f46757df07455c6abcedcf1.
As noted in the original patch, this was designed to reverted once
https://reviews.llvm.org/D142479 and https://reviews.llvm.org/D142660
landed, which has long since happened.
Commit: 1241e7692a466ceb420be2780f1c3e8bbab7d469
https://github.com/llvm/llvm-project/commit/1241e7692a466ceb420be2780f1c3e8bbab7d469
Author: Franklin Zhang <zhangfenglei at huawei.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/strncmp-1.ll
Log Message:
-----------
[AggressiveInstCombine] Fix strncmp inlining (#91204)
Fix the issue that `char` constants are converted to `uint64_t` in the
wrong way when doing the inlining.
Commit: d584df6c8fd4f1a517fa7373d43e9ba2cb10f47f
https://github.com/llvm/llvm-project/commit/d584df6c8fd4f1a517fa7373d43e9ba2cb10f47f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll
Log Message:
-----------
[SLP][NFC]Add a test with incorrect smin analysis for minimal bitwidth, NFC.
Commit: a4760321017bd55f51ea0961231ca48ce9e14624
https://github.com/llvm/llvm-project/commit/a4760321017bd55f51ea0961231ca48ce9e14624
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll
Log Message:
-----------
[SLP]Fix PR91025: correctly handle smin/smax of signed operands.
Need to check that the signed operand has an extra sign bit to be sure
that we do not skip signedness, when trying to minimize bitwidth for
smin/smax intrinsics.
Commit: 5cb13bfd897f5d69439058d3cd7b1af8a37c7e42
https://github.com/llvm/llvm-project/commit/5cb13bfd897f5d69439058d3cd7b1af8a37c7e42
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ReturnConstRefFromParameterCheck.cpp
Log Message:
-----------
[NFC][clang-tidy]increase stability for bugprone-return-const-ref-from-parameter (#91160)
Commit: 9d9bd76458ebc7c842c200982cfa0a490ccbe8cf
https://github.com/llvm/llvm-project/commit/9d9bd76458ebc7c842c200982cfa0a490ccbe8cf
Author: Luke Lau <luke at igalia.com>
Date: 2024-05-07 (Tue, 07 May 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Log Message:
-----------
[RISCV] Check dead flag on VL def op in RISCVCoalesceVSETVLI. NFC (#91168)
Because LiveVariables has been run, we no longer need to lookup the
users in MachineRegisterInfo anymore and can instead just check for the
dead flag.
Commit: 6542e5663d1e599d5ed7c961842ce2fcdc9f5090
https://github.com/llvm/llvm-project/commit/6542e5663d1e599d5ed7c961842ce2fcdc9f5090
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/sections.f90
Log Message:
-----------
[flang][OpenMP] Move privatizations out of sections (#88191)
Besides duplicating code, privatizing variables in every section
causes problems when synchronization barriers are used. This
happens because each section is executed by a given thread, which
will cause the program to hang if not all running threads execute
the barrier operation.
Fixes https://github.com/llvm/llvm-project/issues/72824
Commit: e50060fc6fc9ca41fe4b266f3b68005247327247
https://github.com/llvm/llvm-project/commit/e50060fc6fc9ca41fe4b266f3b68005247327247
Author: David Green <david.green at arm.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-uzp.ll
M llvm/test/CodeGen/AArch64/arm64-zip.ll
M llvm/test/CodeGen/AArch64/neon-perm.ll
Log Message:
-----------
[AArch64][GlobalISel] Addition GISel test coverage for shuffles. NFC
Commit: 48c8a5791ae71c96661479f684459b7b9427a22d
https://github.com/llvm/llvm-project/commit/48c8a5791ae71c96661479f684459b7b9427a22d
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Sema/SemaOpenACC.h
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/AST/ast-print-openacc-compute-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
A clang/test/SemaOpenACC/compute-construct-attach-clause.c
A clang/test/SemaOpenACC/compute-construct-attach-clause.cpp
A clang/test/SemaOpenACC/compute-construct-deviceptr-clause.c
A clang/test/SemaOpenACC/compute-construct-deviceptr-clause.cpp
M clang/test/SemaOpenACC/compute-construct-varlist-ast.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[OpenACC] Implement 'deviceptr' and 'attach' sema for compute constructs
These two are very similar to the other 'var-list' variants, except they
require that the type of the variable be a pointer. This patch
implements that restriction.
Commit: b9541f9879b7c43d796e78e32ac896dd05550d71
https://github.com/llvm/llvm-project/commit/b9541f9879b7c43d796e78e32ac896dd05550d71
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M flang/test/Semantics/cuf13.cuf
Log Message:
-----------
[flang][cuda][NFC] Fix Semantics/cuf13.cuf test on Darwin
Commit: 52187b9f2e7ef0997269bcf64b3d2512a52467ed
https://github.com/llvm/llvm-project/commit/52187b9f2e7ef0997269bcf64b3d2512a52467ed
Author: Luke Lau <luke at igalia.com>
Date: 2024-05-07 (Tue, 07 May 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
Log Message:
-----------
[RISCV] Move RISCVDeadRegisterDefinitions to post vector regalloc (#90636)
Currently RISCVDeadRegisterDefinitions runs after vsetvli insertion, but
in #70549 vsetvli insertion runs after vector regalloc and as a result
we no longer convert some vsetvli a0, a0s to vsetvli x0, a0. This patch
moves it to after vector regalloc, but before scalar regalloc so we
still get the benefits of reducing register pressure.
Commit: 5fa24ac277172045a81603bb56e66b5f4a27f99e
https://github.com/llvm/llvm-project/commit/5fa24ac277172045a81603bb56e66b5f4a27f99e
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M lld/MachO/ObjC.cpp
M lld/test/MachO/objc-category-merging-extern-class-minimal.s
Log Message:
-----------
[lld-macho] Category Merger: add support for addrsig references (#90903)
When generating categories, clang sometimes will generate references in
the `.addrsig` section to the various category data items. Since we may
erase such items after merging them, we also need to remove them from
the `.addrsig` section - otherwise this will cause runtime asserts with
the `.addrsig` section trying to access invalid data.
Implementation wise, we use a hashset to keep track of all erased
`InputSection`'s and then go through all `.addrsig` sections and remove
references to any erased `InputSection`.
Commit: 9fc0b1824bfec0a65f4e2b840b23eedd9c2de4cf
https://github.com/llvm/llvm-project/commit/9fc0b1824bfec0a65f4e2b840b23eedd9c2de4cf
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M lld/MachO/ObjC.cpp
M lld/test/MachO/objc-category-merging-extern-class-minimal.s
Log Message:
-----------
[lld-macho] Add support for category names in ConcatInputSection's (#90850)
In some cases we see strings from categories being part of "data"
sections (Ex:`__objc_const`), not part of of sections marked as
`cstring_literals`. Since lld treats these sections differently we need
to explicitly implement support for reading strings from the
non-`cstring_literals` sections.
Adding a test that previously would result in an assert.
Commit: cf6d79711d8a423cade5a555db650cb46a74e565
https://github.com/llvm/llvm-project/commit/cf6d79711d8a423cade5a555db650cb46a74e565
Author: Alex Langford <alangford at apple.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDefines.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDefines.h
Log Message:
-----------
[lldb][NFCI] Remove unused DWARF value-to-name functions (#91010)
I was cleaning up this portion of the code and realized these are
completely unused.
Commit: f0f02b9c3eb1834f4c38d0c95bf19559869788ea
https://github.com/llvm/llvm-project/commit/f0f02b9c3eb1834f4c38d0c95bf19559869788ea
Author: Andy Kaylor <andrew.kaylor at intel.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
Log Message:
-----------
[NFC][Driver] Clean up RenderFloatingPointOptions() (#91017)
This change refactors RenderFloatingPointOptions() to eliminate some
excessively complicated logic and a redundant switch statement. The
logic being simplified is an artifact of the original -ffp-model
implementation, and over time it has become unnecessary.
The handling of diagnostics related to the -ffp-contract option is
still a bit convoluted after this change. I will address that in a
subsequent patch because I think it will make sense to make some minor
changes to the driver behavior when that is cleaned up. The current
patch should not make any change to observable behavior of the driver.
Commit: c144157f3df0dc5cd147cd1c531d75193fd6a22f
https://github.com/llvm/llvm-project/commit/c144157f3df0dc5cd147cd1c531d75193fd6a22f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-stores-vectorized.ll
Log Message:
-----------
[SLP]Use last pointer instead of first for reversed strided stores.
Need to use the last address of the vectorized stores for the strided
stores, not the first one, to correctly store the data.
Commit: d0be944aa51194145cd15c987af67489f735059d
https://github.com/llvm/llvm-project/commit/d0be944aa51194145cd15c987af67489f735059d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M llvm/lib/Target/X86/X86.td
M llvm/test/CodeGen/X86/bypass-slow-division-64.ll
Log Message:
-----------
[X86] Add slow div64 tuning flag to Nehalem target (#91129)
This appears to have been missed because later cpus don't inherit from Nehalem tuning much.
Noticed while cleaning up for #90985
Commit: e4d242768aefabc0091dd01fabecaffbc2b6984b
https://github.com/llvm/llvm-project/commit/e4d242768aefabc0091dd01fabecaffbc2b6984b
Author: Fangrui Song <i at maskray.me>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M clang/test/Analysis/addrspace-null.c
M clang/test/Analysis/ctu-cxxdefaultinitexpr.cpp
M clang/test/Analysis/ctu-lookup-name-with-space.cpp
M clang/test/Analysis/ctu-main.c
M clang/test/Analysis/ctu-on-demand-parsing.c
M clang/test/Analysis/handle_constructors_for_default_arguments.cpp
M clang/test/Analysis/handle_constructors_with_new_array.cpp
M clang/test/Analysis/html_diagnostics/relevant_lines/goto.c
M clang/test/Analysis/html_diagnostics/relevant_lines/macros_same_file.c
M clang/test/Analysis/html_diagnostics/relevant_lines/multifile.c
M clang/test/Analysis/html_diagnostics/relevant_lines/multiline_func_def.c
M clang/test/Analysis/html_diagnostics/relevant_lines/notexecutedlines.c
M clang/test/Analysis/html_diagnostics/relevant_lines/objcmethods.m
M clang/test/Analysis/html_diagnostics/relevant_lines/simple_conditional.c
M clang/test/Analysis/html_diagnostics/relevant_lines/switch.c
M clang/test/Analysis/html_diagnostics/relevant_lines/switch_default.c
M clang/test/Analysis/html_diagnostics/relevant_lines/synthesized_body.cpp
M clang/test/Analysis/html_diagnostics/relevant_lines/unused_header.c
M clang/test/Analysis/inlining/temp-dtors-path-notes.cpp
M clang/test/Analysis/new-aligned.cpp
M clang/test/Analysis/osobject-retain-release.cpp
M clang/test/Analysis/ptr-cmp-const-trunc.cl
M clang/test/Analysis/region_store_overflow.c
M clang/test/Analysis/solver-sym-simplification-bool.cpp
M clang/test/Analysis/solver-sym-simplification-ptr-bool.cl
M clang/test/Analysis/transparent_union_bug.c
M clang/test/Analysis/trustnonnullchecker_test.m
M clang/test/Analysis/trustnonnullchecker_test.mm
M clang/test/Analysis/undef-call.c
M clang/test/OpenMP/amdgpu_exceptions.cpp
M clang/test/OpenMP/amdgpu_throw.cpp
M clang/test/OpenMP/amdgpu_try_catch.cpp
M clang/test/OpenMP/nvptx_exceptions.cpp
M clang/test/OpenMP/nvptx_throw.cpp
M clang/test/OpenMP/nvptx_try_catch.cpp
M clang/test/OpenMP/x86_target_exceptions.cpp
M clang/test/OpenMP/x86_target_throw.cpp
M clang/test/OpenMP/x86_target_try_catch.cpp
M clang/test/Rewriter/rewrite-super-message.mm
Log Message:
-----------
[test] %clang_cc1 -analyze: remove redundant actions
Commit: 3099ab651c5f1fb8f2f5a4e2861943ae7737fa13
https://github.com/llvm/llvm-project/commit/3099ab651c5f1fb8f2f5a4e2861943ae7737fa13
Author: Fangrui Song <i at maskray.me>
Date: 2024-05-06 (Mon, 06 May 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ReturnConstRefFromParameterCheck.cpp
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/LangOptions.h
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Basic/SourceLocation.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Serialization/SourceLocationEncoding.h
M clang/lib/AST/Interp/ByteCodeEmitter.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/lib/Analysis/FlowSensitive/Transfer.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/InterfaceStubFunctionsConsumer.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/ModuleFile.cpp
M clang/test/AST/Interp/cxx23.cpp
M clang/test/AST/Interp/lambda.cpp
M clang/test/AST/ast-dump-fpfeatures.cpp
M clang/test/AST/ast-dump-fpfeatures.m
M clang/test/AST/ast-dump-late-parsing.cpp
M clang/test/AST/ast-print-openacc-compute-construct.cpp
M clang/test/Analysis/addrspace-null.c
M clang/test/Analysis/ctu-cxxdefaultinitexpr.cpp
M clang/test/Analysis/ctu-lookup-name-with-space.cpp
M clang/test/Analysis/ctu-main.c
M clang/test/Analysis/ctu-on-demand-parsing.c
M clang/test/Analysis/handle_constructors_for_default_arguments.cpp
M clang/test/Analysis/handle_constructors_with_new_array.cpp
M clang/test/Analysis/html_diagnostics/relevant_lines/goto.c
M clang/test/Analysis/html_diagnostics/relevant_lines/macros_same_file.c
M clang/test/Analysis/html_diagnostics/relevant_lines/multifile.c
M clang/test/Analysis/html_diagnostics/relevant_lines/multiline_func_def.c
M clang/test/Analysis/html_diagnostics/relevant_lines/notexecutedlines.c
M clang/test/Analysis/html_diagnostics/relevant_lines/objcmethods.m
M clang/test/Analysis/html_diagnostics/relevant_lines/simple_conditional.c
M clang/test/Analysis/html_diagnostics/relevant_lines/switch.c
M clang/test/Analysis/html_diagnostics/relevant_lines/switch_default.c
M clang/test/Analysis/html_diagnostics/relevant_lines/synthesized_body.cpp
M clang/test/Analysis/html_diagnostics/relevant_lines/unused_header.c
M clang/test/Analysis/inlining/temp-dtors-path-notes.cpp
M clang/test/Analysis/new-aligned.cpp
M clang/test/Analysis/osobject-retain-release.cpp
M clang/test/Analysis/ptr-cmp-const-trunc.cl
M clang/test/Analysis/region_store_overflow.c
M clang/test/Analysis/solver-sym-simplification-bool.cpp
M clang/test/Analysis/solver-sym-simplification-ptr-bool.cl
M clang/test/Analysis/transparent_union_bug.c
M clang/test/Analysis/trustnonnullchecker_test.m
M clang/test/Analysis/trustnonnullchecker_test.mm
M clang/test/Analysis/undef-call.c
M clang/test/CodeGen/aarch64-type-sizes.c
M clang/test/CodeGen/coff-aarch64-type-sizes.c
M clang/test/CodeGen/target-data.c
M clang/test/CodeGenCXX/member-alignment.cpp
M clang/test/Driver/plugin-driver-args.cpp
A clang/test/Driver/riscv-option-arch.c
A clang/test/Driver/riscv-option-arch.s
M clang/test/Frontend/multiple-actions.c
A clang/test/Modules/no-transitive-source-location-change.cppm
M clang/test/OpenMP/amdgpu_exceptions.cpp
M clang/test/OpenMP/amdgpu_throw.cpp
M clang/test/OpenMP/amdgpu_try_catch.cpp
M clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_num_threads_codegen.cpp
M clang/test/OpenMP/nvptx_exceptions.cpp
M clang/test/OpenMP/nvptx_throw.cpp
M clang/test/OpenMP/nvptx_try_catch.cpp
M clang/test/OpenMP/x86_target_exceptions.cpp
M clang/test/OpenMP/x86_target_throw.cpp
M clang/test/OpenMP/x86_target_try_catch.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/Rewriter/rewrite-super-message.mm
M clang/test/SemaCXX/cxx2b-deducing-this-constexpr.cpp
A clang/test/SemaOpenACC/compute-construct-attach-clause.c
A clang/test/SemaOpenACC/compute-construct-attach-clause.cpp
A clang/test/SemaOpenACC/compute-construct-deviceptr-clause.c
A clang/test/SemaOpenACC/compute-construct-deviceptr-clause.cpp
M clang/test/SemaOpenACC/compute-construct-varlist-ast.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Serialization/SourceLocationEncodingTest.cpp
M flang/include/flang/Semantics/symbol.h
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Lower/OpenMP/default-clause-byref.f90
M flang/test/Lower/OpenMP/default-clause.f90
A flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/sections.f90
A flang/test/Semantics/OpenMP/implicit-dsa.f90
A flang/test/Semantics/OpenMP/parallel-critical-do.f90
A flang/test/Semantics/OpenMP/parallel-sections-do.f90
M flang/test/Semantics/OpenMP/symbol08.f90
M flang/test/Semantics/cuf13.cuf
M libc/test/UnitTest/FPMatcher.h
M libc/test/src/math/RoundToIntegerTest.h
M libc/test/src/math/atanf_test.cpp
M libc/test/src/math/atanhf_test.cpp
M libc/test/src/math/smoke/NextAfterTest.h
M libc/test/src/math/smoke/NextTowardTest.h
M libc/test/src/math/smoke/RoundToIntegerTest.h
M libc/test/src/math/smoke/atan2f_test.cpp
M libc/test/src/math/smoke/atanf_test.cpp
M libc/test/src/math/smoke/atanhf_test.cpp
M libcxx/test/libcxx/clang_modules_include.gen.py
M libcxx/test/libcxx/clang_tidy.gen.py
M libcxx/test/libcxx/double_include.gen.py
M libcxx/test/libcxx/transitive_includes.gen.py
M libcxxabi/src/aix_state_tab_eh.inc
M lld/MachO/ObjC.cpp
M lld/test/COFF/thinlto-index-only.ll
M lld/test/ELF/lto/thinlto-emit-index.ll
M lld/test/ELF/lto/thinlto-index-only.ll
M lld/test/MachO/objc-category-merging-extern-class-minimal.s
M lld/test/MachO/thinlto-emit-index.ll
M lld/test/MachO/thinlto-index-only.ll
M lldb/include/lldb/API/SBType.h
M lldb/source/API/SBType.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDefines.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDefines.h
M lldb/test/API/python_api/type/TestTypeList.py
M lldb/test/API/python_api/type/main.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
M llvm/cmake/modules/LLVMExternalProjectUtils.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm/ADT/StringRef.h
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCombine.td
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIModeRegisterDefaults.cpp
M llvm/lib/Target/AMDGPU/SIModeRegisterDefaults.h
M llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp
M llvm/lib/Target/BPF/BTFDebug.cpp
M llvm/lib/Target/Hexagon/HexagonTargetObjectFile.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
M llvm/lib/Target/LoongArch/CMakeLists.txt
M llvm/lib/Target/LoongArch/LoongArch.h
M llvm/lib/Target/LoongArch/LoongArch.td
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchMachineFunctionInfo.h
A llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
M llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86FixupBWInsts.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Analysis/LoopAccessAnalysis/multiple-strides-rt-memory-checks.ll
A llvm/test/Analysis/LoopAccessAnalysis/unknown-dependence-retry-with-runtime-checks.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/hidden-diverge-gmir.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/temporal-divergence.mir
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/uses-value-from-cycle.mir
M llvm/test/Assembler/thinlto-summary.ll
M llvm/test/Bitcode/summary_version.ll
M llvm/test/Bitcode/thinlto-alias.ll
M llvm/test/Bitcode/thinlto-func-summary-vtableref-pgo.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-partial-sample-profile-summary.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-pgo.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-profile-summary.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph-sample-profile-summary.ll
M llvm/test/Bitcode/thinlto-function-summary-callgraph.ll
M llvm/test/Bitcode/thinlto-function-summary-originalnames.ll
M llvm/test/Bitcode/thinlto-function-summary-paramaccess.ll
M llvm/test/CodeGen/AArch64/arm64-uzp.ll
M llvm/test/CodeGen/AArch64/arm64-zip.ll
M llvm/test/CodeGen/AArch64/mul_pow2.ll
M llvm/test/CodeGen/AArch64/neon-perm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.if-invalid.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.if.xfail.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.64.mir
M llvm/test/CodeGen/AMDGPU/convergence-tokens.ll
A llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/LoongArch/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/LoongArch/gep-imm.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/add.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomic-cmpxchg.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-fp.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-minmax.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
A llvm/test/CodeGen/LoongArch/prefer-w-inst.ll
M llvm/test/CodeGen/LoongArch/preferred-alignments.ll
M llvm/test/CodeGen/LoongArch/rotl-rotr.ll
M llvm/test/CodeGen/LoongArch/sextw-removal.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/bitreverse-shift.ll
A llvm/test/CodeGen/RISCV/rvv/coalesce-vsetvli.mir
M llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
M llvm/test/CodeGen/SystemZ/atomic-load-08.ll
M llvm/test/CodeGen/SystemZ/atomic-store-08.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-fmax-03.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-fmin-03.ll
A llvm/test/CodeGen/SystemZ/fold-copy-vector-immediate.mir
M llvm/test/CodeGen/SystemZ/frame-26.mir
M llvm/test/CodeGen/SystemZ/frame-28.mir
M llvm/test/CodeGen/SystemZ/memcmp-03.ll
M llvm/test/CodeGen/SystemZ/zos-ppa2.ll
M llvm/test/CodeGen/X86/bypass-slow-division-64.ll
M llvm/test/CodeGen/X86/combine-bitreverse.ll
M llvm/test/CodeGen/X86/horizontal-sum.ll
M llvm/test/CodeGen/X86/oddshuffles.ll
M llvm/test/CodeGen/X86/pr34592.ll
A llvm/test/CodeGen/X86/pr91005.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll
M llvm/test/MC/RISCV/option-arch.s
M llvm/test/ThinLTO/X86/distributed_indexes.ll
M llvm/test/Transforms/AggressiveInstCombine/strncmp-1.ll
M llvm/test/Transforms/InstCombine/icmp-of-trunc-ext.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/smin-signed-zextended.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/strided-stores-vectorized.ll
M llvm/test/tools/gold/X86/thinlto.ll
M llvm/test/tools/llvm-lto/thinlto.ll
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
M llvm/utils/gn/secondary/llvm/lib/Target/LoongArch/BUILD.gn
M mlir/docs/DefiningDialects/Operations.md
M mlir/lib/Dialect/EmitC/Transforms/FormExpressions.cpp
M mlir/python/mlir/ir.py
M mlir/test/Dialect/EmitC/transforms.mlir
M mlir/test/python/dialects/python_test.py
Log Message:
-----------
rebase on -analyze fixes: e4d242768aefabc0091dd01fabecaffbc2b6984b
Created using spr 1.3.5-bogner
Compare: https://github.com/llvm/llvm-project/compare/c8677337fbcc...3099ab651c5f
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