[all-commits] [llvm/llvm-project] d3e77f: Try to use non-volatile registers for `preserve_no...

[Brandt Bucher via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d3e77f5408fded2b4bb70f51d6d9e52684badc92
      https://github.com/llvm/llvm-project/commit/d3e77f5408fded2b4bb70f51d6d9e52684badc92
  Author: Brandt Bucher <brandtbucher at gmail.com>
  Date:   2024-05-06 (Mon, 06 May 2024)

  Changed paths:
    M clang/include/clang/Basic/AttrDocs.td
    M llvm/lib/Target/X86/X86CallingConv.td
    M llvm/test/CodeGen/X86/preserve_nonecc_call.ll
    A llvm/test/CodeGen/X86/preserve_nonecc_call_win.ll

  Log Message:
  -----------
  Try to use non-volatile registers for `preserve_none` parameters (#88333)

This uses non-volatile registers for the first four (six on Windows)
registers used for `preserve_none` argument passing. This allows these
registers to stay "pinned", even if the body of the `preserve_none`
function contains calls to other "normal" functions.

Example:

```c
void boring(void);

__attribute__((preserve_none)) void (continuation)(void *, void *, void *, void *);

__attribute__((preserve_none)) void entry(void *a, void *b, void *c, void *d)
{
    boring();
    __attribute__((musttail)) return continuation(a, b, c, d);
}
``` 

Before:

```asm
pushq   %rax
movq    %rcx, %rbx
movq    %rdx, %r14
movq    %rsi, %r15
movq    %rdi, %r12
callq   boring at PLT
movq    %r12, %rdi
movq    %r15, %rsi
movq    %r14, %rdx
movq    %rbx, %rcx
popq    %rax
jmp     continuation at PLT
```

After:

```asm
pushq   %rax
callq   boring at PLT
popq    %rax
jmp     continuation at PLT
```



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications