[all-commits] [llvm/llvm-project] 8d49ce: [GlobalISel][AArch64] Add LLRINT support (#88702)

David Green via All-commits all-commits at lists.llvm.org
Wed Apr 17 10:38:46 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8d49ce176414cd4d0d5d276fd721d9226e17e810
      https://github.com/llvm/llvm-project/commit/8d49ce176414cd4d0d5d276fd721d9226e17e810
  Author: David Green <david.green at arm.com>
  Date:   2024-04-17 (Wed, 17 Apr 2024)

  Changed paths:
    M llvm/include/llvm/Support/TargetOpcodes.def
    M llvm/include/llvm/Target/GenericOpcodes.td
    M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
    A llvm/test/CodeGen/AArch64/GlobalISel/legalize-llrint.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
    M llvm/test/CodeGen/AArch64/llrint-conv-fp16.ll
    M llvm/test/CodeGen/AArch64/llrint-conv.ll
    M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td
    M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-imms.td
    M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-intrinsics.td
    M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-patfrag-root.td
    M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
    M llvm/test/TableGen/GlobalISelEmitter.td

  Log Message:
  -----------
  [GlobalISel][AArch64] Add LLRINT support (#88702)

This hooks up G_INTRINSIC_LLRINT instructions, very similar to the lrint
nodes that already exist. On AArch64 they are treated the same as lrint
with the default return types.



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