[all-commits] [llvm/llvm-project] 65b0cc: [RISCV] Add FeatureStdExtI to all CPUs in RISCVPro...
darkbuck via All-commits
all-commits at lists.llvm.org
Tue Apr 16 07:38:01 PDT 2024
Branch: refs/heads/users/darkbuck/spr/tablegeninstrinfoemitter-count-sub-operands-on-def-operands
Home: https://github.com/llvm/llvm-project
Commit: 65b0cc610f80d9b9724a98cf7c5bcfd38e1cf799
https://github.com/llvm/llvm-project/commit/65b0cc610f80d9b9724a98cf7c5bcfd38e1cf799
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-04-15 (Mon, 15 Apr 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add FeatureStdExtI to all CPUs in RISCVProcessors.td. NFC (#88805)
This is currently being implied in RISCVISAInfo.cpp. Make it explicit.
I'm planning to move all extension information to RISCVFeatures.td and
have tablegen create the tables for RISCVISAInfo.cpp. This requires
making the creation of RISCVTargetParserDef.inc in tablegen independent
of RISCVISAInfo.cpp. So we need an accurate extension list for CPUs in
tablegen.
Commit: 4e2d11f87a595d658f25ec5838b002e4bf5a26fc
https://github.com/llvm/llvm-project/commit/4e2d11f87a595d658f25ec5838b002e4bf5a26fc
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-04-15 (Mon, 15 Apr 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZcmop.td
Log Message:
-----------
[RISCV] Remove unnecessary NoHasStdExtZicfiss Predicate from cmop.1 and cmop.5. NFC (#88822)
I'm not sure what this was supposed do. Maybe it was for the
disassembler, but that should be managed through DecoderNamespace.
So let's remove it and simplify the code.
Commit: edb0708dc1ceeaeb3356311a4ddf72a0dc9b224f
https://github.com/llvm/llvm-project/commit/edb0708dc1ceeaeb3356311a4ddf72a0dc9b224f
Author: Vlad Mishel <43666597+vmishelcs at users.noreply.github.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/fcmp.ll
Log Message:
-----------
[InstCombine] Implement `fcmp (fadd x, 0.0), y` => `fcmp x, y` optimization (#88476)
This PR addresses issue #88168. It implements an optimization for
the case of
```
define i1 @fcmp_fadd_zero_ugt(float %x, float %y) {
%add = fadd float %x, 0.000000e+00
%cmp = fcmp ugt float %add, %y
ret i1 %cmp
}
```
`=>`
```
define i1 @fcmp_fadd_zero_ugt(float %x, float %y) {
%cmp = fcmp ugt float %x, %y
ret i1 %cmp
}
```
and all other types of `fcmp` instructions (`uge`, `ogt`, etc).
Proofs:
`fadd x, 0.0` https://alive2.llvm.org/ce/z/7FzNnM
`fsub x, 0.0` https://alive2.llvm.org/ce/z/puUxLK
Commit: 39016e33b0fe78ddb1f11822f71a8a233af4dca9
https://github.com/llvm/llvm-project/commit/39016e33b0fe78ddb1f11822f71a8a233af4dca9
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGenCXX/module-funcs-from-imports.cppm
Log Message:
-----------
[C++20] [Modules] Don't import non-inline function bodies even if it is always-inline
Recommit
https://github.com/llvm/llvm-project/commit/1ecbab56dcbb78268c8d19af34a50591f90b12a0
Close https://github.com/llvm/llvm-project/issues/80949
The new thing in this commit is to allow to import the function body
from instantiations if it is marked with always-inline. See the
discussion in https://github.com/llvm/llvm-project/issues/86893 for
details.
Commit: f14146fd46dd8bf7ef1e64d3c13af73dc5668045
https://github.com/llvm/llvm-project/commit/f14146fd46dd8bf7ef1e64d3c13af73dc5668045
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-04-15 (Mon, 15 Apr 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZcmop.td
M llvm/test/MC/RISCV/rv32zcmop-invalid.s
M llvm/test/MC/RISCV/rvzcmop-valid.s
Log Message:
-----------
[RISCV] Correct the spelling of the Zcmop mnemonics. (#88826)
The instruction names should be c.mop.1 instead of cmop.1.
Commit: 17d6bf046cea381413895f91e24d26d65763b59a
https://github.com/llvm/llvm-project/commit/17d6bf046cea381413895f91e24d26d65763b59a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-04-15 (Mon, 15 Apr 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/pr88799.ll
Log Message:
-----------
[RISCV] Change how MMO is rebuilt in lowerFixedLengthVectorLoadToRVV/lowerFixedLengthVectorStoreToRVV (#88811)
Copy the pointer info, flags, alignment, AAInfo, and ranges, but let
getLoad rebuild the MMO using the scalable type used for the the new
load/store. This makes sure the LLT minimum size matches the ContainerVT
minimum size. This is important since vscale_range may have been used to
determine that the fixed vector was the exact size of a scalable vector.
Fixes #88799
Commit: 6da1966bc503e1ce44ef36e7107c9db482fac6ab
https://github.com/llvm/llvm-project/commit/6da1966bc503e1ce44ef36e7107c9db482fac6ab
Author: Michal Terepeta <michalt at google.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVSchedRocket.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td
M llvm/lib/Target/RISCV/RISCVSchedXiangShanNanHu.td
M llvm/lib/Target/RISCV/RISCVSchedule.td
A llvm/lib/Target/RISCV/RISCVScheduleXSf.td
Log Message:
-----------
[RISCV] Add scheduling information for SiFive VCIX (#86093)
This adds `RISCVScheduleXSf.td` with `SchedWrite` definitions for all
VCIX instructions and uses it in `RISCVSchedSiFive7.td` to set default
latencies for these instructions, helping with issue
https://github.com/llvm/llvm-project/issues/83391. Of course these
default latencies cannot be accurate (since each coprocessor will have
different latencies), but this seems to be enough to avoid some of the
problematic behavior described in the bug.
In any case, this seems to be enough to help with #83391 in our internal
testing.
A subsequent discussion is how to structure the code such that it's
easier for downstream consumers of this to use `SiFive7` scheduling
model with accurate VCIX latencies. But we can probably have a separate
issue to discuss that.
Commit: e2c91091e537a54f1469610ab407e7c9561e7ffc
https://github.com/llvm/llvm-project/commit/e2c91091e537a54f1469610ab407e7c9561e7ffc
Author: darkbuck <michael.hliao at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-commute-fp-const-lhs.mir
A llvm/test/CodeGen/AArch64/GlobalISel/combine-commute-int-const-lhs.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-const-fold-barrier-rhs.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-select-to-fminmax.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-to-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/umed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
Log Message:
-----------
[GlobalISel] Handle more commutable instructions in `commute_constant_to_rhs`
Reviewers:
rupprecht, aartbik, cyndyishida, Pierre-vh, aemerson, ftynse, hanhanW, banach-space, jayfoad, nicolasvasilache, daniel-grumberg, arsenm, PeimingLiu, JDevlieghere, matthias-springer
Reviewed By: arsenm, Pierre-vh
Pull Request: https://github.com/llvm/llvm-project/pull/87424
Commit: 3c6f91e5b671321c95259dabecdbdfe4a6d69ce1
https://github.com/llvm/llvm-project/commit/3c6f91e5b671321c95259dabecdbdfe4a6d69ce1
Author: martinboehme <mboehme at google.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
Log Message:
-----------
[clang][dataflow] Fix result object location for builtin `<=>`. (#88726)
The newly added test causes an assertion failure in
`PropagateResultObject()`
without the fix added here.
Commit: 7e49b0d5a67f212e84f8ec0ec2e39a6a8673bfaf
https://github.com/llvm/llvm-project/commit/7e49b0d5a67f212e84f8ec0ec2e39a6a8673bfaf
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M lldb/source/Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.cpp
M lldb/unittests/UnwindAssembly/CMakeLists.txt
A lldb/unittests/UnwindAssembly/x86-but-no-x86-target/CMakeLists.txt
A lldb/unittests/UnwindAssembly/x86-but-no-x86-target/Testx86AssemblyInspectionEngine.cpp
Log Message:
-----------
[lldb] Fix nullptr dereference on running x86 binary with x86-disabled llvm (#82603)
If `LLVM_TARGETS_TO_BUILD` does not contain `X86` and we try to run an
x86 binary in lldb, we get a `nullptr` dereference in
`LLVMDisasmInstruction(...)`. We try to call `getDisAsm()` method on a
`LLVMDisasmContext *DC` which is null. The pointer is passed from
`x86AssemblyInspectionEngine::instruction_length(...)` and is originally
`m_disasm_context` member of `x86AssemblyInspectionEngine`. This should
be filled by `LLVMCreateDisasm(...)` in the class constructor, but not
having X86 target enabled in llvm makes
`TargetRegistry::lookupTarget(...)` call return `nullptr`, which results
in `m_disasm_context` initialized with `nullptr` as well.
This patch adds if statements against `m_disasm_context` in
`x86AssemblyInspectionEngine::GetNonCallSiteUnwindPlanFromAssembly(...)`
and `x86AssemblyInspectionEngine::FindFirstNonPrologueInstruction(...)`
so subsequent calls to
`x86AssemblyInspectionEngine::instruction_length(...)` do not cause a
null pointer dereference.
Commit: 89071f35599ac58cde99923a376d6b75c0d49e4b
https://github.com/llvm/llvm-project/commit/89071f35599ac58cde99923a376d6b75c0d49e4b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/GlobalModuleIndex.cpp
M clang/lib/Serialization/MultiOnDiskHashTable.h
Log Message:
-----------
[clang] Drop unaligned from calls to readNext (NFC) (#88842)
Now readNext defaults to unaligned accesses. This patch drops
unaligned to improve readability.
Commit: a169d4c2e974ceb20b86faea3fa4ac286a1d44e8
https://github.com/llvm/llvm-project/commit/a169d4c2e974ceb20b86faea3fa4ac286a1d44e8
Author: Martin Storsjö <martin at martin.st>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M lld/COFF/Writer.cpp
M lld/test/COFF/autoimport-arm-data.s
M lld/test/COFF/autoimport-arm64-data.s
M lld/test/COFF/autoimport-gnu-implib.s
A lld/test/COFF/autoimport-handler-func.s
M lld/test/COFF/autoimport-warn.s
M lld/test/COFF/autoimport-x86.s
Log Message:
-----------
[LLD] [COFF] Error out if the runtime pseudo relocation function is missing (#88573)
When then linker creates runtime pseudo relocations, it places them in a
list with the assumption that the runtime will fix these relocations
later, when the image gets loaded. If the relevant runtime function
doesn't seem to be present in the linked image, error out.
Normally when linking the mingw-w64 runtime libraries, this function
always is available. However, if linking without including the mingw-w64
CRT startup files, and the image needs runtime pseudo relocations, make
it clear that this won't work as expected at runtime.
With ld.bfd, this situation is a hard error too; ld.bfd adds an
undefined reference to this symbol if runtime pseudo relocations are
needed.
A later alternative would be to actually try to pull in the symbol (if
seen in a static library, but not included yet). This would allow
decoupling the function from the main mingw-w64 CRT startup code (making
it optional, only running if the linker actually produced runtime pseudo
relocations).
Doing that would require restructuring the lld code (gathering pseudo
relocations earlier, then loading the relocator function, then pulling in
more object files to satisfy the dependencies of the relocator) though.
Also, ld.bfd doesn't currently successfully pull in more object files to
satisfy the dependency on _pei386_runtime_relocator, so with that in
mind, there's not much extra value in making LLD do it currently either;
we can't make such a change in mingw-w64's CRT until both linkers
handle it.
This fixes one issue brought up in
https://github.com/llvm/llvm-project/issues/84424.
Commit: dbaa1893c9afe6a245860efb8d68875ba4fd6794
https://github.com/llvm/llvm-project/commit/dbaa1893c9afe6a245860efb8d68875ba4fd6794
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
A llvm/test/CodeGen/RISCV/prefer-w-inst.ll
A llvm/test/CodeGen/RISCV/prefer-w-inst.mir
R llvm/test/CodeGen/RISCV/strip-w-suffix.ll
Log Message:
-----------
[RISCV] Generate more W instructons
We rename `TuneNoStripWSuffix` to `TunePreferWInst`.
If all the users of an instruction just use the low 32 bits, we can
convert it to its W variant.
A quick test on Coremark (`-O3 -march=rv64gc`):
| | W instructions | code size(.text) |
|--------|----------------|------------------|
| before | 302 | 12257 |
| after | 343 | 12265 |
| | +13.58% | +0.065% |
Reviewers: asb, dtcxzyw, preames, lukel97, michaelmaitland, topperc
Reviewed By: topperc, dtcxzyw
Pull Request: https://github.com/llvm/llvm-project/pull/87237
Commit: d26dd58ca5b59032eb371b8f51d9134acdd8d3ad
https://github.com/llvm/llvm-project/commit/d26dd58ca5b59032eb371b8f51d9134acdd8d3ad
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/Modules/hashing-decls-in-exprs-from-gmf-2.cppm
Log Message:
-----------
[StmtProfile] Don't profile the body of lambda expressions
Close https://github.com/llvm/llvm-project/issues/87609
We tried to profile the body of the lambda expressions in
https://reviews.llvm.org/D153957. But as the original comments show,
it is indeed dangerous. After we tried to skip calculating the ODR
hash values recently, we have fall into this trap twice.
So in this patch, I choose to not profile the body of the lambda
expression. The signature of the lambda is still profiled.
Commit: a29e85d6626aae7dba44c66ee5b703d3ab5de41c
https://github.com/llvm/llvm-project/commit/a29e85d6626aae7dba44c66ee5b703d3ab5de41c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/SubprocessMemory.cpp
Log Message:
-----------
[llvm-exegesis] Change preprocessor directives for getCurrentTID
This patch changes the preprocessor directives surrounding
getCurrentTID, particularly moving it out of the block that is only
defined when not building for Android. The getCurrentTID function is
called in places that only require Linux definitions, so this function
should have the same preprocessor scoping around it to prevent link time
failures.
Commit: d34a2c2adb2a4f1dc262c5756d3725caa4ea2571
https://github.com/llvm/llvm-project/commit/d34a2c2adb2a4f1dc262c5756d3725caa4ea2571
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Log Message:
-----------
[RISCV] Make more vector pseudos commutable
This PR includes:
* vadd.vv/vand.vv/vor.vv/vxor.vv
* vmseq.vv/vmsne.vv
* vmin.vv/vminu.vv/vmax.vv/vmaxu.vv
* vmul.vv/vmulh.vv/vmulhu.vv
* vwadd.vv/vwaddu.vv
* vwmul.vv/vwmulu
* vwmacc.vv/vwmaccu.vv
* vadc.vvm
There is no test change, I may add it later.
Fixes part of #64422
Reviewers: michaelmaitland, preames, lukel97, topperc, asb
Reviewed By: topperc, lukel97
Pull Request: https://github.com/llvm/llvm-project/pull/88379
Commit: 5b811562a520a8a3cd164897f24dee7da3115bbe
https://github.com/llvm/llvm-project/commit/5b811562a520a8a3cd164897f24dee7da3115bbe
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M libcxx/include/__algorithm/pstl_backends/cpu_backends/any_of.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/fill.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/find_if.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/for_each.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/libdispatch.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/merge.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/serial.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/stable_sort.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/thread.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/transform.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/transform_reduce.h
M libcxx/include/__pstl/cpu_algos/cpu_traits.h
Log Message:
-----------
[libc++] Rename __cpu_traits functions (#88741)
Functions inside __cpu_traits were needlessly prefixed with __parallel,
which doesn't serve a real purpose anymore now that they are inside a
traits class.
Commit: 66cf995da76b9da3cfdee2f29eff6ea4d84305ef
https://github.com/llvm/llvm-project/commit/66cf995da76b9da3cfdee2f29eff6ea4d84305ef
Author: Carlos Alberto Enciso <carlos.alberto.enciso at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/test/Transforms/SCCP/pr50901.ll
M llvm/unittests/Transforms/Utils/LocalTest.cpp
Log Message:
-----------
[IPSCCP] Variable not visible at Og: (#77901)
https://bugs.llvm.org/show_bug.cgi?id=51559
https://github.com/llvm/llvm-project/issues/50901
IPSCCP pass removes the global variable and does not create a constant
expression for the initializer value.
Extend test coverage to include:
- half, bfloat types.
- checks for undef (int32 and ptr).
There is no support for:
- fp128, x86_fp80, ppc_fp128 types.
https://github.com/llvm/llvm-project/issues/88102
Commit: d6d84b5d1448e4f2e24b467a0abcf42fe9d543e9
https://github.com/llvm/llvm-project/commit/d6d84b5d1448e4f2e24b467a0abcf42fe9d543e9
Author: NagyDonat <donat.nagy at ericsson.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
M clang/test/Analysis/Inputs/system-header-simulator-cxx.h
M clang/test/Analysis/cxx-uninitialized-object-ptr-ref.cpp
M clang/test/Analysis/exercise-ps.c
M clang/test/Analysis/explain-svals.cpp
A clang/test/Analysis/malloc-std-namespace.cpp
M clang/test/Analysis/malloc.c
M clang/test/Analysis/malloc.cpp
M clang/test/Analysis/stack-addr-ps.c
M clang/test/Analysis/stackaddrleak.c
Log Message:
-----------
[analyzer] Handle builtin functions in MallocChecker (#88416)
This commit ensures that the `CallDescription`s in `MallocChecker` are
matched with the mode `CDM::CLibrary`, so:
- they don't match methods or functions within user-defined namespaces;
- they also match builtin variants of these functions (if any), so the
checker can model `__builtin_alloca()` like `alloca()`.
This change fixes https://github.com/llvm/llvm-project/issues/81597. New
tests were added to verify that `std::malloc` and `std::free` (from
`<cstdlib>`) are modeled, but a method that's named e.g. `free` isn't
confused with the memory release function.
The responsibility for modeling `__builtin_alloca` and
`__builtin_alloca_with_align` was moved from `BuiltinFunctionChecker` to
`MallocChecker`, to avoid buggy interactions between the checkers and
ensure that the builtin and non-builtin variants are handled by exactly
the same logic.
This change might be a step backwards for the users who don't have
`unix.Malloc` enabled; but I suspect that `__builtin_alloca()` is so
rare that it would be a waste of time to implement backwards
compatibility for them.
There were several test files that relied on `__builtin_alloca()` calls
to get an `AllocaRegion`, these were modified to enable `unix.Malloc`.
One of these files (cxx-uninitialized-object-ptr-ref.cpp) had some tests
that relied on the fact that `malloc()` was treated as a "black box" in
them, these were updated to use `calloc()` (to get initialized memory)
and `free()` (to avoid memory leak reports).
While I was developing this change, I found a very suspicious assert in
`MallocChecker`. As it isn't blocking the goals of this commit, I just
marked it with a FIXME, but I'll try to investigate and fix it in a
follow-up change.
Commit: 40dd3aa91d3f73184e34e45e597b84bec059c572
https://github.com/llvm/llvm-project/commit/40dd3aa91d3f73184e34e45e597b84bec059c572
Author: Matthias Springer <me at m-sp.org>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/Transforms/Transforms.h
M mlir/include/mlir/Dialect/Arith/Transforms/Transforms.h
M mlir/include/mlir/Interfaces/ValueBoundsOpInterface.h
M mlir/lib/Dialect/Affine/IR/ValueBoundsOpInterfaceImpl.cpp
M mlir/lib/Dialect/Affine/Transforms/ReifyValueBounds.cpp
M mlir/lib/Dialect/Arith/IR/ValueBoundsOpInterfaceImpl.cpp
M mlir/lib/Dialect/Arith/Transforms/IntNarrowing.cpp
M mlir/lib/Dialect/Arith/Transforms/ReifyValueBounds.cpp
M mlir/lib/Dialect/Linalg/Transforms/Padding.cpp
M mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
M mlir/lib/Dialect/MemRef/Transforms/IndependenceTransforms.cpp
M mlir/lib/Dialect/SCF/IR/ValueBoundsOpInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/IndependenceTransforms.cpp
M mlir/lib/Dialect/Tensor/Utils/Utils.cpp
M mlir/lib/Interfaces/ValueBoundsOpInterface.cpp
M mlir/test/Dialect/Affine/value-bounds-op-interface-impl.mlir
M mlir/test/lib/Dialect/Affine/TestReifyValueBounds.cpp
M mlir/test/lib/Dialect/Test/TestDialect.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
Log Message:
-----------
[mlir][Interfaces] `Variable` abstraction for `ValueBoundsOpInterface` (#87980)
This commit generalizes and cleans up the `ValueBoundsConstraintSet`
API. The API used to provide function overloads for comparing/computing
bounds of:
- index-typed SSA value
- dimension of shaped value
- affine map + operands
This commit removes all overloads. There is now a single entry point for
each `compare` variant and each `computeBound` variant. These functions
now take a `Variable`, which is internally represented as an affine map
and map operands.
This commit also adds support for computing bounds for an affine map +
operands. There was previously no public API for that.
Commit: 5a46123ddf62900d3dc73330f699c73038645198
https://github.com/llvm/llvm-project/commit/5a46123ddf62900d3dc73330f699c73038645198
Author: Utkarsh Saxena <usx at google.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCleanup.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/test/CodeGenCXX/control-flow-in-stmt-expr.cpp
Log Message:
-----------
Fix missing dtor in function calls accepting trivial ABI structs (#88751)
Fixes https://github.com/llvm/llvm-project/issues/88478
Promoting the `EHCleanup` to `NormalAndEHCleanup` in `EmitCallArgs`
surfaced another bug with deactivation of normal cleanups. Here we
missed emitting CPP scope ends for deactivated normal cleanups. This
patch also fixes that bug.
We missed emitting CPP scope ends because we remove the `fallthrough`
(clears the insertion point) before deactivating normal cleanups. This
is to make the emitted "normal" cleanup code unreachable. But we still
need to emit CPP scope ends in the original basic block even for a
deactivated normal cleanup.
(This worked correctly before we did not remove `fallthrough` for
`EHCleanup`s).
Commit: 9141e1c24f87e5735bc4178a018eba4bdf2750aa
https://github.com/llvm/llvm-project/commit/9141e1c24f87e5735bc4178a018eba4bdf2750aa
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/vectors.cpp
Log Message:
-----------
[clang][Interp] Gracefully handle bitcasts to non-primitive types
We were calling classfiyPrim() instead of classify().
Commit: 4fc0a99b8f220b6b41648da491bcc81a067f1600
https://github.com/llvm/llvm-project/commit/4fc0a99b8f220b6b41648da491bcc81a067f1600
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp
M llvm/test/CodeGen/AMDGPU/vopd-combine.mir
Log Message:
-----------
[AMDGPU] Fix implicit operands of VOPD cndmask instructions (#87788)
Commit: f4f772ceef379bd434d266b6e0d2bbdf796f81cb
https://github.com/llvm/llvm-project/commit/f4f772ceef379bd434d266b6e0d2bbdf796f81cb
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
Log Message:
-----------
[AMDGPU] Stop reserving $vcc_hi in wave32 mode (#87783)
This gives us one extra SGPR to play with. The comment suggested that it
could cause bugs, but I have tested it with Vulkan CTS with the default
wave size for compute shaders set to 32 and did not find any problems.
Commit: 485d556d8c23b54da952e75c3cadc9db3050fd9e
https://github.com/llvm/llvm-project/commit/485d556d8c23b54da952e75c3cadc9db3050fd9e
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/AST/Interp/Disasm.cpp
M clang/lib/AST/Interp/InterpBlock.h
Log Message:
-----------
[clang][Interp][NFC] Add Block::dump()
Commit: 80fce05f2104d1c42db814276130536b014fcca2
https://github.com/llvm/llvm-project/commit/80fce05f2104d1c42db814276130536b014fcca2
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/minmax-intrinsics.ll
Log Message:
-----------
[InstCombine] Fold `minmax (X & NegPow2C, Y & NegPow2C) -> minmax(X, Y) & NegPow2C` (#88859)
Alive2: https://alive2.llvm.org/ce/z/NFtkSX
This optimization will be beneficial to jemalloc users.
Commit: cce026bf8f7dcf5aa402a6da20f0d4da56aee8b5
https://github.com/llvm/llvm-project/commit/cce026bf8f7dcf5aa402a6da20f0d4da56aee8b5
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M mlir/test/lib/Dialect/Test/TestDialect.cpp
Log Message:
-----------
[mlir][test] Fix -Wsign-compare in TestDialect.cpp (NFC)
llvm-project/mlir/test/lib/Dialect/Test/TestDialect.cpp:597:31:
error: comparison of integers of different signs: 'size_t' (aka 'unsigned long') and 'int64_t' (aka 'long') [-Werror,-Wsign-compare]
if (getVarOperands().size() != expectedNumOperands)
~~~~~~~~~~~~~~~~~~~~~~~ ^ ~~~~~~~~~~~~~~~~~~~
1 error generated.
Commit: 58b49cef1d772a922a433fd4a42e41db3f18d34b
https://github.com/llvm/llvm-project/commit/58b49cef1d772a922a433fd4a42e41db3f18d34b
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/vectors.cpp
Log Message:
-----------
[clang][Interp] Support __builtin_vectorelements
Commit: 70fe6ad535365de20c3a960dcfe97bd5cf68abb5
https://github.com/llvm/llvm-project/commit/70fe6ad535365de20c3a960dcfe97bd5cf68abb5
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[MLIR][OpenMP] Make omp.distribute into a loop wrapper (#87239)
This patch updates the definition of `omp.distribute` to enforce the
restrictions of a wrapper operation.
Commit: 668a58b8926473d731c41c55007f1fe4571ada86
https://github.com/llvm/llvm-project/commit/668a58b8926473d731c41c55007f1fe4571ada86
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M flang/docs/Intrinsics.md
M flang/include/flang/Runtime/extensions.h
M flang/runtime/extensions.cpp
A flang/unittests/Runtime/AccessTest.cpp
M flang/unittests/Runtime/CMakeLists.txt
Log Message:
-----------
[flang][runtime] Add ACCESS library procedure (#88517)
Re-land https://github.com/llvm/llvm-project/pull/88395
Two build-bots were broken by the old version:
- https://lab.llvm.org/buildbot/#/builders/285/builds/245
- https://lab.llvm.org/buildbot/#/builders/21/builds/96988
The problem in both cases was that the compiler did not support
`std::filesystem` (which I use in the unit test).
I have removed the dependency upon std::filesystem because there isn't
an easy way to add the right linker options so that this is supported
correctly in all build environments [1]
[1] https://gitlab.kitware.com/cmake/cmake/-/issues/17834
---
This is a GNU extension:
https://gcc.gnu.org/onlinedocs/gfortran/ACCESS.html
Used in SALMON:
https://salmon-tddft.jp/download.html
Unfortunately the intrinsic takes a file path to operate on so there
isn't an easy way to make the test robust. The unit test expects to be
able to create, set read write and execute permissions, and delete files
called
std::filesystem::temp_directory_path() / <test_name>.<pid>
The test will fail if a file already exists with that name.
I have not implemented the intrinsic on Windows because this is wrapping
a POSIX system call and Windows doesn't support all of the permission
bits tested by the intrinsic. I don't have a Windows machine easily
available to check if Gfortran implements this intrinsic on Windows.
Commit: 76782e28869abf93716f72f195d55c28eaf263ed
https://github.com/llvm/llvm-project/commit/76782e28869abf93716f72f195d55c28eaf263ed
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
Log Message:
-----------
[Flang][OpenMP] NFC: Remove old reduction lowering code (#88798)
The old code was replaced by
https://github.com/llvm/llvm-project/pull/80019.
Commit: 61717c1aa1f08eb57839a21fb2d9004739022e0d
https://github.com/llvm/llvm-project/commit/61717c1aa1f08eb57839a21fb2d9004739022e0d
Author: Jon Chesterfield <jonathanchesterfield at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/vastart.ll
M llvm/test/Other/lint.ll
A llvm/test/Verifier/variadic.ll
Log Message:
-----------
[Verifier] Reject va_start in non-variadic function (#88809)
A va_start intrinsic lowers to something derived from the variadic
parameter to the function. If there is no such parameter, it can't lower
meaningfully. Clang sema rejects the same with `error: 'va_start' used
in function with fixed args`.
Moves the existing lint warning into a verifier error. Updates the one
lit test that had a va_start in a non-variadic function.
Commit: 1ca6b4475c02e5d022ec6b35dbb65d0f11409a88
https://github.com/llvm/llvm-project/commit/1ca6b4475c02e5d022ec6b35dbb65d0f11409a88
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/UpliftWhileToFor.cpp
Log Message:
-----------
[mlir][scf] `scf.while` uplifting: optimize op matching (#88813)
Instead of iterating over potential induction var uses looking for
suitable `arith.addi`, try to trace it back from yield argument.
Commit: aae08f4f8ef7bc9c35d263ed974679130c49f5fc
https://github.com/llvm/llvm-project/commit/aae08f4f8ef7bc9c35d263ed974679130c49f5fc
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauseOperands.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[MLIR][OpenMP] Make omp.taskloop into a loop wrapper (#87253)
This patch updates the definition of `omp.taskloop` to enforce the
restrictions of a wrapper operation.
Commit: ca4cf973279a3991248056a73bcb2bac8b37d035
https://github.com/llvm/llvm-project/commit/ca4cf973279a3991248056a73bcb2bac8b37d035
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/AST/Interp/Pointer.h
Log Message:
-----------
[clang][Interp][NFC] Fix Pointer::isZero() for block pointers
We don't need to consider the offset here anymore since we now
have proper integral pointers.
Commit: 422bf13f336923da89055f8e70e49e7e9ced2c70
https://github.com/llvm/llvm-project/commit/422bf13f336923da89055f8e70e49e7e9ced2c70
Author: choikwa <5455710+choikwa at users.noreply.github.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/test/CodeGen/AMDGPU/build_vector.ll
Log Message:
-----------
[AMDGPU] In VectorLegalizer::Expand, if UnrollVectorOp returns Load, … (#88475)
…return only Load since other output is chain.
Added testcase that showed mismatched expected arity when Load and chain
were returned as separate items after
003b58f65bdd5d9c7d0c1b355566c9ef430c0e7d
Commit: 4dd5180a2d43b088d7637c30c2654f3c01c46987
https://github.com/llvm/llvm-project/commit/4dd5180a2d43b088d7637c30c2654f3c01c46987
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/FIR/target.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/use-device-ptr-to-use-device-addr.f90
Log Message:
-----------
[Flang][OpenMP][Lower] Split MLIR codegen for clauses and constructs (#86963)
This patch performs several cleanups with the main purpose of
normalizing the code patterns used to trigger codegen for MLIR OpenMP
operations and making the processing of clauses and constructs
independent. The following changes are made:
- Clean up unused `directive` argument to
`ClauseProcessor::processMap()`.
- Move general helper functions in OpenMP.cpp to the appropriate section
of the file.
- Create `gen<OpName>Clauses()` functions containing the clause
processing code specific for the associated OpenMP construct.
- Update `gen<OpName>Op()` functions to call the corresponding
`gen<OpName>Clauses()` function.
- Sort calls to `ClauseProcessor::process<ClauseName>()` alphabetically,
to avoid inadvertently relying on some arbitrary order. Update some
tests that broke due to the order change.
- Normalize `genOMP()` functions so they all delegate the generation of
MLIR to `gen<OpName>Op()` functions following the same pattern.
- Only process `nowait` clause on `TARGET` constructs if not compiling
for the target device.
A later patch can move the calls to `gen<OpName>Clauses()` out of
`gen<OpName>Op()` functions and passing completed clause structures
instead, in preparation to supporting composite constructs. That will
make it possible to reuse clause processing for a given leaf construct
when appearing alone or in a combined or composite construct, while
controlling where the associated code is produced.
Commit: 31424be3aef4290dd84065b9371fcd0c5014e097
https://github.com/llvm/llvm-project/commit/31424be3aef4290dd84065b9371fcd0c5014e097
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
Log Message:
-----------
[clang][Interp][NFC] Compare std::optionals directly
Commit: a831c54357c2bb7b8b457ccea22836c23e8b8625
https://github.com/llvm/llvm-project/commit/a831c54357c2bb7b8b457ccea22836c23e8b8625
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/AST/Interp/FunctionPointer.h
M clang/lib/AST/Interp/Interp.h
M clang/test/AST/Interp/functions.cpp
Log Message:
-----------
[clang][Interp] Avoid calling invalid functions
Check if the non-null function pointer is even valid before calling
the function.
Commit: b0194d2894db49d7cf4d36aed87952c3e0c6a390
https://github.com/llvm/llvm-project/commit/b0194d2894db49d7cf4d36aed87952c3e0c6a390
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/windows-seh-async-verify.cpp
Log Message:
-----------
[SEH] Ignore async exception flag when the environment is not MSVC (#88101)
Fixes #62449
Commit: f4960da6023b8034ae68925c3223d51624621b37
https://github.com/llvm/llvm-project/commit/f4960da6023b8034ae68925c3223d51624621b37
Author: Jon Chesterfield <jonathanchesterfield at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/vastart.ll
M llvm/test/Other/lint.ll
R llvm/test/Verifier/variadic.ll
Log Message:
-----------
Revert "[Verifier] Reject va_start in non-variadic function (#88809)"
This reverts commit 61717c1aa1f08eb57839a21fb2d9004739022e0d. Failed a MLIR test
Commit: 01f79899ba349a0200586c8d05f5e22cca2ced31
https://github.com/llvm/llvm-project/commit/01f79899ba349a0200586c8d05f5e22cca2ced31
Author: Jinyang He <hejinyang at loongson.cn>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M lld/ELF/InputSection.cpp
A lld/test/ELF/loongarch-relax-align-ldr.s
M lld/test/ELF/loongarch-relax-emit-relocs.s
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/test/MC/LoongArch/Relocations/relax-addsub.s
M llvm/test/MC/LoongArch/Relocations/relax-align.s
Log Message:
-----------
[LoongArch] Use R_LARCH_ALIGN with section symbol (#84741)
In LoongArch psABI v2.30, the R_LARCH_ALIGN requires symbol index to
support the third parameter of alignment directive. Create symbol for
each section is redundant because they have section symbol which can
also be used as symbol index. So use section symbol directly for
R_LARCH_ALIGN.
Commit: c09384e2b419c7b4e4167e0d0295d9018cc6169c
https://github.com/llvm/llvm-project/commit/c09384e2b419c7b4e4167e0d0295d9018cc6169c
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/records.cpp
Log Message:
-----------
[clang][Interp] Support MemberExprs pointing to VarDecls
Commit: 1120d8e6f799121b611aa23bdc128e40cf9c6c58
https://github.com/llvm/llvm-project/commit/1120d8e6f799121b611aa23bdc128e40cf9c6c58
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/Basic/Targets/SPIR.h
M clang/test/CodeGen/target-data.c
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
Log Message:
-----------
[clang][CodeGen] Add AS for Globals to SPIR & SPIRV datalayouts (#88455)
Currently neither the SPIR nor the SPIRV targets specify the AS for
globals in their datalayout strings. This is problematic because
CodeGen/LLVM will default to AS0 in this case, which produces Globals
that end up in the private address space for e.g. OCL, HIPSPV or SYCL.
This patch addresses it by completing the datalayout string.
Commit: 36b3c26451bf9a42f0b6b415993d3942bb73abdd
https://github.com/llvm/llvm-project/commit/36b3c26451bf9a42f0b6b415993d3942bb73abdd
Author: XChy <xxs_chy at outlook.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/test/CodeGen/AArch64/and-sink.ll
M llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll
M llvm/test/CodeGen/Hexagon/vect/zext-v4i1.ll
M llvm/test/Transforms/JumpThreading/pr79175.ll
M llvm/test/Transforms/JumpThreading/select.ll
M llvm/test/Transforms/JumpThreading/thread-prob-7.ll
A llvm/test/Transforms/JumpThreading/uncond-no-phi.ll
A llvm/test/Transforms/PhaseOrdering/thread-uncond-bb.ll
Log Message:
-----------
[JumpThreading] Thread over BB with only an unconditional branch (#86312)
Fixes #76609
This patch does:
- relax the phis constraint in `CanRedirectPredsOfEmptyBBToSucc`
- guarantee the BB has multiple different predecessors to redirect, so
that we can handle the case without phis in BB. Without this change and
phi constraint, we may redirect the CommonPred.
The motivation is consistent with JumpThreading. We always want the
branch to jump more direct to the destination, without passing the
middle block. In this way, we can expose more other optimization
opportunities.
An obivous example proposed by @dtcxzyw is like:
```llvm
define i32 @test(...) {
entry:
br i1 %c, label %do.end, label %if.then
if.then: ; preds = %entry
%call2 = call i32 @dummy()
%tobool3.not = icmp eq i32 %call2, 0
br i1 %tobool3.not, label %do.end, label %return
do.end: ; preds = %entry, %if.then
br label %return
return: ; preds = %if.then, %do.end
%retval.0 = phi i32 [ 0, %do.end ], [ %call2, %if.then ]
ret i32 %retval.0
}
```
`entry` can directly jump to return, without passing `do.end`, and then
the if-else pattern can be simplified further:
```llvm
define i32 @test(...) {
entry:
br i1 %c, label %return, label %if.then
if.then: ; preds = %entry
%call2 = call i32 @dummy()
br label %return
return: ; preds = %if.then
%retval.0 = phi i32 [ 0, %entry ], [ %call2, %if.then ]
ret i32 %retval.0
}
```
Commit: 32b74ca6e41768c91eee8b8ca26235b110a65deb
https://github.com/llvm/llvm-project/commit/32b74ca6e41768c91eee8b8ca26235b110a65deb
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/test/AST/Interp/cxx03.cpp
Log Message:
-----------
[clang][Interp] Load value from MemberExpr if required
Commit: 92e96c7bbacbb477265c7e5ff6c49a6de5d4ee69
https://github.com/llvm/llvm-project/commit/92e96c7bbacbb477265c7e5ff6c49a6de5d4ee69
Author: Malay Sanghi <malay.sanghi at intel.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
M llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
M llvm/lib/Target/X86/GISel/X86RegisterBankInfo.cpp
M llvm/lib/Target/X86/GISel/X86RegisterBankInfo.h
M llvm/test/CodeGen/X86/GlobalISel/fconstant.ll
A llvm/test/CodeGen/X86/GlobalISel/regbankselect-sse-intrinsics.ll
M llvm/test/CodeGen/X86/GlobalISel/regbankselect-x87.ll
Log Message:
-----------
[X86][GISel] Add DU chain lookups for LOAD & STORE (#87453)
For G_LOAD and G_STORE we want this information during regbankselect.
Today we treat load dest as integer and insert converts.
---------
Co-authored-by: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
Commit: ac6b4c618a52c62cef9b143a767991dbba7453e1
https://github.com/llvm/llvm-project/commit/ac6b4c618a52c62cef9b143a767991dbba7453e1
Author: Jon Chesterfield <jonathanchesterfield at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/vastart.ll
M llvm/test/Other/lint.ll
A llvm/test/Verifier/variadic.ll
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
Log Message:
-----------
Reapply "[Verifier] Reject va_start in non-variadic function (#88809)"
This reverts commit f4960da6023b8034ae68925c3223d51624621b37.
Includes a fix for the MLIR test case.
Commit: 09e7d7585cf881fb598eb56738579b84d027318c
https://github.com/llvm/llvm-project/commit/09e7d7585cf881fb598eb56738579b84d027318c
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/AST/Interp/InterpFrame.cpp
M clang/lib/AST/Interp/State.cpp
M clang/test/AST/Interp/builtin-functions.cpp
Log Message:
-----------
[clang][Interp] Don't add 'in call to' diagnostics for builtin frames
Commit: a8de3ee8994023ea7669397587f8118ae5bba9c9
https://github.com/llvm/llvm-project/commit/a8de3ee8994023ea7669397587f8118ae5bba9c9
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/AST/Interp/Disasm.cpp
Log Message:
-----------
[clang][Interp][NFC] Fix some build warnings
Fixes:
/buildbot/worker/arc-folder/llvm-project/clang/lib/AST/Interp/Disasm.cpp:143:25: warning: cast from type 'const clang::interp::Block*' to type 'void*' casts away qualifiers [-Wcast-qual]
/buildbot/worker/arc-folder/llvm-project/clang/lib/AST/Interp/Disasm.cpp:271:23: warning: cast from type 'const clang::interp::Block*' to type 'void*' casts away qualifiers [-Wcast-qual]
Commit: c18a3b6bd30456305cf1b3d78ad5a805577388c1
https://github.com/llvm/llvm-project/commit/c18a3b6bd30456305cf1b3d78ad5a805577388c1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/dpbusd.ll
M llvm/test/CodeGen/X86/dpbusd_i4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
Log Message:
-----------
[DAG] Fold extract_subvector(insert_subvector(x,y,c1),c2) --> extract_subvector(y,c2-c1) (#87925) (REAPPLIED)
If the extract_subvector is cheap, attempt to extract directly from an inserted subvector
Reapplied with a check to ensure we only attempt this for fixed vectors
Commit: 71b9f6648222771470473431bc8ef2a2c25e872c
https://github.com/llvm/llvm-project/commit/71b9f6648222771470473431bc8ef2a2c25e872c
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/Index/USRGeneration.cpp
M clang/test/Index/USR/func-type.cpp
Log Message:
-----------
[clang][Index] Use canonical function parameter types in USRs (#68222)
This is necessary to ensure that functions declared in different
translation units whose parameter types only differ in top-level
cv-qualification generate the same USR.
For example:
```
// A.cpp
void f(const int x); // c:@F at f#1I#
// B.cpp
void f(int x); // c:@F at f#I#
```
With this patch, the USR for both functions will be
`c:@F at f#I#`.
Commit: dadcaf82274805456b7d85131cf94f921b5398b7
https://github.com/llvm/llvm-project/commit/dadcaf82274805456b7d85131cf94f921b5398b7
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp
M mlir/test/Dialect/ArmSME/vector-legalization.mlir
Log Message:
-----------
[mlir][ArmSME] Support decomposing constant splats into ArmSME tiles (#88762)
This adds a simple rewrite/legalization to decompose constant splats
larger than a single ArmSME tile into multiple SME virtual tile sized
splats. E.g. a constant splat to `vector<[8]x[8]xi32>` would decompose
into four `vector<[4]x[4]xi32>` splats.
Commit: 711df7b0ae4a9ea45e431d5c0ff4a0c8b2e732c1
https://github.com/llvm/llvm-project/commit/711df7b0ae4a9ea45e431d5c0ff4a0c8b2e732c1
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/Vector/invalid.mlir
Log Message:
-----------
[vector][mlir] Restrict vector.shuffle to fixed-width vectors (#88733)
At the moment there is no support for vector.shuffle for scalable
vectors - various hooks/helpers related to `vector.shuffle` simply
ignore the scalable flags (e.g. ` ShuffleOp::inferReturnTypes`).
This is unlikely to change any time soon (vector shuffles are known to
be tricky for scalable vectors), hence this patch restricts
`vector.shuffle` to fixed width vectors.
Commit: 75244a1043d2be5003dea6914d5edc940c437cd5
https://github.com/llvm/llvm-project/commit/75244a1043d2be5003dea6914d5edc940c437cd5
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/AST/Interp/InterpBuiltin.cpp
A clang/test/AST/Interp/builtin-align-cxx.cpp
Log Message:
-----------
[clang][Interp] Implement align builtins
__builtin_is_aligned
__builtin_is_align_up
__builtin_is_align_down
Commit: 91dd844aa499d69c7ff75bf3156e2e3593a88057
https://github.com/llvm/llvm-project/commit/91dd844aa499d69c7ff75bf3156e2e3593a88057
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/test/CodeGen/RISCV/rvv/calling-conv.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
Log Message:
-----------
Recommit [RISCV] RISCV vector calling convention (2/2) (#79096) (#87736)
Bug fix: Handle RVV return type in calling convention correctly.
Return values are handled in a same way as function arguments.
One thing to mention is that if a type can be broken down into
homogeneous
vector types, e.g. {<vscale x 4 x i32>, {<vscale x 4 x i32>, <vscale x 4
x i32>}},
it is considered as a vector tuple type and need to be handled by tuple
type rule.
Commit: ac1f2de7b581c26a768c4d2a2aad36505cc63c31
https://github.com/llvm/llvm-project/commit/ac1f2de7b581c26a768c4d2a2aad36505cc63c31
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M mlir/docs/Interfaces.md
Log Message:
-----------
[MLIR][docs] Mention declarePromisedInterface in Interfaces doc (#88689)
Co-authored-by: Frederik Harwath <fharwath at amd.com>
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: 1c076b43c294c7d29d99dd50f6853b33a5b99789
https://github.com/llvm/llvm-project/commit/1c076b43c294c7d29d99dd50f6853b33a5b99789
Author: Spenser Bauman <sbauman at mathworks.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
A mlir/test/Integration/Dialect/Tosa/CPU/test-maxpool-dynamic.mlir
Log Message:
-----------
[mlir][tosa] Implement dynamic shape support for tosa.max_pool2d lowering (#87538)
The existing lowering for tosa.max_pool2d only supports dynamic
dimensions when the dynamic dimension is the batch dimension. This
change updates the lowering to support arbitrary dynamic dimensions on
the inputs and outputs of the tosa.max_pool2d operation.
This change also fixes a bug in the implementation of implicit
broadcasting in the tosa-to-linalg pass, which was introducing uses of
constant ops that violated dominance requirements.
Commit: d4602a96b48b00a50c4d891673fc622ca2e37f0a
https://github.com/llvm/llvm-project/commit/d4602a96b48b00a50c4d891673fc622ca2e37f0a
Author: Nico Weber <thakis at chromium.org>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
Log Message:
-----------
[gn] port fe48bf672e1ab2
Commit: c309dc6d0759b23b570c563f611530ff1a49e1bd
https://github.com/llvm/llvm-project/commit/c309dc6d0759b23b570c563f611530ff1a49e1bd
Author: mahtohappy <Happy.Kumar at Windriver.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/TreeTransform.h
A clang/test/SemaCXX/instantiate-new-placement-size.cpp
Log Message:
-----------
[Clang][Sema] placement new initializes typedef array with correct size (#83124)
When in-place new-ing a local variable of an array of trivial type, the
generated code calls 'memset' with the correct size of the array,
earlier it was generating size (squared of the typedef array + size).
The cause: `typedef TYPE TArray[8]; TArray x;` The type of declarator is
Tarray[8] and in `SemaExprCXX.cpp::BuildCXXNew` we check if it's of
typedef and of constant size then we get the original type and it works
fine for non-dependent cases.
But in case of template we do `TreeTransform.h:TransformCXXNEWExpr` and
there we again check the allocated type which is TArray[8] and it stays
that way, so ArraySize=(Tarray[8] type, alloc Tarray[8*type]) so the
squared size allocation.
ArraySize gets calculated earlier in `TreeTransform.h` so that
`if(!ArraySize)` condition was failing.
fix: I changed that condition to `if(ArraySize)`.
Fixes #41441
Commit: 34013e7ce25868aa8ddea116f79184e8603af56c
https://github.com/llvm/llvm-project/commit/34013e7ce25868aa8ddea116f79184e8603af56c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll
Log Message:
-----------
[X86] Add shuffle tests for BLEND(PERMUTE(X),PERMUTE(Y)) patterns
Some very basic tests for a case where we could fold BLEND(PERMUTE(X),PERMUTE(Y)) -> PERMUTE(BLEND(X,Y))
These assume the permute masks are the same, and "complete" (no undefs/duplicate elements) but we could relax that depending on the blend mask
Commit: b73476c7843f21966acb2fb5cab8515d9ec02905
https://github.com/llvm/llvm-project/commit/b73476c7843f21966acb2fb5cab8515d9ec02905
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/trunc-store-value-ty-not-power-of-2.ll
Log Message:
-----------
[SLP] Make sure MinVF is a power-of-2 by using PowerOf2Ceil.
This should ensure we explore the same VFs as before 6d66db3890a18e39.
Fixes https://github.com/llvm/llvm-project/issues/88640.
Commit: e272c37934a06cd80b9b072afc09afae5fd8c218
https://github.com/llvm/llvm-project/commit/e272c37934a06cd80b9b072afc09afae5fd8c218
Author: Nico Weber <thakis at chromium.org>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/test/Driver/windows-seh-async-verify.cpp
Log Message:
-----------
clang; Try to get windows-seh-async-verify.cpp to pass on mac
On macOS, file paths start with /Users/..., which clang-cl interptrets
as the /U switch followed by a preprocessor macro name to undefine.
Put the filename after `--` to prevent this. For consistency, move %s
to the end of the regular `clang` lines (where this isn't needed) as
well.
Commit: f69ded0d9965a6b2b76ce12db876c70f249d96d1
https://github.com/llvm/llvm-project/commit/f69ded0d9965a6b2b76ce12db876c70f249d96d1
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Sema.h
A clang/include/clang/Sema/SemaOpenMP.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
Log Message:
-----------
[clang] Introduce `SemaOpenMP` (#88642)
This patch moves OpenMP-related entities out of `Sema` to a newly
created `SemaOpenMP` class. This is a part of the effort to split `Sema`
up, and follows the recent example of CUDA, OpenACC, SYCL, HLSL.
Additional context can be found in
https://github.com/llvm/llvm-project/pull/82217,
https://github.com/llvm/llvm-project/pull/84184,
https://github.com/llvm/llvm-project/pull/87634.
Commit: 9e7aab951ffba0211193ceb435c6b49e4e19ac24
https://github.com/llvm/llvm-project/commit/9e7aab951ffba0211193ceb435c6b49e4e19ac24
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/include/clang/Basic/Cuda.h
M clang/lib/Basic/Cuda.cpp
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
Log Message:
-----------
[CUDA] Rename SM_32 to SM_32_ to work around AIX headers (#88779)
Summary:
AIX headers define this, so we need to work around it. In the future
this will be removed but for now we should just rename it to avoid these
issues.
Commit: e7fb49c24e4be4780ee4df9829980c5e8ddd511e
https://github.com/llvm/llvm-project/commit/e7fb49c24e4be4780ee4df9829980c5e8ddd511e
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
Switch release notes links to using markup for github issues; NFC
Commit: 9d8be2408768912dc113a342050049231e4fc8d1
https://github.com/llvm/llvm-project/commit/9d8be2408768912dc113a342050049231e4fc8d1
Author: Utkarsh Saxena <usx at google.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCleanup.cpp
M clang/lib/CodeGen/CGCleanup.h
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
R clang/test/CodeGenCXX/control-flow-in-stmt-expr.cpp
R clang/test/CodeGenCoroutines/coro-suspend-cleanups.cpp
Log Message:
-----------
Revert "[codegen] Emit missing cleanups for stmt-expr and coro suspensions" and related commits (#88884)
The original change caused widespread breakages in msan/ubsan tests and
causes `use-after-free`. Most likely we are adding more cleanups than
necessary.
Commit: 9ce74d6d470437cde82e91631395322ec1c36eeb
https://github.com/llvm/llvm-project/commit/9ce74d6d470437cde82e91631395322ec1c36eeb
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
Log Message:
-----------
[AMDGPU][CodeGen] Improve handling of memcpy for -Os/-Oz compilations (#87632)
We had some instances when LLVM would not inline fixed-count memcpy and
ended up
attempting to lower it a a libcall, which would not work on AMDGPU as
the
address space doesn't meet the requirement, causing compiler crash.
The patch relaxes the threshold used for -Os/-Oz compilation so we're
always allowed
to inline memory copy functions.
This patch basically does the same thing as
https://reviews.llvm.org/D158226 for
AMDGPU.
Fix #88497.
Commit: 6ab5927238395798c2e8b657bb59a0304046099d
https://github.com/llvm/llvm-project/commit/6ab5927238395798c2e8b657bb59a0304046099d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/smax-unsigned-operand.ll
Log Message:
-----------
[SLP][NFC]Add a test with the incorrect vectorization of smax with unsigned arg.
Commit: 26ebe16d78b22329d602db0398ce163ad610b0dc
https://github.com/llvm/llvm-project/commit/26ebe16d78b22329d602db0398ce163ad610b0dc
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/smax-unsigned-operand.ll
Log Message:
-----------
[SLP]Fix PR88834: check if unsigned arg can be trunced, being used in smax/smin intrinsics.
Need to check that unsigned argument can be safely used in smax/smin
intrinsics by checking if at least single sign bit is cleared, otherwise
its value may be treated as negative instead of positive.
Commit: e185978321db4500d72fb1186476ee4104c5928b
https://github.com/llvm/llvm-project/commit/e185978321db4500d72fb1186476ee4104c5928b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-casts.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle.ll
Log Message:
-----------
[VectorCombine][X86] Regenerate shuffle.ll + shuffle-of-casts.ll
Use v4 of UTC to improve regex matching of argument names to fix a filecheck matching in a future patch
Commit: e84b2fb48df882ee1f49bbbca29d44fba22192a8
https://github.com/llvm/llvm-project/commit/e84b2fb48df882ee1f49bbbca29d44fba22192a8
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/vectorize-force-tail-with-evl.ll
Log Message:
-----------
[LV][NFCI]Use integer for cost/trip count calculations instead of double, fix possible UB.
Using fp type in the compiler is not the best idea, here it used with
the comparison for equal to 0 and may cause undefined behavior in some
cases.
Reviewers: fhahn
Reviewed By: fhahn
Pull Request: https://github.com/llvm/llvm-project/pull/87241
Commit: 254df2e35c14414564d233902b25305ed17d251c
https://github.com/llvm/llvm-project/commit/254df2e35c14414564d233902b25305ed17d251c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
A llvm/test/Transforms/VectorCombine/X86/shuffle-of-binops.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle.ll
Log Message:
-----------
[VectorCombine][X86] shuffle-of-binops.ll - split off foldShuffleOfBinops tests from shuffle.ll
Commit: 6133878227efc30355c02c2f089e06ce58231a3d
https://github.com/llvm/llvm-project/commit/6133878227efc30355c02c2f089e06ce58231a3d
Author: Erich Keane <ekeane at nvidia.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/SemaOpenACC/compute-construct-clause-ast.cpp
A clang/test/SemaOpenACC/compute-construct-self-clause.c
A clang/test/SemaOpenACC/compute-construct-self-clause.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[OpenACC] Implement `self` clause for compute constructs (#88760)
`self` clauses on compute constructs take an optional condition
expression. We again limit the implementation to ONLY compute constructs
to ensure we get all the rules correct for others. However, this one
will be particularly complicated, as it takes a `var-list` for `update`,
so when we get to that construct/clause combination, we need to do that
as well.
This patch also furthers uses of the `OpenACCClauses.def` as it became
useful while implementing this (as well as some other minor refactors as
I went through).
Finally, `self` and `if` clauses have an interaction with each other, if
an `if` clause evaluates to `true`, the `self` clause has no effect.
While this is intended and can be used 'meaningfully', we are warning on
this with a very granular warning, so that this edge case will be
noticed by newer users, but can be disabled trivially.
Commit: ac791888bbbe58651e597cf7a4b2276424b77a92
https://github.com/llvm/llvm-project/commit/ac791888bbbe58651e597cf7a4b2276424b77a92
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Add missing dependency for 1c076b43c294c7d29d99dd50f6853b33a5b99789
Commit: a0f8191af3945482f0f7a7c8f030e8c519a795b7
https://github.com/llvm/llvm-project/commit/a0f8191af3945482f0f7a7c8f030e8c519a795b7
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M libclc/CMakeLists.txt
Log Message:
-----------
[libclc] Give built bytecode objects a .bc extension. NFC
Commit: 3d118f92081ea0c7048749dc5d08c8e8217be4eb
https://github.com/llvm/llvm-project/commit/3d118f92081ea0c7048749dc5d08c8e8217be4eb
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M libclc/CMakeLists.txt
Log Message:
-----------
[libclc] Fix dependencies between targets
We need file-level - not target-level - dependencies for these custom
commands to re-trigger when their dependencies change.
Commit: 60de56c743c414240b293a8b8ee10bc2129d7e10
https://github.com/llvm/llvm-project/commit/60de56c743c414240b293a8b8ee10bc2129d7e10
Author: Harald van Dijk <harald.vandijk at codeplay.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/lib/CodeGen/CGCall.cpp
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
Log Message:
-----------
[ValueTracking] Restore isKnownNonZero parameter order. (#88873)
Prior to #85863, the required parameters of llvm::isKnownNonZero were
Value and DataLayout. After, they are Value, Depth, and SimplifyQuery,
where SimplifyQuery is implicitly constructible from DataLayout. The
change to move Depth before SimplifyQuery needed callers to be updated
unnecessarily, and as commented in #85863, we actually want Depth to be
after SimplifyQuery anyway so that it can be defaulted and the caller
does not need to specify it.
Commit: b03c1d4523bc22ab335f8bce489a52dc00b52b54
https://github.com/llvm/llvm-project/commit/b03c1d4523bc22ab335f8bce489a52dc00b52b54
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2024-04-16 (Tue, 16 Apr 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclBase.h
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/AST/StmtOpenACC.h
M clang/include/clang/Basic/Cuda.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaOpenACC.h
A clang/include/clang/Sema/SemaOpenMP.h
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/APINotes/APINotesReader.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclBase.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/Disasm.cpp
M clang/lib/AST/Interp/FunctionPointer.h
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/InterpBlock.h
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/lib/AST/Interp/InterpFrame.cpp
M clang/lib/AST/Interp/Pointer.h
M clang/lib/AST/Interp/State.cpp
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/lib/Basic/Cuda.cpp
M clang/lib/Basic/Targets/NVPTX.cpp
M clang/lib/Basic/Targets/SPIR.h
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCleanup.cpp
M clang/lib/CodeGen/CGCleanup.h
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprAgg.cpp
M clang/lib/CodeGen/CGExprCXX.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Index/USRGeneration.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Parse/ParseOpenMP.cpp
M clang/lib/Parse/ParseStmt.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/Serialization/GlobalModuleIndex.cpp
M clang/lib/Serialization/MultiOnDiskHashTable.h
M clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
A clang/test/AST/Interp/builtin-align-cxx.cpp
M clang/test/AST/Interp/builtin-functions.cpp
M clang/test/AST/Interp/cxx03.cpp
M clang/test/AST/Interp/functions.cpp
M clang/test/AST/Interp/records.cpp
M clang/test/AST/Interp/vectors.cpp
M clang/test/Analysis/Inputs/system-header-simulator-cxx.h
M clang/test/Analysis/cxx-uninitialized-object-ptr-ref.cpp
M clang/test/Analysis/exercise-ps.c
M clang/test/Analysis/explain-svals.cpp
A clang/test/Analysis/malloc-std-namespace.cpp
M clang/test/Analysis/malloc.c
M clang/test/Analysis/malloc.cpp
M clang/test/Analysis/stack-addr-ps.c
M clang/test/Analysis/stackaddrleak.c
M clang/test/CodeGen/target-data.c
R clang/test/CodeGenCXX/control-flow-in-stmt-expr.cpp
M clang/test/CodeGenCXX/module-funcs-from-imports.cppm
R clang/test/CodeGenCoroutines/coro-suspend-cleanups.cpp
A clang/test/Driver/windows-seh-async-verify.cpp
M clang/test/Index/USR/func-type.cpp
A clang/test/Modules/hashing-decls-in-exprs-from-gmf-2.cppm
M clang/test/ParserOpenACC/parse-clauses.c
A clang/test/SemaCXX/instantiate-new-placement-size.cpp
M clang/test/SemaOpenACC/compute-construct-clause-ast.cpp
A clang/test/SemaOpenACC/compute-construct-self-clause.c
A clang/test/SemaOpenACC/compute-construct-self-clause.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
M flang/docs/Intrinsics.md
M flang/include/flang/Runtime/extensions.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/runtime/extensions.cpp
M flang/test/Lower/OpenMP/FIR/target.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/use-device-ptr-to-use-device-addr.f90
A flang/unittests/Runtime/AccessTest.cpp
M flang/unittests/Runtime/CMakeLists.txt
M libclc/CMakeLists.txt
M libcxx/include/__algorithm/pstl_backends/cpu_backends/any_of.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/fill.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/find_if.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/for_each.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/libdispatch.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/merge.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/serial.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/stable_sort.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/thread.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/transform.h
M libcxx/include/__algorithm/pstl_backends/cpu_backends/transform_reduce.h
M libcxx/include/__pstl/cpu_algos/cpu_traits.h
M lld/COFF/Writer.cpp
M lld/ELF/InputSection.cpp
M lld/test/COFF/autoimport-arm-data.s
M lld/test/COFF/autoimport-arm64-data.s
M lld/test/COFF/autoimport-gnu-implib.s
A lld/test/COFF/autoimport-handler-func.s
M lld/test/COFF/autoimport-warn.s
M lld/test/COFF/autoimport-x86.s
A lld/test/ELF/loongarch-relax-align-ldr.s
M lld/test/ELF/loongarch-relax-emit-relocs.s
M lldb/source/Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.cpp
M lldb/unittests/UnwindAssembly/CMakeLists.txt
A lldb/unittests/UnwindAssembly/x86-but-no-x86-target/CMakeLists.txt
A lldb/unittests/UnwindAssembly/x86-but-no-x86-target/Testx86AssemblyInspectionEngine.cpp
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
M llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
M llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZcmop.td
M llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSchedRocket.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR1.td
M llvm/lib/Target/RISCV/RISCVSchedXiangShanNanHu.td
M llvm/lib/Target/RISCV/RISCVSchedule.td
A llvm/lib/Target/RISCV/RISCVScheduleXSf.td
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/X86/GISel/X86RegisterBankInfo.cpp
M llvm/lib/Target/X86/GISel/X86RegisterBankInfo.h
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/combine-commute-fp-const-lhs.mir
A llvm/test/CodeGen/AArch64/GlobalISel/combine-commute-int-const-lhs.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-const-fold-barrier-rhs.mir
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-select-to-fminmax.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-to-fmin-fmax.ll
M llvm/test/CodeGen/AArch64/GlobalISel/vastart.ll
M llvm/test/CodeGen/AArch64/and-sink.ll
M llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fcanonicalize.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-and.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/smed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/umed3.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
A llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/vopd-combine.mir
M llvm/test/CodeGen/Hexagon/vect/zext-v4i1.ll
A llvm/test/CodeGen/RISCV/prefer-w-inst.ll
A llvm/test/CodeGen/RISCV/prefer-w-inst.mir
M llvm/test/CodeGen/RISCV/rvv/calling-conv.ll
A llvm/test/CodeGen/RISCV/rvv/pr88799.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
R llvm/test/CodeGen/RISCV/strip-w-suffix.ll
M llvm/test/CodeGen/X86/GlobalISel/fconstant.ll
A llvm/test/CodeGen/X86/GlobalISel/regbankselect-sse-intrinsics.ll
M llvm/test/CodeGen/X86/GlobalISel/regbankselect-x87.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/dpbusd.ll
M llvm/test/CodeGen/X86/dpbusd_i4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/MC/LoongArch/Relocations/relax-addsub.s
M llvm/test/MC/LoongArch/Relocations/relax-align.s
M llvm/test/MC/RISCV/rv32zcmop-invalid.s
M llvm/test/MC/RISCV/rvzcmop-valid.s
M llvm/test/Other/lint.ll
M llvm/test/TableGen/def-multiple-operands.td
M llvm/test/Transforms/InstCombine/fcmp.ll
M llvm/test/Transforms/InstCombine/minmax-intrinsics.ll
M llvm/test/Transforms/JumpThreading/pr79175.ll
M llvm/test/Transforms/JumpThreading/select.ll
M llvm/test/Transforms/JumpThreading/thread-prob-7.ll
A llvm/test/Transforms/JumpThreading/uncond-no-phi.ll
M llvm/test/Transforms/LoopVectorize/vectorize-force-tail-with-evl.ll
A llvm/test/Transforms/PhaseOrdering/thread-uncond-bb.ll
M llvm/test/Transforms/SCCP/pr50901.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/smax-unsigned-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/trunc-store-value-ty-not-power-of-2.ll
A llvm/test/Transforms/VectorCombine/X86/shuffle-of-binops.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle-of-casts.ll
M llvm/test/Transforms/VectorCombine/X86/shuffle.ll
A llvm/test/Verifier/variadic.ll
M llvm/tools/llvm-exegesis/lib/SubprocessMemory.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
M llvm/unittests/Transforms/Utils/LocalTest.cpp
M llvm/utils/gn/secondary/lldb/test/BUILD.gn
M mlir/docs/Interfaces.md
M mlir/include/mlir/Dialect/Affine/Transforms/Transforms.h
M mlir/include/mlir/Dialect/Arith/Transforms/Transforms.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPClauseOperands.h
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/include/mlir/Interfaces/ValueBoundsOpInterface.h
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamed.cpp
M mlir/lib/Dialect/Affine/IR/ValueBoundsOpInterfaceImpl.cpp
M mlir/lib/Dialect/Affine/Transforms/ReifyValueBounds.cpp
M mlir/lib/Dialect/Arith/IR/ValueBoundsOpInterfaceImpl.cpp
M mlir/lib/Dialect/Arith/Transforms/IntNarrowing.cpp
M mlir/lib/Dialect/Arith/Transforms/ReifyValueBounds.cpp
M mlir/lib/Dialect/ArmSME/Transforms/VectorLegalization.cpp
M mlir/lib/Dialect/Linalg/Transforms/Padding.cpp
M mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
M mlir/lib/Dialect/MemRef/Transforms/IndependenceTransforms.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/SCF/IR/ValueBoundsOpInterfaceImpl.cpp
M mlir/lib/Dialect/SCF/Transforms/UpliftWhileToFor.cpp
M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/IndependenceTransforms.cpp
M mlir/lib/Dialect/Tensor/Utils/Utils.cpp
M mlir/lib/Interfaces/ValueBoundsOpInterface.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/Affine/value-bounds-op-interface-impl.mlir
M mlir/test/Dialect/ArmSME/vector-legalization.mlir
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Dialect/Vector/invalid.mlir
A mlir/test/Integration/Dialect/Tosa/CPU/test-maxpool-dynamic.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/lib/Dialect/Affine/TestReifyValueBounds.cpp
M mlir/test/lib/Dialect/Test/TestDialect.cpp
M mlir/test/lib/Dialect/Test/TestOps.td
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
add comment in the lit test and rebase
Created using spr 1.3.4
Compare: https://github.com/llvm/llvm-project/compare/891097e63825...b03c1d4523bc
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