[all-commits] [llvm/llvm-project] 990c4b: [AArch64][SVE2] Generate SVE2 BSL instruction in L...

[Dinar Temirbulatov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 990c4bc95f69afb63849898b6b25b13d49d6cdd4
      https://github.com/llvm/llvm-project/commit/990c4bc95f69afb63849898b6b25b13d49d6cdd4
  Author: Dinar Temirbulatov <Dinar.Temirbulatov at arm.com>
  Date:   2024-04-10 (Wed, 10 Apr 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    A llvm/test/CodeGen/AArch64/sve2-bsl.ll

  Log Message:
  -----------
  [AArch64][SVE2] Generate SVE2 BSL instruction in LLVM for bit-twiddling. (#83514)

Allow to fold or/and-and to BSL instuction for scalable vectors.



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