[all-commits] [llvm/llvm-project] 4cb110: [RFC] IR: Support atomicrmw FP ops with vector typ...

[Matt Arsenault via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4cb110a84f587d3c65b85d79ab6fc8aa5489fb86
      https://github.com/llvm/llvm-project/commit/4cb110a84f587d3c65b85d79ab6fc8aa5489fb86
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-04-06 (Sat, 06 Apr 2024)

  Changed paths:
    M llvm/docs/LangRef.rst
    M llvm/lib/AsmParser/LLParser.cpp
    M llvm/lib/CodeGen/AtomicExpandPass.cpp
    M llvm/lib/IR/Verifier.cpp
    M llvm/test/Assembler/atomic.ll
    A llvm/test/Assembler/invalid-atomicrmw-scalable.ll
    A llvm/test/Assembler/invalid-atomicrmw-xchg-fp-vector.ll
    A llvm/test/CodeGen/AArch64/atomicrmw-fadd-fp-vector.ll
    A llvm/test/CodeGen/X86/atomicrmw-fadd-fp-vector.ll
    A llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-fp-vector.ll
    M llvm/unittests/IR/VerifierTest.cpp

  Log Message:
  -----------
  [RFC] IR: Support atomicrmw FP ops with vector types (#86796)

Allow using atomicrmw fadd, fsub, fmin, and fmax with vectors of
floating-point type. AMDGPU supports atomic fadd for <2 x half> and <2 x
bfloat> on some targets and address spaces.

Note this only supports the proper floating-point operations; float
vector typed xchg is still not supported. cmpxchg still only supports
integers, so this inserts bitcasts for the loop expansion.

I have support for fp vector typed xchg, and vector of int/ptr
separately implemented but I don't have an immediate need for those
beyond feature consistency.



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