[all-commits] [llvm/llvm-project] 65b123: [BPF] rename 'arena' to 'address_space' (#85161)
Fangrui Song via All-commits
all-commits at lists.llvm.org
Fri Mar 15 10:37:54 PDT 2024
Branch: refs/heads/users/MaskRay/spr/driver-dont-alias-mstrict-align-to-mno-unaligned-access
Home: https://github.com/llvm/llvm-project
Commit: 65b123e287d1320170bb3317179bc917f21852fa
https://github.com/llvm/llvm-project/commit/65b123e287d1320170bb3317179bc917f21852fa
Author: eddyz87 <eddyz87 at gmail.com>
Date: 2024-03-14 (Thu, 14 Mar 2024)
Changed paths:
M clang/lib/Basic/Targets/BPF.cpp
M clang/test/Preprocessor/bpf-predefined-macros.c
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
M llvm/test/CodeGen/BPF/addr-space-globals.ll
M llvm/test/CodeGen/BPF/addr-space-globals2.ll
Log Message:
-----------
[BPF] rename 'arena' to 'address_space' (#85161)
There are a few places where `arena` name is used for pointers in
non-zero address space in BPF backend, rename these to use a more
generic `address_space`:
- macro `__BPF_FEATURE_ARENA_CAST` -> `__BPF_FEATURE_ADDR_SPACE_CAST
- name for arena global variables section `.arena.N` ->
`.addr_space.N`
Commit: b0d1e32ca2b46870c0a4becf2547564f9c7ae0a0
https://github.com/llvm/llvm-project/commit/b0d1e32ca2b46870c0a4becf2547564f9c7ae0a0
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-03-14 (Thu, 14 Mar 2024)
Changed paths:
M clang/include/clang/Format/Format.h
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/QualifierAlignmentFixer.cpp
M clang/lib/Format/QualifierAlignmentFixer.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/TokenAnnotator.h
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
Revert "[clang-format][NFC] Eliminate the IsCpp parameter in all functions" (#85353)
Reverts llvm/llvm-project#84599
This broke the presubmit bot.
Commit: c3a1eb6207d85cb37ea29306481b40c9f6402309
https://github.com/llvm/llvm-project/commit/c3a1eb6207d85cb37ea29306481b40c9f6402309
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-03-14 (Thu, 14 Mar 2024)
Changed paths:
M clang/include/clang/Format/Format.h
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/FormatToken.cpp
M clang/lib/Format/FormatToken.h
M clang/lib/Format/FormatTokenLexer.cpp
M clang/lib/Format/QualifierAlignmentFixer.cpp
M clang/lib/Format/QualifierAlignmentFixer.h
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/TokenAnnotator.h
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
Reland [clang-format][NFC] Eliminate the IsCpp parameter in all functions (#84599)
Initialize IsCpp in LeftRightQualifierAlignmentFixer ctor.
Commit: 6ed4d15cf49bca27157c6c8c896a7f674ef5df3a
https://github.com/llvm/llvm-project/commit/6ed4d15cf49bca27157c6c8c896a7f674ef5df3a
Author: Matthias Springer <me at m-sp.org>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/BufferizableOpInterfaceImpl.cpp
Log Message:
-----------
[mlir][sparse_tensor] Implement bufferization interface for `foreach` (#85183)
This commit fixes a memory leak in `sparse_codegen_foreach.mlir`. The
bufferization inserted a copy for the operand of `sparse_tensor.foreach`
because it conservatively assumed that the op writes to the operand.
Commit: 5124eedd357b75a96f695c20ebad427b61741abc
https://github.com/llvm/llvm-project/commit/5124eedd357b75a96f695c20ebad427b61741abc
Author: Matthias Springer <me at m-sp.org>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M mlir/test/Integration/Dialect/SparseTensor/CPU/dual_sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_sparse2dense.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_sparse2sparse.mlir
Log Message:
-----------
[mlir][sparse] Fix memory leaks (part 3) (#85184)
This commit fixes memory leaks in sparse tensor integration tests by
adding `bufferization.dealloc_tensor` ops.
Note: Buffer deallocation will be automated in the future with the
ownership-based buffer deallocation pass, making `dealloc_tensor`
obsolete (only codegen path, not when using the runtime library).
Commit: e8e8df4c1bf97f0674b2387175cdeb251a4e0d9c
https://github.com/llvm/llvm-project/commit/e8e8df4c1bf97f0674b2387175cdeb251a4e0d9c
Author: Matthias Springer <me at m-sp.org>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorConversion.cpp
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack_d.mlir
Log Message:
-----------
[mlir][sparse] Add `has_runtime_library` test op (#85355)
This commit adds a new test-only op:
`sparse_tensor.has_runtime_library`. The op returns "1" if the sparse
compiler runs in runtime library mode.
This op is useful for writing test cases that require different IR
depending on whether the sparse compiler runs in runtime library or
codegen mode.
This commit fixes a memory leak in `sparse_pack_d.mlir`. This test case
uses `sparse_tensor.assemble` to create a sparse tensor SSA value from
existing buffers. This runtime library reallocates+copies the existing
buffers; the codegen path does not. Therefore, the test requires
additional deallocations when running in runtime library mode.
Alternatives considered:
- Make the codegen path allocate. "Codegen" is the "default" compilation
mode and it is handling `sparse_tensor.assemble` correctly. The issue is
with the runtime library path, which should not allocate. Therefore, it
is better to put a workaround in the runtime library path than to work
around the issue with a new flag in the codegen path.
- Add a `sparse_tensor.runtime_only` attribute to
`bufferization.dealloc_tensor`. Verifying that the attribute can only be
attached to `bufferization.dealloc_tensor` may introduce an unwanted
dependency of `MLIRSparseTensorDialect` on `MLIRBufferizationDialect`.
Commit: 32a067c068f9ac285cf98be3154c8f1909fa2b21
https://github.com/llvm/llvm-project/commit/32a067c068f9ac285cf98be3154c8f1909fa2b21
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/include/llvm/CodeGenTypes/LowLevelType.h
M llvm/lib/CodeGen/LowLevelTypeUtils.cpp
M llvm/unittests/CodeGen/LowLevelTypeTest.cpp
Log Message:
-----------
[GlobalISel] Introduce LLT:token() as a special scalar type (#85189)
The new token type is used in #67006 for implementing convergence
control tokens in GMIR.
Commit: c54f22f5fe3eef055df4be7239b890eaab15f5ff
https://github.com/llvm/llvm-project/commit/c54f22f5fe3eef055df4be7239b890eaab15f5ff
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU] Add eventMask function in WaitcntGenerator class (NFC) (#85210)
This would bring a cleaner interface while obtaining wait event masks by
combining various wait event types in the derived classes.
Commit: e895c523b53c97c92a69ba0997e8904edd1e40a8
https://github.com/llvm/llvm-project/commit/e895c523b53c97c92a69ba0997e8904edd1e40a8
Author: Fangrui Song <i at maskray.me>
Date: 2024-03-14 (Thu, 14 Mar 2024)
Changed paths:
M llvm/include/llvm/Object/ELFObjectFile.h
Log Message:
-----------
[Object] getBuildAttributes: check e_machine. NFC
getBuildAttributes is only called for ARM/RISCV object files and
`SHT_ARM_ATTRIBUTES == SHT_RISCV_ATTRIBUTES`, so the following check
`Sec.sh_type == ELF::SHT_ARM_ATTRIBUTES || Sec.sh_type == ELF::SHT_RISCV_ATTRIBUTES`
is actually fine. But the convention is to guard such processor-specific
section type checks with an e_machine test.
Commit: d35f944dde1511bf3f21ff7492343ee15d0eea45
https://github.com/llvm/llvm-project/commit/d35f944dde1511bf3f21ff7492343ee15d0eea45
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-03-14 (Thu, 14 Mar 2024)
Changed paths:
M .ci/generate-buildkite-pipeline-premerge
Log Message:
-----------
Add missing clang to the monolithic pre-merge build (#85354)
Clang has a custom separate pipeline integrated with libc++ that only
runs in release mode. It means that changes which touches only clang
won't run the clang tests in the configuration used by LLVM premerge and
will break it unknowingly.
Commit: 297af060e26e13d35990e961648bd1a3c318f028
https://github.com/llvm/llvm-project/commit/297af060e26e13d35990e961648bd1a3c318f028
Author: Fangrui Song <i at maskray.me>
Date: 2024-03-14 (Thu, 14 Mar 2024)
Changed paths:
M llvm/test/tools/llvm-readobj/ELF/machine-specific-section-types.test
Log Message:
-----------
[llvm-readobj,yaml2obj,test] Test SHT_HEX_ORDERED
The section type from 9f64604e74a46ea1c8a8bd258b4a4195f79ec6cb (2013)
was untested.
Commit: 2a547f0f6c6b456342b9bfad38787f54f265fc96
https://github.com/llvm/llvm-project/commit/2a547f0f6c6b456342b9bfad38787f54f265fc96
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-03-14 (Thu, 14 Mar 2024)
Changed paths:
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
Log Message:
-----------
[MLIR] Fix `mlir-opt --show-dialects` to not require any input (as documented)
Commit: 4372cab91476137c6637a277dcc6a9df02c12aae
https://github.com/llvm/llvm-project/commit/4372cab91476137c6637a277dcc6a9df02c12aae
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/atomics-sm70.ll
M llvm/test/CodeGen/NVPTX/atomics.ll
Log Message:
-----------
Reland "[NVPTX] Add support for atomic add for f16 type" (#85197)
atom.add.noftz.f16 is supported since SM 7.0
Commit: abe292f9f8d0ff339e7d94d1c3984b9fcb23d546
https://github.com/llvm/llvm-project/commit/abe292f9f8d0ff339e7d94d1c3984b9fcb23d546
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M libcxx/test/std/time/time.zone/time.zone.db/time.zone.db.access/get_tzdb.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.db/time.zone.db.access/get_tzdb_list.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.db/time.zone.db.list/front.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.db/time.zone.db.list/iterators.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.db/time.zone.db.remote/reload_tzdb.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.db/time.zone.db.remote/remote_version.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.link/time.zone.link.members/name.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.link/time.zone.link.members/target.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.link/time.zone.link.nonmembers/comparison.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.timezone/time.zone.members/name.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.timezone/time.zone.nonmembers/comparison.pass.cpp
Log Message:
-----------
[libc++] Enables TZDB tests. (#82108)
With the timezone information available in the CI these tests can be
enabled again.
Fixes: https://github.com/llvm/llvm-project/issues/81654
Commit: 0a739eb75fe68b1cec4e4aaad8b5395bb5da9a89
https://github.com/llvm/llvm-project/commit/0a739eb75fe68b1cec4e4aaad8b5395bb5da9a89
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/test/AST/Interp/builtin-functions.cpp
Log Message:
-----------
[clang][Interp] Implement __builtin___{CF,NS}StringMakeConstantString
By doing the same thing the current interpreter does: Just passing on
the first parameter.
Commit: ff2fb2a1d78585944dcdb9061c8487fe1476dfa4
https://github.com/llvm/llvm-project/commit/ff2fb2a1d78585944dcdb9061c8487fe1476dfa4
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/test/Instrumentation/ThreadSanitizer/atomic.ll
Log Message:
-----------
[TSan] Fix atomicrmw xchg with pointer and floats (#85228)
atomicrmw xchg also accepts pointer and floating-point values. To handle
those, insert necessary casts to and from integer. This is what we do
for cmpxchg as well.
Fixes https://github.com/llvm/llvm-project/issues/85226.
Commit: e61e26091c5088b32b68e020cd51ab6de972004f
https://github.com/llvm/llvm-project/commit/e61e26091c5088b32b68e020cd51ab6de972004f
Author: SahilPatidar <patidarsahil2001 at gmail.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/test/Transforms/InstCombine/mul.ll
M llvm/test/Transforms/InstCombine/sub-xor-cmp.ll
Log Message:
-----------
[InstCombine] Fold `mul (sext bool X), Y` into `select X, -Y, 0` (#84792)
Alive2: https://alive2.llvm.org/ce/z/n_ns-W
Resolve #84608
Commit: 8a237ab7d9022d24441544ba25be480f0c944f5a
https://github.com/llvm/llvm-project/commit/8a237ab7d9022d24441544ba25be480f0c944f5a
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
Log Message:
-----------
[TSan] Avoid use of ReplaceInstWithInst()
This is mainly for consistency across code paths, but also makes
sure that all calls use IRInstrumentationBuilder and its special
debuginfo handling.
The two remaining uses don't actually need RAUW, they just have
to erase the original instruction.
Commit: e639e7e986e0c1dcb5af3de65548d8518eb685a6
https://github.com/llvm/llvm-project/commit/e639e7e986e0c1dcb5af3de65548d8518eb685a6
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
Log Message:
-----------
[AArch64] NFC: Simplify the smstart/smstop pseudo. (#85067)
This is just a bit of cleanup to make the pseudo/code easier to
understand. This is based on the observation that we only need to pass
in a runtime value for 'pstate' if is actually needed for generating a
runtime check.
Commit: c42bc2ea8f66def31ca9a381e995ec61e9fa9b05
https://github.com/llvm/llvm-project/commit/c42bc2ea8f66def31ca9a381e995ec61e9fa9b05
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang][NFC] Make some local pointers const
The function returns a const Expr* anyway.
Commit: 8ab0632735f87961d27094a1076a41264e2fd3ed
https://github.com/llvm/llvm-project/commit/8ab0632735f87961d27094a1076a41264e2fd3ed
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeStmtGen.cpp
M clang/lib/AST/Interp/ByteCodeStmtGen.h
M clang/test/AST/Interp/cxx23.cpp
Log Message:
-----------
[clang][Interp] Handle goto and label statements
Commit: 141145232f915b44aef6e3854f091da03c41a2b6
https://github.com/llvm/llvm-project/commit/141145232f915b44aef6e3854f091da03c41a2b6
Author: Artem Tyurin <artem.tyurin at gmail.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/include/llvm/Analysis/ConstantFolding.h
M llvm/include/llvm/Analysis/InstSimplifyFolder.h
M llvm/include/llvm/Analysis/InstructionSimplify.h
M llvm/include/llvm/Analysis/TargetFolder.h
M llvm/include/llvm/IR/ConstantFolder.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/IRBuilderFolder.h
M llvm/include/llvm/IR/NoFolder.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
Log Message:
-----------
[IRBuilder] Fold binary intrinsics (#80743)
Fixes https://github.com/llvm/llvm-project/issues/61240.
Commit: 719e077a5680ccfd6601195754c1702b03ba3645
https://github.com/llvm/llvm-project/commit/719e077a5680ccfd6601195754c1702b03ba3645
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.h
M clang/test/AST/Interp/cxx23.cpp
Log Message:
-----------
[clang][Interp] Handle PackIndexExprs
Commit: 8310fd3a093ce98e4df599f7cac2081f551e3fef
https://github.com/llvm/llvm-project/commit/8310fd3a093ce98e4df599f7cac2081f551e3fef
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineLoopInfo.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/lib/CodeGen/MachineLoopInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.h
A llvm/test/CodeGen/AArch64/sme-machine-licm-vg.mir
Log Message:
-----------
[MachineLICM] Give opportunity to analyze physregs for invariance. (#84779)
At the moment MachineLoopInfo has a very simple way to determine if a
use of a physical register will be invariant: if it is not a constant
value or if it's not an ignorable use, then it's not considered
invariant.
>From a compile-time performance perspective this makes a lot of sense,
but it limits code that uses implicit physical registers from being
hoisted until the later MachineLICM pass (after register allocation),
which has a lot fewer opportunities to hoist.
For AArch64 SME we use an implicit physical register ($vg) to avoid
rematerialization beyond certain instructions. Doing this led to
regressions because simple expressions were no longer hoisted by Early
MachineLICM.
This patch adds some extra checks to 'isLoopInvariant' to see if any of
the defs are found in the loop. If not, we can considered it loop
invariant.
We expect the impact on compile-time to be negligible because there is
an incentive for users to reduce the need for the smstart/smstop
instructions that define $vg. In either case, we've put the
functionality under a target interface to limit this only to specific
registers.
Commit: 72d85b0315628c982be21c7aada59b6f9274de90
https://github.com/llvm/llvm-project/commit/72d85b0315628c982be21c7aada59b6f9274de90
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/Opcodes.td
M clang/test/AST/Interp/if.cpp
Log Message:
-----------
[clang][Interp] Emit Error op for contains-error expressions
Instead of aborting interpretation right away. This way we can still
successfully evaluate such functions provided we don't reach the
Error op at all.
Commit: dbb2fd5974fbdf82d4b1b0dd0dde5170e3629768
https://github.com/llvm/llvm-project/commit/dbb2fd5974fbdf82d4b1b0dd0dde5170e3629768
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/CodeGen/MachineLoopInfo.cpp
Log Message:
-----------
[CodeGen] Remove unused lambda capture (NFC)
llvm-project/llvm/lib/CodeGen/MachineLoopInfo.cpp:215:14:
error: lambda capture 'Reg' is not used [-Werror,-Wunused-lambda-capture]
[this, Reg](const MachineInstr &MI) { return this->contains(&MI); });
~~^~~
1 error generated.
Commit: 01a31cee561efe90fbd1d33fa89f403dd8ff9012
https://github.com/llvm/llvm-project/commit/01a31cee561efe90fbd1d33fa89f403dd8ff9012
Author: Matthias Gehre <matthias.gehre at amd.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Dialect/EmitC/invalid_ops.mlir
A mlir/test/Target/Cpp/subscript.mlir
Log Message:
-----------
[MLIR] EmitC: Add subscript operator (#84783)
Introduces a SubscriptOp that allows to write IR like
```
func.func @load_store(%arg0: !emitc.array<4x8xf32>, %arg1: !emitc.array<3x5xf32>, %arg2: index, %arg3: index) {
%0 = emitc.subscript %arg0[%arg2, %arg3] : <4x8xf32>, index, index
%1 = emitc.subscript %arg1[%arg2, %arg3] : <3x5xf32>, index, index
emitc.assign %0 : f32 to %1 : f32
return
}
```
which gets translated into the C++ code
```
v1[v2][v3] = v0[v1][v2];
```
To make this happen, this
- adds the SubscriptOp
- allows the subscript op as rhs of emitc.assign
- updates the emitter to print SubscriptOps
The emitter prints emitc.subscript in a delayed fashing to allow it
being used as lvalue.
I.e. while processing
```
%0 = emitc.subscript %arg0[%arg2, %arg3] : <4x8xf32>, index, index
```
it will not emit any text, but record in the `valueMapper` that the name
for `%0` is `v0[v1][v2]`, see `CppEmitter::getSubscriptName`. Only when
that result is then used (here in `emitc.assign`), that name is inserted
into the text.
Commit: ddcbab37ac0e5743a8d39be3dd48d967f4c85504
https://github.com/llvm/llvm-project/commit/ddcbab37ac0e5743a8d39be3dd48d967f4c85504
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
M compiler-rt/test/tsan/signal_errno.cpp
M compiler-rt/test/tsan/signal_sync.cpp
M compiler-rt/test/tsan/signal_thread.cpp
M compiler-rt/test/tsan/signal_thread2.cpp
Log Message:
-----------
[compiler-rt] Also consider SIGPROF as a synchronous signal
Blocking that signal causes inter-blocking for profilers that monitor
threads through that signal.
Update tests accordingly to use an uncaught signal.
This is a recommit of 6f3f659ce9ab91002b4a490b0ce4b085981383cd with the
tests fixed.
Fix #83844 and #83561
Commit: d59256992e8df79991e4c6baaff1a7c4830a26d5
https://github.com/llvm/llvm-project/commit/d59256992e8df79991e4c6baaff1a7c4830a26d5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] visitAND - pull out repeated SDLoc(N). NFC.
Commit: fe753f77c35cf236b8aed6b5ebd857973e047925
https://github.com/llvm/llvm-project/commit/fe753f77c35cf236b8aed6b5ebd857973e047925
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] visitTRUNCATE - pull out repeated SDLoc(N). NFC.
Commit: c7c561ef98ad783d257dab3940dd2378ef8760bf
https://github.com/llvm/llvm-project/commit/c7c561ef98ad783d257dab3940dd2378ef8760bf
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
A llvm/test/CodeGen/AMDGPU/itofp.i128.ll
Log Message:
-----------
AMDGPU: Enable ExpandLargeFpConvert for > 64-bit types
Fixes casts between double/float/half and i128. The pass seems to be
broken for bfloat though. I also believe we could have a better implementation
which attempts to make use the native 32-bit conversion instructions like
the 64-bit expansion does.
Commit: b890a48a12aa5c851185ae2fd6273cd853fe0bc5
https://github.com/llvm/llvm-project/commit/b890a48a12aa5c851185ae2fd6273cd853fe0bc5
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/include/llvm/Target/TargetSchedule.td
M llvm/test/TableGen/MacroFusion.td
M llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
Log Message:
-----------
[MacroFusion] Support commutable instructions (#82751)
If the second instruction is commutable, we should be able to check
its commutable operands.
A simple RISCV fusion is contained in this PR to show the functionality
is correct, I may remove it when landing.
Fixes #82738
Commit: d6d3d96b654012d72ad170d272cb2fe2c8def90d
https://github.com/llvm/llvm-project/commit/d6d3d96b654012d72ad170d272cb2fe2c8def90d
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp
M llvm/lib/Bitcode/Writer/ValueEnumerator.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
A llvm/test/Bitcode/dbg-record-roundtrip.ll
M llvm/tools/llvm-as/llvm-as.cpp
M llvm/tools/verify-uselistorder/verify-uselistorder.cpp
Log Message:
-----------
[RemoveDIs] Read/write DbgRecords directly from/to bitcode (#83251)
If --write-experimental-debuginfo-iterators-to-bitcode is true (default false)
and --expermental-debuginfo-iterators is also true then the new debug info
format (non-instruction records) is written to bitcode directly.
Added the following records:
FUNC_CODE_DEBUG_RECORD_LABEL
FUNC_CODE_DEBUG_RECORD_VALUE
FUNC_CODE_DEBUG_RECORD_DECLARE
FUNC_CODE_DEBUG_RECORD_ASSIGN
FUNC_CODE_DEBUG_RECORD_VALUE_SIMPLE
The last one has an abbrev in FUNCTION_BLOCK BLOCK_INFO. Incidentally, this uses
the last value available without widening the code-length for FUNCTION_BLOCK
from 4 to 5 bits.
Records are formatted as follows:
All DbgRecord start with:
1. DILocation
FUNC_CODE_DEBUG_RECORD_LABEL
2. DILabel
DPValues then share common fields:
2. DILocalVariable
3. DIExpression
FUNC_CODE_DEBUG_RECORD_VALUE
4. Location Metadata
FUNC_CODE_DEBUG_RECORD_DECLARE
4. Location Metadata
FUNC_CODE_DEBUG_RECORD_VALUE_SIMPLE
4. Location Value (single)
FUNC_CODE_DEBUG_RECORD_ASSIGN
4. Location Metadata
5. DIAssignID
6. DIExpression (address)
7. Location Metadata (address)
Encoding the DILocation metadata reference directly appeared to yield smaller
bitcode files than encoding the operands seperately (as is done with instruction
DILocations).
FUNC_CODE_DEBUG_RECORD_VALUE_SIMPLE is by far the most common DbgRecord record
in optimized code (order of 5x-10x over other kinds). Unoptimized code should
only contain FUNC_CODE_DEBUG_RECORD_DECLARE.
Commit: 7567f5ba789cce32a33e2661301c1b8bb629d47d
https://github.com/llvm/llvm-project/commit/7567f5ba789cce32a33e2661301c1b8bb629d47d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/horizontal.ll
Log Message:
-----------
Revert "[SLP]Do extra analysis int minbitwidth if some checks return false."
This reverts commit ea429e19f56005bf89e717c14efdf49ec055b183 to fix
issues reported in https://github.com/llvm/llvm-project/pull/84536#issuecomment-1999295445.
Commit: 9b5d9a81bd2695443254be8489f4325fbb259776
https://github.com/llvm/llvm-project/commit/9b5d9a81bd2695443254be8489f4325fbb259776
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
Log Message:
-----------
AMDGPU: Regenerate test checks from c7c561ef9
The test output changed after initial commit/test in
5f774619eac5db73398225a4c924a9c1d437fb40
Commit: dbbe2fe2a2684c45993f9cf6fced4e3b38fcb0c7
https://github.com/llvm/llvm-project/commit/dbbe2fe2a2684c45993f9cf6fced4e3b38fcb0c7
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
Revert "[SLP]Do extra analysis int minbitwidth if some checks return false."
This reverts commit e4b772444c8176abe30d364e4a946ee6c8ae8de4 to fixx the
issues reported in https://github.com/llvm/llvm-project/pull/84536.
Commit: 37898707585af6df9545620fa8053e7acd23be9f
https://github.com/llvm/llvm-project/commit/37898707585af6df9545620fa8053e7acd23be9f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/ext-trunc.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-buildvector-with-minbitwidth-user.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-with-minbith-user.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-add-i64.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR35777.ll
M llvm/test/Transforms/SLPVectorizer/X86/int-bitcast-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-multiuse-with-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-transformed-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/minimum-sizes.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-undef-input.ll
M llvm/test/Transforms/SLPVectorizer/X86/resched.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-reductions-with-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-scalar-in-same-phi-extract.ll
M llvm/test/Transforms/SLPVectorizer/X86/store-insertelement-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/alt-cmp-vectorize.ll
Log Message:
-----------
Revert "[SLP]Improve minbitwidth analysis."
This reverts commit 7f2167868d8c1cedd3915883412b9c787a2f01db to fix
issues reported in https://github.com/llvm/llvm-project/pull/84536.
Commit: 861ebe6446296c96578807363aa292c69d827773
https://github.com/llvm/llvm-project/commit/861ebe6446296c96578807363aa292c69d827773
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp
M llvm/lib/Bitcode/Writer/ValueEnumerator.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
R llvm/test/Bitcode/dbg-record-roundtrip.ll
M llvm/tools/llvm-as/llvm-as.cpp
M llvm/tools/verify-uselistorder/verify-uselistorder.cpp
Log Message:
-----------
Revert "[RemoveDIs] Read/write DbgRecords directly from/to bitcode" (#85382)
Reverts llvm/llvm-project#83251
Buildbot: https://lab.llvm.org/buildbot/#/builders/139/builds/61485
Commit: 328cb9b731cb61eaa853fa6cc3bd641dd1d71b98
https://github.com/llvm/llvm-project/commit/328cb9b731cb61eaa853fa6cc3bd641dd1d71b98
Author: Patryk Wychowaniec <pwychowaniec at pm.me>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Target/AVR/AVRInstrInfo.td
A llvm/test/CodeGen/AVR/bug-81911.ll
Log Message:
-----------
[AVR] Remove earlyclobber from LDDRdPtrQ (#85277)
LDDRdPtrQ was marked as `earlyclobber`, which doesn't play well with
GreedyRA (which can generate this instruction through `loadRegFromStackSlot()`).
This seems to be the same case as:
https://github.com/llvm/llvm-project/blob/a99b912c9b74f6ef91786b4dfbc25160c27d3b41/llvm/lib/Target/AVR/AVRInstrInfo.td#L1421
Closes https://github.com/llvm/llvm-project/issues/81911.
Commit: 6d30223f7c66ca07ea7ff40ffba426f2dc789e74
https://github.com/llvm/llvm-project/commit/6d30223f7c66ca07ea7ff40ffba426f2dc789e74
Author: long.chen <lipracer at gmail.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/include/llvm/ADT/APInt.h
M llvm/lib/Support/APInt.cpp
M llvm/unittests/ADT/APIntTest.cpp
Log Message:
-----------
[ADT][APInt] add sfloordiv_ov APInt's member function (#84720)
for mlir fold to avoid too many overflow state check
Commit: cf5cd98e74275ed6198b4bbe76cec250ade2c186
https://github.com/llvm/llvm-project/commit/cf5cd98e74275ed6198b4bbe76cec250ade2c186
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/icmp-and-lowbit-mask.ll
M llvm/test/Transforms/InstCombine/not.ll
M llvm/test/Transforms/InstCombine/pr63791.ll
Log Message:
-----------
[InstCombine] Support and/or in `getFreelyInvertedImpl` using DeMorgan's Law (#85193)
This patch adds the support for and/or in `getFreelyInvertedImpl` using
DeMorgan's Law:
```
(~(A | B)) -> (~A & ~B)
(~(A & B)) -> (~A | ~B)
```
Alive2: https://alive2.llvm.org/ce/z/Uig8-j
Commit: 53d8c6b1b1f7cfce9bd42032e8cb6cc1ddcf6c78
https://github.com/llvm/llvm-project/commit/53d8c6b1b1f7cfce9bd42032e8cb6cc1ddcf6c78
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Lower/OpenMP/parallel-reduction-rename.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min2.f90
A flang/test/Semantics/OpenMP/reduction11.f90
Log Message:
-----------
[flang][Semantics][OpenMP] set intrinsic attr for reductions (#85114)
Reductions such as min are intrinsic procedures. This distinguishes them
from user defined reductions. Previously, the intrinsic attribute was
not set when visiting reduction clauses causing them to be missed.
wsloop-reduction-min.f90 (the other min reduction test) worked because
it contained "min" used as an intrinsic inside of the body of the
reduction. This allowed ResolveNamesVisitor::HandleProcedureName to set
the correct attribute on that Symbol.
Commit: 61fadd0b09fb012b628b050725d348ad2164f328
https://github.com/llvm/llvm-project/commit/61fadd0b09fb012b628b050725d348ad2164f328
Author: Ganesh <Ganesh.Gopalasubramanian at amd.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86TargetTransformInfo.h
A llvm/test/CodeGen/X86/vpdpwssd.ll
Log Message:
-----------
[X86] Fast AVX-512-VNNI vpdpwssd tuning (#85375)
Adding a tuning feature to fix
https://github.com/llvm/llvm-project/issues/84182
Generates vpdpwssd (instead of vpmaddwd + vpaddd sequence)
Commit: cdb36d47b79fc782f71842c8ad12b7788d451fb0
https://github.com/llvm/llvm-project/commit/cdb36d47b79fc782f71842c8ad12b7788d451fb0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] foldAndToUsubsat/foldSubToUSubSat - share the same SDLoc argument instead of recreating it over and over again.
Commit: f1d0a48b2740b506d0b476f7cac0ee47d659a6d2
https://github.com/llvm/llvm-project/commit/f1d0a48b2740b506d0b476f7cac0ee47d659a6d2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] foldABSToABD - share the same SDLoc argument instead of recreating it over and over again.
Commit: 5334afcad827a6284ff56f5bde81d4e3416aae8c
https://github.com/llvm/llvm-project/commit/5334afcad827a6284ff56f5bde81d4e3416aae8c
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeStmtGen.cpp
M clang/test/SemaCXX/decomposed-condition.cpp
Log Message:
-----------
[clang][Interp] Don't forget to visit condition variable decls
We did this for if statements, but switch and loop constructs
need to do it as well.
Commit: c7fc95baae8e662506c22511b29e1ad86b910248
https://github.com/llvm/llvm-project/commit/c7fc95baae8e662506c22511b29e1ad86b910248
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Object/ArchiveWriter.cpp
Log Message:
-----------
[Object][Archive][NFC] Create all symbolic files objects before calculating offsets. (#85229)
This is refactoring preparing to move UseECMap computation to the
archive writer. We currently require writeArchive caller to pass that.
This is not practical for llvm-ar, which currently interprets at most
one passed object. For a reliable UseECMap, we need to interpret all
symbolic objects: we may have, for example, a list of x86_64 files
followed by aarch64 file, which indicates that we should use EC map for
x86_64 objects.
This commit interprets symbolic files in a separated pass, which will be
a convenient place to implement UseECMap computation in the follow up.
It also makes accessing the next member for AIX big archive offset
computation a bit easier.
Commit: f623adbbbdea8ac6af06e44be218e4fa969e523d
https://github.com/llvm/llvm-project/commit/f623adbbbdea8ac6af06e44be218e4fa969e523d
Author: Bevin Hansson <59652494+bevin-hansson at users.noreply.github.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/CodeGen/ExpandLargeFpConvert.cpp
M llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-si129tofp.ll
M llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-ui129tofp.ll
Log Message:
-----------
[ExpandLargeFpConvert] Fix bug in int-to-fp expansion. (#85370)
When deciding whether to perform rounding on the significand,
the generated IR was using (width - leading zeros - 1) rather
than (width - leading zeros). This is different from how the
routine in compiler-rt does it:
int sd = srcBits - clzSrcT(a);
int e = sd - 1;
if (sd > dstMantDig) {
This bug means that the following code, when built on -O0:
#include <stdio.h>
_BitInt(233) v_1037 = 0;
int main(void)
{
v_1037 = 18014398509481982wb;
double d = v_1037;
printf("d = %f\n", d);
return 0;
}
prints "d = 9007199254740992.000000", which is incorrect.
The correct result is "d = 18014398509481982.000000".
Commit: e12b46fef76472b3eeb3c689dbd848c72ff8486f
https://github.com/llvm/llvm-project/commit/e12b46fef76472b3eeb3c689dbd848c72ff8486f
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
A flang/test/Fir/omp-reduction-embox-codegen.fir
Log Message:
-----------
[flang] support fir.alloca operations inside of omp reduction ops (#84952)
Advise to place the alloca at the start of the first block of whichever
region (init or combiner) we are currently inside.
It probably isn't safe to put an alloca inside of a combiner region
because this will be executed multiple times. But that would be a bug to
fix in Lower/OpenMP.cpp, not here.
OpenMP array reductions 1/6
Next PR: https://github.com/llvm/llvm-project/pull/84953
Commit: 41bdcaa7c687140c28ad46102784bb6c40449981
https://github.com/llvm/llvm-project/commit/41bdcaa7c687140c28ad46102784bb6c40449981
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/unittests/ADT/APIntTest.cpp
Log Message:
-----------
[ADT] APIntTest - use APInt::getMaxValue/getSignedMinValue/getSignedMaxValue instead of raw (U)INT_MAX/MIN defines
Fixes warnings on MSVC builds
Commit: a7f3d17de18a8be07b74484802582404a32c6527
https://github.com/llvm/llvm-project/commit/a7f3d17de18a8be07b74484802582404a32c6527
Author: Dhruv Chawla <dhruvc at nvidia.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vector-deinterleave2.ll
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vector-interleave2.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-add.ll
M llvm/test/CodeGen/AArch64/fixed-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
Log Message:
-----------
[GlobalISel] Add support for interleave and deinterleave intrinsics to IRTranslator (#85199)
This patch adds support for the @llvm.experimental.vector.{interleave2,
deinterleave2} intrinsics to IRTranslator for fixed-width vector types.
They are lowered to vector shuffles, in roughly the same manner as
SelectionDAG.
Commit: 61671e2500771dfbf502acd86e2ef70cba847a39
https://github.com/llvm/llvm-project/commit/61671e2500771dfbf502acd86e2ef70cba847a39
Author: David Stenberg <david.stenberg at ericsson.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
[DebugInfo] Fix faulty DIExpression::appendToStack assert (#85255)
The appendToStack() function asserts that no DW_OP_stack_value or
DW_OP_LLVM_fragment operations are present in the operations to be
appended. The function did that by iterating over all elements in the
array rather than just the operations, leading it to falsely asserting
on the following input produced by getExt(), since 159 (0x9f) is the
DWARF code for DW_OP_stack_value:
{dwarf::DW_OP_LLVM_convert, 159, dwarf::DW_ATE_signed}
Fix this by using expr_op iterators.
Commit: 03bad4b434eb9e10b8e970d69a583bc8d5b7a3d4
https://github.com/llvm/llvm-project/commit/03bad4b434eb9e10b8e970d69a583bc8d5b7a3d4
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Target/AArch64/SVEInstrFormats.td
Log Message:
-----------
[NFC][LLVM][CodeGen][SVE] Standardise on SVEAllActive for all true isel patterns.
Commit: 63e70c05537c54edae975c8b5449ff87444abec2
https://github.com/llvm/llvm-project/commit/63e70c05537c54edae975c8b5449ff87444abec2
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/ReductionProcessor.cpp
M flang/lib/Lower/OpenMP/ReductionProcessor.h
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
Log Message:
-----------
[flang][OpenMP] Convert repeatable clauses (except Map) in ClauseProc… (#81623)
…essor
Rename `findRepeatableClause` to `findRepeatableClause2`, and make the
new `findRepeatableClause` operate on new `omp::Clause` objects.
Leave `Map` unchanged, because it will require more changes for it to
work.
[Clause representation 3/6]
Commit: 36fd0e797974b75623d847e30d8ba0494e43af99
https://github.com/llvm/llvm-project/commit/36fd0e797974b75623d847e30d8ba0494e43af99
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
R llvm/test/tools/llvm-objdump/MachO/AArch64/Inputs/rel-method-lists-arm64.dylib
R llvm/test/tools/llvm-objdump/MachO/AArch64/Inputs/rel-method-lists-arm64_32.dylib
R llvm/test/tools/llvm-objdump/MachO/AArch64/macho-relative-method-lists.test
M llvm/tools/llvm-objdump/MachODump.cpp
Log Message:
-----------
Revert "[llvm-objdump][macho] Add support for ObjC relative method lists (#84250)"
This reverts llvm/llvm-project#84250, commit aa6100643c2c8f9a1b06ba557b68b0fba477e3c7.
See build failures:
https://lab.llvm.org/buildbot/#/builders/178/builds/7028
https://lab.llvm.org/buildbot/#/builders/182/builds/9282
https://lab.llvm.org/buildbot/#/builders/186/builds/15299
https://lab.llvm.org/buildbot/#/builders/187/builds/14564
Commit: 2c703ed7281cb0fb749bff75b1c313a0332bd9eb
https://github.com/llvm/llvm-project/commit/2c703ed7281cb0fb749bff75b1c313a0332bd9eb
Author: Eric <eric at efcs.ca>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M libcxx/docs/Modules.rst
M libcxx/modules/CMakeLists.txt.in
Log Message:
-----------
Rework Modules CMake to be (more) idiomatic. (#84936)
- Fix bug in documentation regarding dependencies.
- Rework Modules CMake to be (more) idiomatic.
Commit: 5b5525d403f4b1e155c5fc50649b6c6d9e7d4de5
https://github.com/llvm/llvm-project/commit/5b5525d403f4b1e155c5fc50649b6c6d9e7d4de5
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
Log Message:
-----------
[flang][OpenMP] Remove unused variable (NFC)
llvm-project/flang/lib/Lower/OpenMP/ClauseProcessor.cpp:97:15:
error: unused variable 'allocatorOperand' [-Werror,-Wunused-variable]
mlir::Value allocatorOperand;
^
1 error generated.
Commit: 435d4c12de6fdc8e67ceffa04f4d9fba9f006b2d
https://github.com/llvm/llvm-project/commit/435d4c12de6fdc8e67ceffa04f4d9fba9f006b2d
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp
M llvm/lib/Bitcode/Writer/ValueEnumerator.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
A llvm/test/Bitcode/dbg-record-roundtrip.ll
M llvm/tools/llvm-as/llvm-as.cpp
M llvm/tools/verify-uselistorder/verify-uselistorder.cpp
Log Message:
-----------
Reapply [RemoveDIs] Read/write DbgRecords directly from/to bitcode (#83251)
Reaplying after revert in #85382 (861ebe6446296c96578807363aa292c69d827773).
Fixed intermittent test failure by avoiding piping output in some RUN lines.
If --write-experimental-debuginfo-iterators-to-bitcode is true (default false)
and --expermental-debuginfo-iterators is also true then the new debug info
format (non-instruction records) is written to bitcode directly.
Added the following records:
FUNC_CODE_DEBUG_RECORD_LABEL
FUNC_CODE_DEBUG_RECORD_VALUE
FUNC_CODE_DEBUG_RECORD_DECLARE
FUNC_CODE_DEBUG_RECORD_ASSIGN
FUNC_CODE_DEBUG_RECORD_VALUE_SIMPLE
The last one has an abbrev in FUNCTION_BLOCK BLOCK_INFO. Incidentally, this uses
the last value available without widening the code-length for FUNCTION_BLOCK
from 4 to 5 bits.
Records are formatted as follows:
All DbgRecord start with:
1. DILocation
FUNC_CODE_DEBUG_RECORD_LABEL
2. DILabel
DPValues then share common fields:
2. DILocalVariable
3. DIExpression
FUNC_CODE_DEBUG_RECORD_VALUE
4. Location Metadata
FUNC_CODE_DEBUG_RECORD_DECLARE
4. Location Metadata
FUNC_CODE_DEBUG_RECORD_VALUE_SIMPLE
4. Location Value (single)
FUNC_CODE_DEBUG_RECORD_ASSIGN
4. Location Metadata
5. DIAssignID
6. DIExpression (address)
7. Location Metadata (address)
Encoding the DILocation metadata reference directly appeared to yield smaller
bitcode files than encoding the operands seperately (as is done with instruction
DILocations).
FUNC_CODE_DEBUG_RECORD_VALUE_SIMPLE is by far the most common DbgRecord record
in optimized code (order of 5x-10x over other kinds). Unoptimized code should
only contain FUNC_CODE_DEBUG_RECORD_DECLARE.
Commit: 0bcec96f3fe919fc5fd1189d1901fa3a0e501e2c
https://github.com/llvm/llvm-project/commit/0bcec96f3fe919fc5fd1189d1901fa3a0e501e2c
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/FLATInstructions.td
Log Message:
-----------
[AMDGPU] Reduce duplication in FLAT atomic definitions (#85383)
This simplifies the case where the tablegen name of the defm for the
Real is the same as the name of the Pseudo.
Commit: 9214e51925d202fd8463535d75f144b81173dd73
https://github.com/llvm/llvm-project/commit/9214e51925d202fd8463535d75f144b81173dd73
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/FLATInstructions.td
Log Message:
-----------
[AMDGPU] Simplify GFX10+ FLAT saddr field definition
On GFX10+ has_saddr is effectively always true so there is no need to
test it.
Commit: e419084da7a00b269368aeb95698e0d36b24e8ec
https://github.com/llvm/llvm-project/commit/e419084da7a00b269368aeb95698e0d36b24e8ec
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/IR/BasicBlock.cpp
Log Message:
-----------
[RemoveDIs] Enable direct-to-bitcode writing by default
Follow on from #83251. This patch simply enables the behaviour by default in
order to provide an easily revertible capstone.
Commit: 64f76dea9c95fd59e383e7550de35786781d9662
https://github.com/llvm/llvm-project/commit/64f76dea9c95fd59e383e7550de35786781d9662
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/test/Bitcode/dbg-record-roundtrip.ll
Log Message:
-----------
[NFC] Fix comment in test from #83251
Commit: 0ae76a74985b3639ffb99d1dbb857068939547aa
https://github.com/llvm/llvm-project/commit/0ae76a74985b3639ffb99d1dbb857068939547aa
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/test/Bitcode/dbg-record-roundtrip.ll
Log Message:
-----------
[NFC] Fix incorrect RUN line in test from #83251
Note: This wasn't the cause of the strange behaviour mentioned in the NOTE
comment in the test.
Commit: 0b9f19a9880eb786871194af116f223d2ad30c52
https://github.com/llvm/llvm-project/commit/0b9f19a9880eb786871194af116f223d2ad30c52
Author: antoine moynault <antoine.moynault at linaro.org>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_posix_libcdep.cpp
M compiler-rt/test/sanitizer_common/TestCases/corelimit.cpp
Log Message:
-----------
Revert "[compiler-rt] Avoid generating coredumps when piped to a tool" (#85390)
This reverts commit 27e5312a8bc8935f9c5620ff061c647d9fbcec85.
This commit broke some bots:
- clang-aarch64-sve-vla
https://lab.llvm.org/buildbot/#/builders/197/builds/13609
- clang-aarch64-sve-vls
https://lab.llvm.org/buildbot/#/builders/184/builds/10988
- clang-aarch64-lld-2stage
https://lab.llvm.org/buildbot/#/builders/185/builds/6312
https://github.com/llvm/llvm-project/pull/83701
Commit: f4676b6be6ee0d908c92d64936d17bd6fa3fbda8
https://github.com/llvm/llvm-project/commit/f4676b6be6ee0d908c92d64936d17bd6fa3fbda8
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/tls-dialect.c
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86MCInstLower.cpp
A llvm/test/CodeGen/X86/tls-desc.ll
Log Message:
-----------
[X86] Add Support for X86 TLSDESC Relocations (#83136)
Commit: 092999e70b349ac521cab2648152ababeb12873f
https://github.com/llvm/llvm-project/commit/092999e70b349ac521cab2648152ababeb12873f
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
Log Message:
-----------
[AMDGPU] Update checks in new test after #85370
Commit: c957715d721b70591ef32dd9609d6d96de9f0554
https://github.com/llvm/llvm-project/commit/c957715d721b70591ef32dd9609d6d96de9f0554
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] isGuaranteedNotToBeUndefOrPoisonForTargetNode - generalize shuffle decoding to support more target shuffles in the future.
Commit: bf3f86623c4712bff146b5d168cad5f7e658ac56
https://github.com/llvm/llvm-project/commit/bf3f86623c4712bff146b5d168cad5f7e658ac56
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/FLATInstructions.td
Log Message:
-----------
[AMDGPU] Simplify GFX11 and GFX12 FLAT saddr field definition
It is simpler to define this field correctly in the base class for the
Reals for each architecture, than to override it in subclasses for
different addressing modes.
Commit: 65284be2992fc7c6feafc44dda7c0f00df7aacfb
https://github.com/llvm/llvm-project/commit/65284be2992fc7c6feafc44dda7c0f00df7aacfb
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M flang/lib/Lower/ConvertCall.cpp
M flang/test/Lower/CUDA/cuda-kernel-calls.cuf
Log Message:
-----------
[flang][cuda] Lower dim3 grid z correctly on calls (#85346)
Commit: 0e0bfacff71859d1f9212205f8f873d47029d3fb
https://github.com/llvm/llvm-project/commit/0e0bfacff71859d1f9212205f8f873d47029d3fb
Author: yonghong-song <yhs at fb.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M clang/lib/Basic/Targets/BPF.cpp
M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
M llvm/lib/Target/BPF/BPFInstrFormats.td
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp
M llvm/test/MC/BPF/insn-unit.s
Log Message:
-----------
[BPF] Add support for may_goto insn (#85358)
Alexei added may_goto insn in [1]. The asm syntax for may_goto looks
like
may_goto <label>
The instruction represents a conditional branch but the condition is
implicit. Later in bpf kernel verifier, the 'may_goto <label>' insn will
be rewritten with an explicit condition. The encoding of 'may_goto' insn
is enforced in [2] and is also implemented in this patch.
In [3], 'may_goto' insn is encoded with raw bytes. I made the following
change
```
--- a/tools/testing/selftests/bpf/bpf_experimental.h
+++ b/tools/testing/selftests/bpf/bpf_experimental.h
@@ -328,10 +328,7 @@ l_true: \
#define cond_break \
({ __label__ l_break, l_continue; \
- asm volatile goto("1:.byte 0xe5; \
- .byte 0; \
- .long ((%l[l_break] - 1b - 8) / 8) & 0xffff; \
- .short 0" \
+ asm volatile goto("may_goto %l[l_break]" \
:::: l_break); \
goto l_continue; \
l_break: break;
```
and ran the selftest with the latest llvm with this patch. All tests are
passed.
[1]
https://lore.kernel.org/bpf/20240306031929.42666-1-alexei.starovoitov@gmail.com/
[2]
https://lore.kernel.org/bpf/20240306031929.42666-2-alexei.starovoitov@gmail.com/
[3]
https://lore.kernel.org/bpf/20240306031929.42666-4-alexei.starovoitov@gmail.com/
Commit: accf0af6ee617ccbcd1f764879232ce44fce603f
https://github.com/llvm/llvm-project/commit/accf0af6ee617ccbcd1f764879232ce44fce603f
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M .github/CODEOWNERS
M .github/new-prs-labeler.yml
Log Message:
-----------
[bazel] Add workflows to label and assign bazel PRs (#85352)
Bazel PRs aren't being tagged or auto assigned, so they're easily
missed, especially for those created by contributors w/o triage or
commit access.
I'm putting myself as the default auto reviewer, but only for the
purposes of making sure PRs don't get lost.
Commit: f337525ee8b44da0f1e98eecd7f51bf5805c3760
https://github.com/llvm/llvm-project/commit/f337525ee8b44da0f1e98eecd7f51bf5805c3760
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] Compute a shuffle mask for SK_Broadcast shuffle (#85327)
This is the first of a couple of small patches to compute shuffle masks
for the couple of cases where we call getShuffleCost without one. My
goal is to add an invariant that all calls to getShuffleCost for fixed
length vectors have a mask.
---------
Co-authored-by: Alexey Bataev <a.bataev at gmx.com>
Commit: 6b53ada69a8cb2d91e7ad91d810137bc2860f450
https://github.com/llvm/llvm-project/commit/6b53ada69a8cb2d91e7ad91d810137bc2860f450
Author: XChy <xxs_chy at outlook.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
Log Message:
-----------
[DFAJumpThreading] Early exit if switch is not in a loop (#85360)
This patch prevents taking non-loop switch as candidate.
Commit: ec2b7522dbee1cb91111d6ade6e1768462247dcf
https://github.com/llvm/llvm-project/commit/ec2b7522dbee1cb91111d6ade6e1768462247dcf
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/cmake/modules/AddLLVM.cmake
M llvm/tools/llvm-shlib/CMakeLists.txt
Log Message:
-----------
llvm-shlib: Fix libLLVM-${MAJOR}.so symlink on MacOS (#85163)
This is a partial revert of 10c48a772742b7afe665a815b7eba2047f17dc4b
with a fix for the symlink target name on MacOS
See #84637
Commit: 86293a7c1377d1c795961f0e73799977eeb4829a
https://github.com/llvm/llvm-project/commit/86293a7c1377d1c795961f0e73799977eeb4829a
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M flang/include/flang/Optimizer/Builder/Runtime/Numeric.h
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Numeric.cpp
M flang/test/Lower/Intrinsics/modulo.f90
Log Message:
-----------
[flang] Lower REAL(16) MODULO to Float128Math library call. (#85322)
I did not test it through in #85005, and my assumption was wrong:
arith::RemFOp might be lowered to an fmodf128() call that does not
exist everywhere.
Commit: 92b56011e6b61e7dc1628c0431ece432f282b3cb
https://github.com/llvm/llvm-project/commit/92b56011e6b61e7dc1628c0431ece432f282b3cb
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[clang] Fix documentation markup in the Clang release notes and language extension docs. (#85310)
Commit: 45e41f9686ee9fbc0598da2acb8316cdfd12e08d
https://github.com/llvm/llvm-project/commit/45e41f9686ee9fbc0598da2acb8316cdfd12e08d
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] Compute a shuffle mask for SK_InsertSubvector (#85408)
This is the third of a series of small patches to compute shuffle masks
for the couple of cases where we call getShuffleCost without one. My
goal is to add an invariant that all calls to getShuffleCost for fixed
length vectors have a mask.
After this change, there is one SK_InsertSubvector case left. I excluded
it from this patch just because I thought it worthy of individual
attention and review.
---------
Co-authored-by: Alexey Bataev <a.bataev at gmx.com>
Commit: 0674ed753a16b407609637eb775f26e7e18cbe76
https://github.com/llvm/llvm-project/commit/0674ed753a16b407609637eb775f26e7e18cbe76
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP] Compute a shuffle mask for getGatherCost (#85330)
This is the second of a series of small patches to compute shuffle masks
for the couple of cases where we call getShuffleCost without one. My
goal is to add an invariant that all calls to getShuffleCost for fixed
length vectors have a mask.
---------
Co-authored-by: Alexey Bataev <a.bataev at gmx.com>
Commit: fc06c8efcbca6951f849b5c30e1c253929100a7c
https://github.com/llvm/llvm-project/commit/fc06c8efcbca6951f849b5c30e1c253929100a7c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
Log Message:
-----------
AMDGPU: Partially clean up canonicalized predicates in tablegen (#85404)
This was the easy case. There are more issues with some of the other
is_canonicalized* patterns. First there appears to be a tablegen bug
where the predicate is silently ignored if used as a ComplexPattern
source, and we also probably need a version with an operand.
Commit: 12c2a53e6ae5e1ee33de5811341a10bcdc7a8c4f
https://github.com/llvm/llvm-project/commit/12c2a53e6ae5e1ee33de5811341a10bcdc7a8c4f
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SOPInstructions.td
Log Message:
-----------
[AMDGPU] Simplify some uniform patterns. NFC. (#85407)
If the outer node is uniform then the inner nodes must be too, so there
is no need to check them explicitly.
Commit: 4f69c4b158969386deaf42028d4511ef7a015a20
https://github.com/llvm/llvm-project/commit/4f69c4b158969386deaf42028d4511ef7a015a20
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.cpp
M clang/test/AST/Interp/cxx98.cpp
Log Message:
-----------
[clang][Interp] Don't diagnose reading const ints in C++98
We _can_ read them, even in C++98.
Commit: 447691333f0a50a159a9924287d48a8266c8a480
https://github.com/llvm/llvm-project/commit/447691333f0a50a159a9924287d48a8266c8a480
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M clang/lib/AST/Interp/Interp.cpp
M clang/test/AST/Interp/records.cpp
Log Message:
-----------
[clang][Interp] Don't suppress diagnostics for undefined+external funcs
Calling them should still generate a diagnostic.
Commit: a4ca07f13b560b4f6fa5459eef7159e4f9ee9a6b
https://github.com/llvm/llvm-project/commit/a4ca07f13b560b4f6fa5459eef7159e4f9ee9a6b
Author: FantasqueX <fantasquex at gmail.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M libc/docs/fullbuild_mode.rst
Log Message:
-----------
[libc] Fix typo in libc fullbuild mode doc (#85204)
"In order to" is more appropriate.
Commit: 7337db72ed334f8389601f160b762e50c4e61c25
https://github.com/llvm/llvm-project/commit/7337db72ed334f8389601f160b762e50c4e61c25
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/test/Bitcode/dbg-record-roundtrip.ll
Log Message:
-----------
Add ALLOW_RETRIES to flaky test dbg-record-roundtrip.ll (#85410)
Something strange is happening in this test.
If the llvm-as output is piped into llvm-link in the final RUN lines
then this test fails on my machine (1 in 200) using WSL2. If the
verify-uselistorder RUN lines are removed then it doesn't fail on my
machine (in 10,000+). If the llvm-as and llvm-link RUN lines mentioned
at the start are removed then it doesn't fail on my machine (in
10,000+).
Writing the llvm-as output to a temporary file for llvm-link to read on
those final RUN lines, the test doesn't fail on my machine (in 10,000+).
But it _does_ fail on a bot:
https://lab.llvm.org/buildbot/#/builders/245/builds/21930. So clearly my
workaround doesn't solve the underlying problem (and I have no idea what
that is).
Commit: 0ed7a5a9a1d4297e30c7992379ff292cd1aa3828
https://github.com/llvm/llvm-project/commit/0ed7a5a9a1d4297e30c7992379ff292cd1aa3828
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/FLATInstructions.td
Log Message:
-----------
[AMDGPU] Clean up GFX10 FLAT saddr field definition
On GFX10 only, saddr = EXEC_HI (instead of NULL) is use to distinguish
ST mode from other SCRATCH addressing modes. Handle this when defining
the saddr field instead of overriding it in subclasses.
Commit: 5a8a7ee9d12d7cd3680c7bc14a4750bd44d99c56
https://github.com/llvm/llvm-project/commit/5a8a7ee9d12d7cd3680c7bc14a4750bd44d99c56
Author: Ben Langmuir <blangmuir at apple.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/include/llvm/Support/VirtualFileSystem.h
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/unittests/Support/VirtualFileSystemTest.cpp
Log Message:
-----------
[llvm][vfs] Preserve paths for fallback/fallthrough in RedirectingFileSystem (#85307)
When we lookup in the external filesystem, do not remove . and ..
components from the original path. For .. this is a correctness issue in
the presence of symlinks, while for . it is simply better practice to
preserve the original path to better match the behaviour of other
filesystems. The only modification we need is to apply the working
directory, since it could differ from the external filesystem.
rdar://123655660
Commit: ea628f087e42b24c8188f782cb81f146e06be40e
https://github.com/llvm/llvm-project/commit/ea628f087e42b24c8188f782cb81f146e06be40e
Author: Kevin P. Neal <kevin.neal at sas.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/test/CodeGen/PowerPC/ctrloop-constrained-fp.ll
Log Message:
-----------
[FPEnv][PowerPC] Correct strictfp test.
Correct llvm-reduce strictfp test to follow the rules documented in the
LangRef:
https://llvm.org/docs/LangRef.html#constrained-floating-point-intrinsics
This test needed the strictfp attribute added to function definitions.
Test changes verified with D146845.
Commit: 6503eff6d3bcaf1158dc7e2b6d1fc3521833374e
https://github.com/llvm/llvm-project/commit/6503eff6d3bcaf1158dc7e2b6d1fc3521833374e
Author: Nick Desaulniers <nickdesaulniers at users.noreply.github.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M libc/src/__support/blockstore.h
M libc/src/stdlib/atexit.cpp
M libc/test/src/__support/blockstore_test.cpp
Log Message:
-----------
[libc] remove BlockStore from cpp namespace (#85312)
The cpp namespace should only be used to mirror APIs from C++'s std::
namespace
(at least until we share more code with libc++, see
https://discourse.llvm.org/t/rfc-project-hand-in-hand-llvm-libc-libc-code-sharing/77701)
Commit: 864a88610594d8244e007e9a6e563e2c0f16d1cd
https://github.com/llvm/llvm-project/commit/864a88610594d8244e007e9a6e563e2c0f16d1cd
Author: Marc Auberer <marc.auberer at chillibits.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M libcxx/include/limits
A libcxx/test/libcxx/diagnostics/limits.nodiscard_extensions.compile.pass.cpp
A libcxx/test/libcxx/diagnostics/limits.nodiscard_extensions.verify.cpp
Log Message:
-----------
[libc++] Add [[nodiscard]] to static numeric limit functions (#83748)
Fixes #83695
Commit: 2e8417680a9ab032859c936b2ceb773bb08e08ca
https://github.com/llvm/llvm-project/commit/2e8417680a9ab032859c936b2ceb773bb08e08ca
Author: Mark de Wever <koraq at xs4all.nl>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M libcxx/utils/ci/run-buildbot-container
Log Message:
-----------
[libc++] Fixes run-buildbot-container. (#84644)
Pulls the proper docker image instead of a non-existing image.
Commit: 186565513c57cd625ea7afd7b33897adfed7e9f8
https://github.com/llvm/llvm-project/commit/186565513c57cd625ea7afd7b33897adfed7e9f8
Author: SahilPatidar <patidarsahil2001 at gmail.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/combine-sra.ll
Log Message:
-----------
[X86][AVX] Fix handling of out-of-bounds SRA shift amounts in AVX2 vector shift nodes (#84426)
Commit: f01a32f5c58b199edf7cd1492a20578453852f0e
https://github.com/llvm/llvm-project/commit/f01a32f5c58b199edf7cd1492a20578453852f0e
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
A lldb/include/lldb/Host/Alarm.h
M lldb/source/Host/CMakeLists.txt
A lldb/source/Host/common/Alarm.cpp
A lldb/unittests/Host/AlarmTest.cpp
M lldb/unittests/Host/CMakeLists.txt
Log Message:
-----------
[lldb] Add an Alarm class for coalescing progress reports (#85329)
The commit introduces a new, generic, Alarm class. The class lets you to
schedule functions (callbacks) that will execute after a predefined
timeout. Once scheduled, you can cancel and reset a callback, given the
timeout hasn't expired yet.
The alarm class worker thread that sleeps until the next timeout
expires. When the thread wakes up, it checks for all the callbacks that
have expired and calls them in order. Because the callback is called
from the worker thread, the only guarantee is that a callback is called
no sooner than the timeout. A long running callback could potentially
block the worker threads and delay other callbacks from getting called.
I intentionally kept the implementation as simple as possible while
addressing the needs for the use case of coalescing progress events as
discussed in [1]. If we want to rely on this somewhere else, we can
reassess whether we need to address this class' limitations.
[1] https://discourse.llvm.org/t/rfc-improve-lldb-progress-reporting/75717/
Commit: f4335f075b3496bce6b49f9267e6160d1824b1bb
https://github.com/llvm/llvm-project/commit/f4335f075b3496bce6b49f9267e6160d1824b1bb
Author: Fangrui Song <i at maskray.me>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
A llvm/test/CodeGen/X86/asm-dialect-module.ll
Log Message:
-----------
[X86,AsmPrinter] Set assembler dialect for module inline asm
`clang -c -masm=intel` compiling a source file with file scope basic asm
incorrectly uses the AT&T dialect.
```
% cat a.c
asm("mov rax, rax");
% clang a.c -c -masm=intel
<inline asm>:1:1: error: unknown use of instruction mnemonic without a size suffix
mov rax, rax
^
```
Fix this by setting the assembler dialect from the MCAsmInfo object.
Note: `clang -c -flto -masm=intel a.c` still fails because of
https://reviews.llvm.org/D82862 for #34830: it tried to support AT&T
syntax for clang-cl, but the forced AT&T syntax is not compatible with
intended Intel syntax.
Pull Request: https://github.com/llvm/llvm-project/pull/85367
Commit: 0b0e52836d2563afa4c968b93a633c2b17fa5820
https://github.com/llvm/llvm-project/commit/0b0e52836d2563afa4c968b93a633c2b17fa5820
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
M llvm/test/MC/AMDGPU/gfx11_asm_sop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
Log Message:
-----------
[AMDGPU] Fix GFX11 sendmsg codes (#85299)
The code MSG_RTN_GET_TBA_TO_PC was missing, and the next code is off by
1 as a result.
Commit: 9ecc72f39918d157a46ff1ea816a8756a9bbf75b
https://github.com/llvm/llvm-project/commit/9ecc72f39918d157a46ff1ea816a8756a9bbf75b
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/FLATInstructions.td
Log Message:
-----------
[AMDGPU] Simplify definition of FLAT segment bits. NFC.
Commit: 58f7251820b14c93168726a24816d8a094599be5
https://github.com/llvm/llvm-project/commit/58f7251820b14c93168726a24816d8a094599be5
Author: Thurston Dang <thurston at google.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M compiler-rt/lib/msan/msan.cpp
M compiler-rt/lib/msan/msan.h
M compiler-rt/lib/msan/msan_linux.cpp
Log Message:
-----------
[msan] Re-exec with no ASLR if memory layout is incompatible on Linux (#85142)
This ports the change from TSan
(https://github.com/llvm/llvm-project/commit/0784b1eefa36d4acbb0dacd2d18796e26313b6c5).
Testing notes: run 'sudo sysctl vm.mmap_rnd_bits=32; ninja check-msan'
before and after this patch.
N.B. aggressive ASLR may also cause the app to overlap with the
allocator region; for MSan, this was fixed in
https://github.com/llvm/llvm-project/commit/af2bf86a372cacf5f536bae06e2f2d3886eefb7b
Commit: e115c00565be88677e8b7fe021a3e242249c67b8
https://github.com/llvm/llvm-project/commit/e115c00565be88677e8b7fe021a3e242249c67b8
Author: Fangrui Song <i at maskray.me>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/Options.td
M lld/docs/ld.lld.1
M lld/test/ELF/incompatible-section-types2.s
M lld/test/ELF/linkerscript/custom-section-type.s
A lld/test/ELF/unknown-section.test
Log Message:
-----------
[ELF] Reject certain unknown section types (#85173)
Unknown section sections may require special linking rules, and
rejecting such sections for older linkers may be desired. For example,
if we introduce a new section type to replace a control structure (e.g.
relocations), it would be nice for older linkers to reject the new
section type. GNU ld allows certain unknown section types:
* [SHT_LOUSER,SHT_HIUSER] and non-SHF_ALLOC
* [SHT_LOOS,SHT_HIOS] and non-SHF_OS_NONCONFORMING
but reports errors and stops linking for others (unless
--no-warn-mismatch is specified). Port its behavior. For convenience, we
additionally allow all [SHT_LOPROC,SHT_HIPROC] types so that we don't
have to hard code all known types for each processor.
Close https://github.com/llvm/llvm-project/issues/84812
Commit: 2d80505401835ed4c32d0d58f015efddf929c39d
https://github.com/llvm/llvm-project/commit/2d80505401835ed4c32d0d58f015efddf929c39d
Author: Sean Fertile <sd.fertile at gmail.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/include/llvm/MC/MCSymbolXCOFF.h
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.h
A llvm/test/CodeGen/PowerPC/aix-codemodel-attr.ll
Log Message:
-----------
[AIX] Support per global code model. (#79202)
Exploit the per global code model attribute on AIX. On AIX we need to
update both the code sequence used to access the global (either 1 or 2
instructions for small and large code model respectively) and the
storage mapping class that we emit the toc entry.
---------
Co-authored-by: Amy Kwan <akwan0907 at gmail.com>
Commit: 39a96bc7b276d0be856c7b51e92f0d77cf775385
https://github.com/llvm/llvm-project/commit/39a96bc7b276d0be856c7b51e92f0d77cf775385
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-icmp-to-trunc.ll
Log Message:
-----------
[SLP][NFC]Add a test for minbitwidth analysis of icmp, being transformed
to trunc.
Commit: fd09d510d066583c088e4dbcf23ac0b500c5cc7a
https://github.com/llvm/llvm-project/commit/fd09d510d066583c088e4dbcf23ac0b500c5cc7a
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M lldb/include/lldb/Host/Alarm.h
Log Message:
-----------
[lldb] Add missing headers lldb/Host/Alarm.h
Commit: 9a42bdc0ae53f321966b1418430d4aaaf83877b5
https://github.com/llvm/llvm-project/commit/9a42bdc0ae53f321966b1418430d4aaaf83877b5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Fix signedness to avoid comparison warning.
Commit: 586ab4710ce2fe0709dfc636a9cc951476e75367
https://github.com/llvm/llvm-project/commit/586ab4710ce2fe0709dfc636a9cc951476e75367
Author: Fangrui Song <i at maskray.me>
Date: 2024-03-15 (Fri, 15 Mar 2024)
Changed paths:
M .ci/generate-buildkite-pipeline-premerge
M .github/CODEOWNERS
M .github/new-prs-labeler.yml
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.h
M clang/lib/AST/Interp/ByteCodeStmtGen.cpp
M clang/lib/AST/Interp/ByteCodeStmtGen.h
M clang/lib/AST/Interp/Interp.cpp
M clang/lib/AST/Interp/Interp.h
M clang/lib/AST/Interp/InterpBuiltin.cpp
M clang/lib/AST/Interp/Opcodes.td
M clang/lib/Basic/Targets/BPF.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Format/QualifierAlignmentFixer.cpp
M clang/test/AST/Interp/builtin-functions.cpp
M clang/test/AST/Interp/cxx23.cpp
M clang/test/AST/Interp/cxx98.cpp
M clang/test/AST/Interp/if.cpp
M clang/test/AST/Interp/records.cpp
M clang/test/Driver/tls-dialect.c
M clang/test/Preprocessor/bpf-predefined-macros.c
M clang/test/SemaCXX/decomposed-condition.cpp
M compiler-rt/lib/msan/msan.cpp
M compiler-rt/lib/msan/msan.h
M compiler-rt/lib/msan/msan_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_posix_libcdep.cpp
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
M compiler-rt/test/sanitizer_common/TestCases/corelimit.cpp
M compiler-rt/test/tsan/signal_errno.cpp
M compiler-rt/test/tsan/signal_sync.cpp
M compiler-rt/test/tsan/signal_thread.cpp
M compiler-rt/test/tsan/signal_thread2.cpp
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Optimizer/Builder/Runtime/Numeric.h
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/Clauses.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/ReductionProcessor.cpp
M flang/lib/Lower/OpenMP/ReductionProcessor.h
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Numeric.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Fir/omp-reduction-embox-codegen.fir
M flang/test/Lower/CUDA/cuda-kernel-calls.cuf
M flang/test/Lower/Intrinsics/modulo.f90
A flang/test/Lower/OpenMP/parallel-reduction-rename.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min2.f90
A flang/test/Semantics/OpenMP/reduction11.f90
M libc/docs/fullbuild_mode.rst
M libc/src/__support/blockstore.h
M libc/src/stdlib/atexit.cpp
M libc/test/src/__support/blockstore_test.cpp
M libcxx/docs/Modules.rst
M libcxx/include/limits
M libcxx/modules/CMakeLists.txt.in
A libcxx/test/libcxx/diagnostics/limits.nodiscard_extensions.compile.pass.cpp
A libcxx/test/libcxx/diagnostics/limits.nodiscard_extensions.verify.cpp
M libcxx/test/std/time/time.zone/time.zone.db/time.zone.db.access/get_tzdb.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.db/time.zone.db.access/get_tzdb_list.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.db/time.zone.db.list/front.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.db/time.zone.db.list/iterators.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.db/time.zone.db.remote/reload_tzdb.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.db/time.zone.db.remote/remote_version.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.link/time.zone.link.members/name.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.link/time.zone.link.members/target.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.link/time.zone.link.nonmembers/comparison.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.timezone/time.zone.members/name.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.timezone/time.zone.nonmembers/comparison.pass.cpp
M libcxx/utils/ci/run-buildbot-container
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/Options.td
M lld/docs/ld.lld.1
M lld/test/ELF/incompatible-section-types2.s
M lld/test/ELF/linkerscript/custom-section-type.s
A lld/test/ELF/unknown-section.test
A lldb/include/lldb/Host/Alarm.h
M lldb/source/Host/CMakeLists.txt
A lldb/source/Host/common/Alarm.cpp
A lldb/unittests/Host/AlarmTest.cpp
M lldb/unittests/Host/CMakeLists.txt
M llvm/cmake/modules/AddLLVM.cmake
M llvm/include/llvm/ADT/APInt.h
M llvm/include/llvm/Analysis/ConstantFolding.h
M llvm/include/llvm/Analysis/InstSimplifyFolder.h
M llvm/include/llvm/Analysis/InstructionSimplify.h
M llvm/include/llvm/Analysis/TargetFolder.h
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
M llvm/include/llvm/CodeGen/MachineLoopInfo.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/CodeGenTypes/LowLevelType.h
M llvm/include/llvm/IR/ConstantFolder.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/IRBuilderFolder.h
M llvm/include/llvm/IR/NoFolder.h
M llvm/include/llvm/MC/MCSymbolXCOFF.h
M llvm/include/llvm/Object/ELFObjectFile.h
M llvm/include/llvm/Support/VirtualFileSystem.h
M llvm/include/llvm/Target/TargetSchedule.td
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriterPass.cpp
M llvm/lib/Bitcode/Writer/ValueEnumerator.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/ExpandLargeFpConvert.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/LowLevelTypeUtils.cpp
M llvm/lib/CodeGen/MachineLoopInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/IR/BasicBlock.cpp
M llvm/lib/IR/DebugInfoMetadata.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/Object/ArchiveWriter.cpp
M llvm/lib/Support/APInt.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.h
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.td
M llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
M llvm/lib/Target/BPF/BPFCheckAndAdjustIR.cpp
M llvm/lib/Target/BPF/BPFInstrFormats.td
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/lib/Target/PowerPC/PPCSubtarget.h
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86InstrFragments.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrPredicates.td
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Bitcode/dbg-record-roundtrip.ll
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vector-deinterleave2.ll
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vector-interleave2.ll
M llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-add.ll
M llvm/test/CodeGen/AArch64/fixed-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
A llvm/test/CodeGen/AArch64/sme-machine-licm-vg.mir
A llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
A llvm/test/CodeGen/AMDGPU/itofp.i128.ll
A llvm/test/CodeGen/AVR/bug-81911.ll
M llvm/test/CodeGen/BPF/addr-space-globals.ll
M llvm/test/CodeGen/BPF/addr-space-globals2.ll
A llvm/test/CodeGen/NVPTX/atomics-sm70.ll
M llvm/test/CodeGen/NVPTX/atomics.ll
A llvm/test/CodeGen/PowerPC/aix-codemodel-attr.ll
M llvm/test/CodeGen/PowerPC/ctrloop-constrained-fp.ll
A llvm/test/CodeGen/X86/asm-dialect-module.ll
M llvm/test/CodeGen/X86/combine-sra.ll
A llvm/test/CodeGen/X86/tls-desc.ll
A llvm/test/CodeGen/X86/vpdpwssd.ll
M llvm/test/Instrumentation/ThreadSanitizer/atomic.ll
M llvm/test/MC/AMDGPU/gfx11_asm_sop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
M llvm/test/MC/BPF/insn-unit.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_sop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
M llvm/test/TableGen/MacroFusion.td
M llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-si129tofp.ll
M llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-ui129tofp.ll
M llvm/test/Transforms/InstCombine/icmp-and-lowbit-mask.ll
M llvm/test/Transforms/InstCombine/mul.ll
M llvm/test/Transforms/InstCombine/not.ll
M llvm/test/Transforms/InstCombine/pr63791.ll
M llvm/test/Transforms/InstCombine/sub-xor-cmp.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/ext-trunc.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-buildvector-with-minbitwidth-user.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-with-minbith-user.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/horizontal.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-add-i64.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/PR35777.ll
M llvm/test/Transforms/SLPVectorizer/X86/int-bitcast-minbitwidth.ll
A llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-icmp-to-trunc.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-multiuse-with-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-transformed-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/minimum-sizes.ll
M llvm/test/Transforms/SLPVectorizer/X86/phi-undef-input.ll
M llvm/test/Transforms/SLPVectorizer/X86/resched.ll
M llvm/test/Transforms/SLPVectorizer/X86/reused-reductions-with-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/X86/same-scalar-in-same-phi-extract.ll
M llvm/test/Transforms/SLPVectorizer/X86/store-insertelement-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/alt-cmp-vectorize.ll
R llvm/test/tools/llvm-objdump/MachO/AArch64/Inputs/rel-method-lists-arm64.dylib
R llvm/test/tools/llvm-objdump/MachO/AArch64/Inputs/rel-method-lists-arm64_32.dylib
R llvm/test/tools/llvm-objdump/MachO/AArch64/macho-relative-method-lists.test
M llvm/test/tools/llvm-readobj/ELF/machine-specific-section-types.test
M llvm/tools/llvm-as/llvm-as.cpp
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/tools/llvm-shlib/CMakeLists.txt
M llvm/tools/verify-uselistorder/verify-uselistorder.cpp
M llvm/unittests/ADT/APIntTest.cpp
M llvm/unittests/CodeGen/LowLevelTypeTest.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
M llvm/unittests/IR/MetadataTest.cpp
M llvm/unittests/Support/VirtualFileSystemTest.cpp
M llvm/utils/TableGen/MacroFusionPredicatorEmitter.cpp
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
M mlir/lib/Dialect/EmitC/IR/EmitC.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorConversion.cpp
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
M mlir/test/Dialect/EmitC/invalid_ops.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/dual_sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conv_2d.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_sparse2dense.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_sparse2sparse.mlir
M mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pack_d.mlir
A mlir/test/Target/Cpp/subscript.mlir
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