[all-commits] [llvm/llvm-project] ec415a: [X86] Regenerate X86/lsr-addrecloops.ll test; NFC
goldsteinn via All-commits
all-commits at lists.llvm.org
Fri Mar 1 13:36:01 PST 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: ec415aff63fc0cc194b668137362d7618d0271c8
https://github.com/llvm/llvm-project/commit/ec415aff63fc0cc194b668137362d7618d0271c8
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-03-01 (Fri, 01 Mar 2024)
Changed paths:
M llvm/test/CodeGen/X86/lsr-addrecloops.ll
Log Message:
-----------
[X86] Regenerate X86/lsr-addrecloops.ll test; NFC
Commit: ae76dfb74701e05e5ab4be194e20e49f10768e46
https://github.com/llvm/llvm-project/commit/ae76dfb74701e05e5ab4be194e20e49f10768e46
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-03-01 (Fri, 01 Mar 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll
M llvm/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll
M llvm/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll
M llvm/test/CodeGen/X86/2008-02-18-TailMergingBug.ll
M llvm/test/CodeGen/X86/avx-cmp.ll
M llvm/test/CodeGen/X86/cmp.ll
M llvm/test/CodeGen/X86/dagcombine-and-setcc.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
M llvm/test/CodeGen/X86/inline-spiller-impdef-on-implicit-def-regression.ll
M llvm/test/CodeGen/X86/lsr-addrecloops.ll
M llvm/test/CodeGen/X86/movmsk-cmp.ll
M llvm/test/CodeGen/X86/or-branch.ll
M llvm/test/CodeGen/X86/peephole-na-phys-copy-folding.ll
M llvm/test/CodeGen/X86/pr33747.ll
M llvm/test/CodeGen/X86/pr37025.ll
M llvm/test/CodeGen/X86/pr38795.ll
M llvm/test/CodeGen/X86/setcc-logic.ll
M llvm/test/CodeGen/X86/swifterror.ll
M llvm/test/CodeGen/X86/tail-dup-merge-loop-headers.ll
M llvm/test/CodeGen/X86/tail-opts.ll
M llvm/test/CodeGen/X86/tailcall-extract.ll
M llvm/test/CodeGen/X86/test-shrink-bug.ll
M llvm/test/CodeGen/X86/x86-shrink-wrap-unwind.ll
Log Message:
-----------
[X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches
It makes sense to split if the cost of computing `cond1` is high
(proportionally to how likely `cond0` is), but it doesn't really make
sense to introduce a second branch if its only a few instructions.
Splitting can also get in the way of potentially folding patterns.
This patch introduces some logic to try to check if the cost of
computing `cond1` is relatively low, and if so don't split the
branches.
Modest improvement on clang bootstrap build:
https://llvm-compile-time-tracker.com/compare.php?from=79ce933114e46c891a5632f7ad4a004b93a5b808&to=978278eabc0bafe2f390ca8fcdad24154f954020&stat=cycles
Average stage2-O3: 0.59% Improvement (cycles)
Average stage2-O0-g: 1.20% Improvement (cycles)
Likewise on llvm-test-suite on SKX saw a net 0.84% improvement (cycles)
There is also a modest compile time improvement with this patch:
https://llvm-compile-time-tracker.com/compare.php?from=79ce933114e46c891a5632f7ad4a004b93a5b808&to=978278eabc0bafe2f390ca8fcdad24154f954020&stat=instructions%3Au
Note that the stage2 instruction count increases is expected, this
patch trades instructions for decreasing branch-misses (which is
proportionately lower):
https://llvm-compile-time-tracker.com/compare.php?from=79ce933114e46c891a5632f7ad4a004b93a5b808&to=978278eabc0bafe2f390ca8fcdad24154f954020&stat=branch-misses
NB: This will also likely help for APX targets with the new `CCMP` and
`CTEST` instructions.
Closes #81689
Compare: https://github.com/llvm/llvm-project/compare/d01576bb6033...ae76dfb74701
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