[all-commits] [llvm/llvm-project] 96abee: [Mips] Fix unable to handle inline assembly ends w...

[yingopq via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 96abee5eef31274415681018553e1d4a16dc16c9
      https://github.com/llvm/llvm-project/commit/96abee5eef31274415681018553e1d4a16dc16c9
  Author: yingopq <115543042+yingopq at users.noreply.github.com>
  Date:   2024-02-24 (Sat, 24 Feb 2024)

  Changed paths:
    M lld/test/ELF/mips-pc-relocs.s
    M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
    A llvm/test/CodeGen/Mips/llvm-ir/forbidden-slot-ir.ll
    A llvm/test/MC/Mips/forbidden-slot.s
    M llvm/test/MC/Mips/mips32r6/relocations.s
    M llvm/test/MC/Mips/mips64r6/relocations.s
    M llvm/test/MC/Mips/relocation.s

  Log Message:
  -----------
  [Mips] Fix unable to handle inline assembly ends with compat-branch o… (#77291)

…n MIPS

Modify:
Add a global variable 'CurForbiddenSlotAttr' to save current
instruction's forbidden slot and whether set reorder. This is the
judgment condition for whether to add nop. We would add a couple of
'.set noreorder' and '.set reorder' to wrap the current instruction and
the next instruction.
Then we can get previous instruction`s forbidden slot attribute and
whether set reorder by 'CurForbiddenSlotAttr'.
If previous instruction has forbidden slot and .set reorder is active
and current instruction is CTI. Then emit a NOP after it.

Fix https://github.com/llvm/llvm-project/issues/61045.

Because https://reviews.llvm.org/D158589 was 'Needs Review' state, not
ending, so we commit pull request again.



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