[all-commits] [llvm/llvm-project] d7a28f: [RISCV] Add asserts for insert/extract_subvector i...

[Luke Lau via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d7a28f7ad77504694ad8bdc6b2aaa8938f08fbdd
      https://github.com/llvm/llvm-project/commit/d7a28f7ad77504694ad8bdc6b2aaa8938f08fbdd
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-02-23 (Fri, 23 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

  Log Message:
  -----------
  [RISCV] Add asserts for insert/extract_subvector invariants. NFC

We can currently select insert_subvector and extract_subvector nodes in
RISCVISelDAGToDAG (this is after custom legalizing in RISCVISelLowering)
with fixed subvector types.

However decomposeSubvectorInsertExtractToSubRegs is based off of
scalable subvectors where the indices are scaled by vscale, so any index
other than 0 will be wrong.

For insert_subvector the vector being inserted into needs to be undef as
well, because it assumes we can replace a whole subregister which isn't
always the case for fixed subvectors (e.g. insert <2 x i32> into <4 x
i32> at index 0 with vlen=128).

We currently maintain these invariants in RISCVISelLowering, so this
adds asserts in RISCVISelDAGToDAG so we don't break them.



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