[all-commits] [llvm/llvm-project] 619323: [AArch64] Fix sched model for TSV110 core. (#82343)

[Yury Gribov via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6193233540e55de61baeb80208b06c6808b14dbc
      https://github.com/llvm/llvm-project/commit/6193233540e55de61baeb80208b06c6808b14dbc
  Author: Yury Gribov <tetra2005 at gmail.com>
  Date:   2024-02-22 (Thu, 22 Feb 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SchedTSV110.td
    A llvm/test/tools/llvm-mca/AArch64/HiSilicon/tsv110-forwarding.s

  Log Message:
  -----------
  [AArch64] Fix sched model for TSV110 core. (#82343)

Accumulator operand of MADD instruction can be bypassed from another
MUL-like operation. Before this fix bypassing was incorrectly applied to
multiplier operand.

Co-authored-by: Yury Gribov <gribov.yuri at huawei.com>



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