[all-commits] [llvm/llvm-project] ddc0f1: [TargetLowering] Actually add the adjustment to th...

[David Majnemer via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ddc0f1d8fed4f1a1742598ffd7dc3195bb37a8f1
      https://github.com/llvm/llvm-project/commit/ddc0f1d8fed4f1a1742598ffd7dc3195bb37a8f1
  Author: David Majnemer <david.majnemer at gmail.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/test/CodeGen/AMDGPU/bf16.ll

  Log Message:
  -----------
  [TargetLowering] Actually add the adjustment to the significand

The logic was supposed to be choosing between {0, 1, -1} as an
adjustment to the FP bit pattern. However, the adjustment itself was
used as the bit pattern instead which result in garbage results.



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