[all-commits] [llvm/llvm-project] 71441e: [mlir][Vector] Add vector bitwidth target to xfer ...

[Diego Caballero via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 71441ed1716e6ed3f053dea9c1ceb9cfe2822aea
      https://github.com/llvm/llvm-project/commit/71441ed1716e6ed3f053dea9c1ceb9cfe2822aea
  Author: Diego Caballero <diegocaballero at google.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/Vector/Transforms/VectorRewritePatterns.h
    M mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
    M mlir/test/Dialect/Vector/vector-transfer-flatten.mlir
    M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp

  Log Message:
  -----------
  [mlir][Vector] Add vector bitwidth target to xfer op flattening (#81966)

This PR adds an optional bitwidth parameter to the vector xfer op
flattening transformation so that the flattening doesn't happen if the
trailing dimension of the read/writen vector is larger than this
bitwidth (i.e., we are already able to fill at least one vector register
with that size).



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