[all-commits] [llvm/llvm-project] 2cd59b: [RISCV] Add test case for miscompile in gather -> ...
Luke Lau via All-commits
all-commits at lists.llvm.org
Wed Feb 21 08:30:54 PST 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 2cd59bdc891ab59a1abfe5205feb45791a530a47
https://github.com/llvm/llvm-project/commit/2cd59bdc891ab59a1abfe5205feb45791a530a47
Author: Luke Lau <luke at igalia.com>
Date: 2024-02-22 (Thu, 22 Feb 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
Log Message:
-----------
[RISCV] Add test case for miscompile in gather -> strided load combine. NFC
This shows the issue in #82430, but triggers it via the widening SEW combine
rather than a GEP that RISCVGatherScatterLowering doesn't detect.
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