[all-commits] [llvm/llvm-project] f037e7: [RISCV][TTI] Cost a subvector extract at a registe...

Philip Reames via All-commits all-commits at lists.llvm.org
Wed Feb 21 07:56:20 PST 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f037e709cad410b885cb22ebb22e7e7539d41fb0
      https://github.com/llvm/llvm-project/commit/f037e709cad410b885cb22ebb22e7e7539d41fb0
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/RISCV/shuffle-extract_subvector.ll

  Log Message:
  -----------
  [RISCV][TTI] Cost a subvector extract at a register boundary with exact vlen (#82405)

If we have exact vlen knowledge, we can figure out which indices
correspond to register boundaries. Our lowering uses this knowledge to
replace the vslidedown.vi with a sub-register extract. Our costs can
reflect that as well.

This is another piece split off
https://github.com/llvm/llvm-project/pull/80164

---------

Co-authored-by: Luke Lau <luke_lau at icloud.com>



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