[all-commits] [llvm/llvm-project] a44547: [RISCV] Use TImmLeaf for csr_sysreg (#82463)

[Wang Pengcheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a445474d3fdec2bdaaa42a6dc83c2fb01867076f
      https://github.com/llvm/llvm-project/commit/a445474d3fdec2bdaaa42a6dc83c2fb01867076f
  Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
  Date:   2024-02-21 (Wed, 21 Feb 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td

  Log Message:
  -----------
  [RISCV] Use TImmLeaf for csr_sysreg (#82463)

And use `getTargetConstant` to create operands.

This PR addresses comments after committing #82322.



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