[all-commits] [llvm/llvm-project] a2afcd: Revert "Implement convergence control in MIR using...
Sameer Sahasrabuddhe via All-commits
all-commits at lists.llvm.org
Tue Feb 20 21:40:16 PST 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: a2afcd5721869d1d03c8146bae3885b3385ba15e
https://github.com/llvm/llvm-project/commit/a2afcd5721869d1d03c8146bae3885b3385ba15e
Author: Sameer Sahasrabuddhe <sameer.sahasrabuddhe at amd.com>
Date: 2024-02-21 (Wed, 21 Feb 2024)
Changed paths:
M llvm/include/llvm/ADT/GenericConvergenceVerifier.h
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
R llvm/include/llvm/CodeGen/MachineConvergenceVerifier.h
M llvm/include/llvm/CodeGen/SelectionDAGISel.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/GenericConvergenceVerifierImpl.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/Target.td
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/CMakeLists.txt
R llvm/lib/CodeGen/MachineConvergenceVerifier.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/ValueTypes.cpp
M llvm/lib/IR/ConvergenceVerifier.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstructions.td
R llvm/test/CodeGen/AMDGPU/convergence-tokens.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
M llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr_constant_to_sgpr.ll
M llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/PowerPC/fmf-propagation.ll
R llvm/test/MachineVerifier/convergencectrl/AMDGPU/basic.mir
R llvm/test/MachineVerifier/convergencectrl/AMDGPU/cycles.mir
R llvm/test/MachineVerifier/convergencectrl/AMDGPU/lit.local.cfg
R llvm/test/MachineVerifier/convergencectrl/AMDGPU/mixed2.mir
R llvm/test/MachineVerifier/convergencectrl/AMDGPU/not-ssa.mir
R llvm/test/MachineVerifier/convergencectrl/AMDGPU/region-nesting.mir
M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-imms.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-intrinsics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-patfrag-root.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-variadics.td
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
Log Message:
-----------
Revert "Implement convergence control in MIR using SelectionDAG (#71785)"
This reverts commit 79889734b940356ab3381423c93ae06f22e772c9.
Encountered multiple buildbot failures.
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