[all-commits] [llvm/llvm-project] 539feb: [X86] combineEXTRACT_SUBVECTOR - share the same SD...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 539febfe30fd895996cf2579d3f0cdd2a708ee61
      https://github.com/llvm/llvm-project/commit/539febfe30fd895996cf2579d3f0cdd2a708ee61
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-02-20 (Tue, 20 Feb 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp

  Log Message:
  -----------
  [X86] combineEXTRACT_SUBVECTOR - share the same SDLoc argument instead of recreating it over and over again.


  Commit: 2f1e33df3239714d54665787bd7decdcf35fd60c
      https://github.com/llvm/llvm-project/commit/2f1e33df3239714d54665787bd7decdcf35fd60c
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2024-02-20 (Tue, 20 Feb 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/vector-reduce-add-mask.ll

  Log Message:
  -----------
  [X86] Fold add(psadbw(X,0),psadbw(Y,0)) -> psadbw(add(X,Y),0)

If the vXi8 add(X,Y) is guaranteed not to overflow then we can push the addition though the psadbw nodes (being used for reduction) and only need a single psadbw node.

Noticed while working on CTPOP reduction codegen


Compare: https://github.com/llvm/llvm-project/compare/135529aab0eb...2f1e33df3239

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