[all-commits] [llvm/llvm-project] d31361: [AArch64] Replace LLVM IR function attributes for ...

[Sander de Smalen via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d313614b60ff1194f48e5f0b1bb8d63d2b7eb52d
      https://github.com/llvm/llvm-project/commit/d313614b60ff1194f48e5f0b1bb8d63d2b7eb52d
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2024-02-01 (Thu, 01 Feb 2024)

  Changed paths:
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/lib/CodeGen/CGCall.cpp
    M clang/lib/CodeGen/CodeGenModule.cpp
    M clang/test/CodeGen/aarch64-sme-intrinsics/aarch64-sme-attrs.cpp
    M clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c
    M clang/test/Modules/aarch64-sme-keywords.cppm
    M llvm/docs/AArch64SME.rst
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/lib/Target/AArch64/SMEABIPass.cpp
    M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.cpp
    M llvm/lib/Target/AArch64/Utils/AArch64SMEAttributes.h
    M llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll
    M llvm/test/CodeGen/AArch64/sme-lazy-save-call-remarks.ll
    M llvm/test/CodeGen/AArch64/sme-lazy-save-call.ll
    M llvm/test/CodeGen/AArch64/sme-new-za-function.ll
    M llvm/test/CodeGen/AArch64/sme-shared-za-interface.ll
    M llvm/test/CodeGen/AArch64/sme-zt0-state.ll
    M llvm/test/Transforms/Inline/AArch64/sme-pstateza-attrs.ll
    M llvm/test/Verifier/sme-attributes.ll
    M llvm/unittests/Target/AArch64/SMEAttributesTest.cpp
    M mlir/include/mlir/Dialect/ArmSME/Transforms/Passes.td
    M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
    M mlir/lib/Target/LLVMIR/ModuleImport.cpp
    M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
    M mlir/test/Dialect/ArmSME/enable-arm-za.mlir
    M mlir/test/Target/LLVMIR/Import/function-attributes.ll
    M mlir/test/Target/LLVMIR/llvmir.mlir

  Log Message:
  -----------
  [AArch64] Replace LLVM IR function attributes for PSTATE.ZA. (#79166)

Since https://github.com/ARM-software/acle/pull/276 the ACLE
defines attributes to better describe the use of a given SME state.

Previously the attributes merely described the possibility of it being
'shared' or 'preserved', whereas the new attributes have more semantics
and also describe how the data flows through the program.

For ZT0 we already had to add new LLVM IR attributes:
* aarch64_new_zt0
* aarch64_in_zt0
* aarch64_out_zt0
* aarch64_inout_zt0
* aarch64_preserves_zt0

We have now done the same for ZA, such that we add:
* aarch64_new_za       (previously `aarch64_pstate_za_new`)
* aarch64_in_za (more specific variation of `aarch64_pstate_za_shared`)
* aarch64_out_za (more specific variation of `aarch64_pstate_za_shared`)
* aarch64_inout_za (more specific variation of
`aarch64_pstate_za_shared`)
* aarch64_preserves_za (previously `aarch64_pstate_za_shared,
aarch64_pstate_za_preserved`)

This explicitly removes 'pstate' from the name, because with SME2 and
the new ACLE attributes there is a difference between "sharing ZA"
(sharing
the ZA matrix register with the caller) and "sharing PSTATE.ZA" (sharing
either the ZA or ZT0 register, both part of PSTATE.ZA with the caller).