[all-commits] [llvm/llvm-project] c92ad4: Recommit "[RISCV] Support __riscv_v_fixed_vlen for...

Thu Jan 25 11:19:55 PST 2024

  Branch: refs/heads/users/MaskRay/spr/elf-implement-r_riscv_tlsdesc-for-risc-v
  Home:   https://github.com/llvm/llvm-project
  Commit: c92ad411f2f94d8521cd18abcb37285f9a390ecb
      https://github.com/llvm/llvm-project/commit/c92ad411f2f94d8521cd18abcb37285f9a390ecb
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-01-25 (Thu, 25 Jan 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/AST/Type.h
    M clang/include/clang/Basic/AttrDocs.td
    M clang/lib/AST/ASTContext.cpp
    M clang/lib/AST/ItaniumMangle.cpp
    M clang/lib/AST/JSONNodeDumper.cpp
    M clang/lib/AST/TextNodeDumper.cpp
    M clang/lib/AST/Type.cpp
    M clang/lib/AST/TypePrinter.cpp
    M clang/lib/CodeGen/Targets/RISCV.cpp
    M clang/lib/Sema/SemaExpr.cpp
    M clang/lib/Sema/SemaType.cpp
    M clang/test/CodeGen/attr-riscv-rvv-vector-bits-bitcast.c
    M clang/test/CodeGen/attr-riscv-rvv-vector-bits-call.c
    M clang/test/CodeGen/attr-riscv-rvv-vector-bits-cast.c
    M clang/test/CodeGen/attr-riscv-rvv-vector-bits-codegen.c
    M clang/test/CodeGen/attr-riscv-rvv-vector-bits-globals.c
    M clang/test/CodeGen/attr-riscv-rvv-vector-bits-types.c
    M clang/test/CodeGenCXX/riscv-mangle-rvv-fixed-vectors.cpp
    M clang/test/Sema/attr-riscv-rvv-vector-bits.c

  Log Message:
  -----------
  Recommit "[RISCV] Support __riscv_v_fixed_vlen for vbool types. (#76551)"

Test updated to expect i8 gep.

Original message:

This adopts a similar behavior to AArch64 SVE, where bool vectors are
represented as a vector of chars with 1/8 the number of elements. This
ensures the vector always occupies a power of 2 number of bytes.

A consequence of this is that vbool64_t, vbool32_t, and vool16_t can
only be used with a vector length that guarantees at least 8 bits.

  Commit: eb678d89933684627ee2c5da47e53751f3fdbaa2
      https://github.com/llvm/llvm-project/commit/eb678d89933684627ee2c5da47e53751f3fdbaa2
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2024-01-25 (Thu, 25 Jan 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll

  Log Message:
  -----------
  [AArch64] Combine store (trunc X to <3 x i8>) to sequence of ST1.b. (#78637)

Improve codegen for (trunc X to <3 x i8>) by converting it to a sequence
of 3 ST1.b, but first converting the truncate operand to either v8i8 or
v16i8, extracting the lanes for the truncate results and storing them.

At the moment, there are almost no cases in which such vector operations
will be generated automatically. The motivating case is non-power-of-2
SLP vectorization: https://github.com/llvm/llvm-project/pull/77790

PR: https://github.com/llvm/llvm-project/pull/78637

  Commit: 2550ce4d496e54fe929f2242833b73003f36e387
      https://github.com/llvm/llvm-project/commit/2550ce4d496e54fe929f2242833b73003f36e387
  Author: Louis Dionne <ldionne.2 at gmail.com>
  Date:   2024-01-25 (Thu, 25 Jan 2024)

  Changed paths:
    M libcxx/docs/ReleaseNotes.rst
    A libcxx/docs/ReleaseNotes/19.rst

  Log Message:
  -----------
  [libc++] Add base for LLVM 19 release notes (#78990)

This will make it easier for folks who have patches that are not
targeting LLVM 18 -- they can write the release notes in the LLVM 19
release notes immediately.

  Commit: a19629dae70c9f7e7936eba7aa1e0a3a99742288
      https://github.com/llvm/llvm-project/commit/a19629dae70c9f7e7936eba7aa1e0a3a99742288
  Author: Jeremy Morse <jeremy.morse at sony.com>
  Date:   2024-01-25 (Thu, 25 Jan 2024)

  Changed paths:
    M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
    M llvm/lib/IR/LegacyPassManager.cpp
    M llvm/lib/Linker/IRMover.cpp
    M llvm/lib/Transforms/Utils/ValueMapper.cpp
    M llvm/test/LTO/X86/pr38046.ll
    M llvm/test/Linker/debug-info-use-before-def.ll
    M llvm/test/Linker/thinlto_funcimport_debug.ll
    M llvm/test/ThinLTO/X86/debuginfo-cu-import.ll
    M llvm/test/ThinLTO/X86/pr35472.ll
    M llvm/tools/llvm-link/llvm-link.cpp
    M llvm/tools/llvm-lto/llvm-lto.cpp
    M llvm/tools/llvm-lto2/llvm-lto2.cpp

  Log Message:
  -----------
  Reapply 215b8f1e252, reverted in c3f7fb1421e

Turns out I was using DbgMarker::getDbgValueRange rather than the helper
utility in Instruction::getDbgValueRange, which checks for null-ness.
Original commit message follows.

[DebugInfo][RemoveDIs] Convert debug-info modes when loading bitcode (#78967)

As part of eliminating debug-intrinsics in LLVM, we'll shortly be
pushing the conversion from "old" dbg.value mode to "new" DPValue mode
out from when the pass manager runs, to when modules are loaded. This
patch adds that conversion process and some (temporary) options to
llvm-lto{,2} to help test it.

Specifically: now whenever we load a bitcode module, consider a flag of
whether to "upgrade" it into the new debug-info mode, and if we're
lazily materializing functions then do that lazily too. Doing this
exposes an error in the IRLinker/materializer handling of DPValues,
where we need to transfer the debug-info format flag correctly, and in
ValueMapper we need to remap the Values that DPValues point at.

I've added some test coverage in the modified tests; these will be
exercised by our llvm-new-debug-iterators buildbot.

This upgrading of debug-info won't be happening for the llvm18 release,
instead we'll turn it on after the branch date, thenbe push the boundary
of where "new" debug-info starts and ends down into the existing
debug-info upgrade path over the course of the next release.

  Commit: 8a0ff194e3f9441d35c87d565e093335371a9578
      https://github.com/llvm/llvm-project/commit/8a0ff194e3f9441d35c87d565e093335371a9578
  Author: michaelrj-google <71531609+michaelrj-google at users.noreply.github.com>
  Date:   2024-01-25 (Thu, 25 Jan 2024)

  Changed paths:
    M libc/src/__support/float_to_string.h

  Log Message:
  -----------
  [libc] Fix type warning on gcc in float to str (#79482)

Minor cast warning that was missed in previous patch. Fixed with
explicit cast.

  Commit: 89dc7063f6c81d468a61b71b4ca612e22cb87a46
      https://github.com/llvm/llvm-project/commit/89dc7063f6c81d468a61b71b4ca612e22cb87a46
  Author: Kazu Hirata <kazu at google.com>
  Date:   2024-01-25 (Thu, 25 Jan 2024)

  Changed paths:
    M lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp

  Log Message:
  -----------
  [lldb] Fix printf format errors

This patch fixes:

  lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp:1108:39: error:
  format specifies type 'long long' but the argument has type
  'std::time_t' (aka 'long') [-Werror,-Wformat]

  lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp:1116:64: error:
  format specifies type 'long long' but the argument has type
  'std::time_t' (aka 'long') [-Werror,-Wformat]

  Commit: 28a2b85602a583496fa06ebf1e64239a6399d60c
      https://github.com/llvm/llvm-project/commit/28a2b85602a583496fa06ebf1e64239a6399d60c
  Author: Kazu Hirata <kazu at google.com>
  Date:   2024-01-25 (Thu, 25 Jan 2024)

  Changed paths:
    M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp

  Log Message:
  -----------
  [DeadStoreElimination] Use SmallSetVector (NFC) (#79410)

The use of SmallSetVector saves 0.58% of heap allocations during the
compilation of a large preprocessed file, namely X86ISelLowering.cpp,
for the X86 target.  During the experiment, the final size of ToCheck
was 8 or less 88% of the time.

  Commit: 9ddbcee25ea4b436ab478874221553f4a7bc2289
      https://github.com/llvm/llvm-project/commit/9ddbcee25ea4b436ab478874221553f4a7bc2289
  Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
  Date:   2024-01-25 (Thu, 25 Jan 2024)

  Changed paths:
    M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
    M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
    M mlir/test/Dialect/Vector/invalid.mlir
    M mlir/test/Dialect/Vector/ops.mlir

  Log Message:
  -----------
  [mlir][vector] Extend vector.{insert|extract}_strided_slice (#79052)

Extends `vector.insert_strided_slice` and `vector.insert_strided_slice`
to allow scalable input and output vectors. For scalable sizes, the
corresponding slice size has to match the corresponding dimension in the
output/input vector (insert/extract, respectively).

This is supported:
```mlir
vector.extract_strided_slice %1 {
  offsets = [0, 3, 0],
  sizes = [1, 1, 4],
  strides = [1, 1, 1] } : vector<1x4x[4]xi32> to vector<1x1x[4]xi32>
```

This is not supported:
```mlir
vector.extract_strided_slice %1 {
  offsets = [0, 3, 0],
  sizes = [1, 1, 2],
  strides = [1, 1, 1] } : vector<1x4x[4]xi32> to vector<1x1x[2]xi32>
```

  Commit: 59a6525a4b9d46b931021f727b3235415bc82ea5
      https://github.com/llvm/llvm-project/commit/59a6525a4b9d46b931021f727b3235415bc82ea5
  Author: Alex Langford <alangford at apple.com>
  Date:   2024-01-25 (Thu, 25 Jan 2024)

  Changed paths:
    M lldb/include/lldb/Breakpoint/BreakpointIDList.h
    M lldb/source/Breakpoint/BreakpointIDList.cpp

  Log Message:
  -----------
  [lldb][NFCI] Remove unused method BreakpointIDList::FindBreakpointID(const char *, size_t *) (#79215)

  Commit: 143f71e03ac39b9b3ba3c757454b2c65800b61a3
      https://github.com/llvm/llvm-project/commit/143f71e03ac39b9b3ba3c757454b2c65800b61a3
  Author: Thurston Dang <thurston at google.com>
  Date:   2024-01-25 (Thu, 25 Jan 2024)

  Changed paths:
    M compiler-rt/lib/sanitizer_common/tests/sanitizer_bitvector_test.cpp

  Log Message:
  -----------
  [sanitizer_common] Fix type in format specifier by casting

40dcf24522af91ab22af2e69f28d1f1d2a860f5c had changed the format
specifier to fix the build for their local system. Unfortunately,
that disagrees with some other systems, such as this buildbot:
https://lab.llvm.org/buildbot/#/builders/37/builds/30440

This patch fixes the issue for all systems by casting.

  Commit: 18019ad99eeab30fe84edbf94f51183a6809796c
      https://github.com/llvm/llvm-project/commit/18019ad99eeab30fe84edbf94f51183a6809796c
  Author: Fangrui Song <i at maskray.me>
  Date:   2024-01-25 (Thu, 25 Jan 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/AST/Type.h
    M clang/include/clang/Basic/AttrDocs.td
    M clang/lib/AST/ASTContext.cpp
    M clang/lib/AST/ItaniumMangle.cpp
    M clang/lib/AST/JSONNodeDumper.cpp
    M clang/lib/AST/TextNodeDumper.cpp
    M clang/lib/AST/Type.cpp
    M clang/lib/AST/TypePrinter.cpp
    M clang/lib/CodeGen/Targets/RISCV.cpp
    M clang/lib/Sema/SemaExpr.cpp
    M clang/lib/Sema/SemaType.cpp
    M clang/test/CodeGen/attr-riscv-rvv-vector-bits-bitcast.c
    M clang/test/CodeGen/attr-riscv-rvv-vector-bits-call.c
    M clang/test/CodeGen/attr-riscv-rvv-vector-bits-cast.c
    M clang/test/CodeGen/attr-riscv-rvv-vector-bits-codegen.c
    M clang/test/CodeGen/attr-riscv-rvv-vector-bits-globals.c
    M clang/test/CodeGen/attr-riscv-rvv-vector-bits-types.c
    M clang/test/CodeGenCXX/riscv-mangle-rvv-fixed-vectors.cpp
    M clang/test/Sema/attr-riscv-rvv-vector-bits.c
    M compiler-rt/lib/sanitizer_common/tests/sanitizer_bitvector_test.cpp
    M libc/src/__support/float_to_string.h
    M libcxx/docs/ReleaseNotes.rst
    A libcxx/docs/ReleaseNotes/19.rst
    M lldb/include/lldb/Breakpoint/BreakpointIDList.h
    M lldb/source/Breakpoint/BreakpointIDList.cpp
    M lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
    M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
    M llvm/lib/IR/LegacyPassManager.cpp
    M llvm/lib/Linker/IRMover.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
    M llvm/lib/Transforms/Utils/ValueMapper.cpp
    M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
    M llvm/test/LTO/X86/pr38046.ll
    M llvm/test/Linker/debug-info-use-before-def.ll
    M llvm/test/Linker/thinlto_funcimport_debug.ll
    M llvm/test/ThinLTO/X86/debuginfo-cu-import.ll
    M llvm/test/ThinLTO/X86/pr35472.ll
    M llvm/tools/llvm-link/llvm-link.cpp
    M llvm/tools/llvm-lto/llvm-lto.cpp
    M llvm/tools/llvm-lto2/llvm-lto2.cpp
    M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
    M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
    M mlir/test/Dialect/Vector/invalid.mlir
    M mlir/test/Dialect/Vector/ops.mlir

  Log Message:
  -----------
  rebase

Created using spr 1.3.4

Compare: https://github.com/llvm/llvm-project/compare/aa4749c33c60...18019ad99eea