[all-commits] [llvm/llvm-project] 7e50f0: [NewPM][CodeGen][llc] Add NPM support (#70922)
Fangrui Song via All-commits
all-commits at lists.llvm.org
Wed Jan 24 20:22:20 PST 2024
Branch: refs/heads/users/MaskRay/spr/elf-implement-r_riscv_tlsdesc-for-risc-v
Home: https://github.com/llvm/llvm-project
Commit: 7e50f006f7f652b9a5ac5ddd64deba5f1c9388a8
https://github.com/llvm/llvm-project/commit/7e50f006f7f652b9a5ac5ddd64deba5f1c9388a8
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
M llvm/include/llvm/CodeGen/TargetPassConfig.h
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Target/X86/CMakeLists.txt
A llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86TargetMachine.h
A llvm/test/tools/llc/new-pm/lit.local.cfg
A llvm/test/tools/llc/new-pm/option-conflict.ll
A llvm/test/tools/llc/new-pm/pipeline.ll
A llvm/test/tools/llc/new-pm/start-stop.ll
M llvm/tools/llc/CMakeLists.txt
A llvm/tools/llc/NewPMDriver.cpp
A llvm/tools/llc/NewPMDriver.h
M llvm/tools/llc/llc.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
R llvm/unittests/CodeGen/CodeGenPassBuilderTest.cpp
Log Message:
-----------
[NewPM][CodeGen][llc] Add NPM support (#70922)
Add new pass manager support to `llc`. Users can use
`--passes=pass1,pass2...` to run mir passes, and use `--enable-new-pm`
to run default codegen pipeline.
This patch is taken from [D83612](https://reviews.llvm.org/D83612), the
original author is @yuanfang-chen.
---------
Co-authored-by: Yuanfang Chen <455423+yuanfang-chen at users.noreply.github.com>
Commit: 230c13d59d0843c3b738920b85c341cc78a61fa9
https://github.com/llvm/llvm-project/commit/230c13d59d0843c3b738920b85c341cc78a61fa9
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/ipra.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/spill-sgpr-csr-live-ins.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-to-virtual-vgpr.mir
M llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/vgpr-large-tuple-alloc-error.ll
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
Log Message:
-----------
[AMDGPU] Pick available high VGPR for CSR SGPR spilling (#78669)
CSR SGPR spilling currently uses the early available physical VGPRs. It
currently imposes a high register pressure while trying to allocate
large VGPR tuples within the default register budget.
This patch changes the spilling strategy by picking the VGPRs in the
reverse order, the highest available VGPR first and later after regalloc
shift them back to the lowest available range. With that, the initial
VGPRs would be available for allocation and possibility
of finding large number of contiguous registers will be more.
Commit: 3dea0aa8f4607888d0c32cd7a691d8090b1b73c7
https://github.com/llvm/llvm-project/commit/3dea0aa8f4607888d0c32cd7a691d8090b1b73c7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-23 (Tue, 23 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Log Message:
-----------
[LSR] Fix incorrect comment. NFC (#79207)
Commit: ecde13b1a861696dec5c4ccae792abe25df07db9
https://github.com/llvm/llvm-project/commit/ecde13b1a861696dec5c4ccae792abe25df07db9
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-23 (Tue, 23 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llc/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] port 7e50f006f7f6
Commit: f0c387038854d61a632520a4073d1b6ebf4997ed
https://github.com/llvm/llvm-project/commit/f0c387038854d61a632520a4073d1b6ebf4997ed
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/lib/Lex/HeaderSearch.cpp
A clang/test/Modules/pr73023.cpp
Log Message:
-----------
[Modules] [HeaderSearch] Don't reenter headers if it is pragma once (#76119)
Close https://github.com/llvm/llvm-project/issues/73023
The direct issue of https://github.com/llvm/llvm-project/issues/73023 is
that we entered a header which is marked as pragma once since the
compiler think it is OK if there is controlling macro.
It doesn't make sense. I feel like it should be sufficient to skip it
after we see the '#pragma once'.
>From the context, it looks like the workaround is primarily for
ObjectiveC. So we might need reviewers from OC.
Commit: 7bda0ce15a2874ad74fb1a451a174084094ccc34
https://github.com/llvm/llvm-project/commit/7bda0ce15a2874ad74fb1a451a174084094ccc34
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/tools/llc/llc.cpp
Log Message:
-----------
[llc] Remove C backend support (#79237)
C backend is removed in 3.1.
Commit: 63f742c15f01a25c60f0090a3aceb15bb8985e5e
https://github.com/llvm/llvm-project/commit/63f742c15f01a25c60f0090a3aceb15bb8985e5e
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-01-23 (Tue, 23 Jan 2024)
Changed paths:
M clang/test/Driver/riscv-cpus.c
M clang/test/Misc/target-invalid-cpu-note.c
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add sifive-p670 processor (#79015)
This is an OOO core that has a vector unit. For more information see
https://www.sifive.com/cores/performance-p650-670.
Scheduler model and other tuning will come in separate patches.
Commit: 93248729cfae82a5ca2323d4a8e15aa3b9b9c707
https://github.com/llvm/llvm-project/commit/93248729cfae82a5ca2323d4a8e15aa3b9b9c707
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
R llvm/test/MC/RISCV/rv32a-invalid.s
R llvm/test/MC/RISCV/rv32a-valid.s
A llvm/test/MC/RISCV/rv32zaamo-invalid.s
A llvm/test/MC/RISCV/rv32zaamo-valid.s
A llvm/test/MC/RISCV/rv32zalrsc-invalid.s
A llvm/test/MC/RISCV/rv32zalrsc-valid.s
R llvm/test/MC/RISCV/rv64a-invalid.s
R llvm/test/MC/RISCV/rv64a-valid.s
A llvm/test/MC/RISCV/rv64zaamo-invalid.s
A llvm/test/MC/RISCV/rv64zaamo-valid.s
A llvm/test/MC/RISCV/rv64zalrsc-invalid.s
A llvm/test/MC/RISCV/rv64zalrsc-valid.s
Log Message:
-----------
[RISCV][MC] Split tests for A into Zaamo and Zalrsc parts
So that we don't duplicate tests in later patch.
Reviewers: topperc, dtcxzyw, asb
Reviewed By: asb
Pull Request: https://github.com/llvm/llvm-project/pull/79111
Commit: 987087df90026605fc8d03ebda5a1cd31b71e609
https://github.com/llvm/llvm-project/commit/987087df90026605fc8d03ebda5a1cd31b71e609
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-01-23 (Tue, 23 Jan 2024)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
M clang/docs/ReleaseNotes.rst
M libcxx/include/__config
M lld/docs/ReleaseNotes.rst
M llvm/CMakeLists.txt
M llvm/docs/ReleaseNotes.rst
M llvm/utils/gn/secondary/llvm/version.gni
M llvm/utils/lit/lit/__init__.py
M openmp/docs/ReleaseNotes.rst
M pstl/docs/ReleaseNotes.rst
Log Message:
-----------
Bump trunk version to 19.0.0git
Commit: baba7e4175b6ca21e83b1cf8229f29dbba02e979
https://github.com/llvm/llvm-project/commit/baba7e4175b6ca21e83b1cf8229f29dbba02e979
Author: Weining Lu <luweining at loongson.cn>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/test/DebugInfo/LoongArch/dwarf-loongarch-relocs.ll
Log Message:
-----------
[test] Update dwarf-loongarch-relocs.ll
Address buildbot faiures:
http://45.33.8.238/macm1/77360/step_11.txt
http://45.33.8.238/linux/128902/step_12.txt
Commit: 7251243315ef66f9b3f32e6f8e9536f701aa0d0a
https://github.com/llvm/llvm-project/commit/7251243315ef66f9b3f32e6f8e9536f701aa0d0a
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
R llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
R llvm/include/llvm/CodeGen/MachinePassRegistry.def
A llvm/include/llvm/Passes/CodeGenPassBuilder.h
A llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/module.modulemap
M llvm/lib/CodeGen/CMakeLists.txt
R llvm/lib/CodeGen/CodeGenPassBuilder.cpp
M llvm/lib/Passes/CMakeLists.txt
A llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/tools/llc/NewPMDriver.cpp
Log Message:
-----------
[CodeGen][Passes] Move `CodeGenPassBuilder.h` to Passes (#79242)
`CodeGenPassBuilder` is not very tightly coupled to CodeGen, it may need
to reference some method in pass builder in future, so move
`CodeGenPassBuilder.h` to Passes.
Commit: 33d804c6c2786cbbbc13743060f08d679941e0a4
https://github.com/llvm/llvm-project/commit/33d804c6c2786cbbbc13743060f08d679941e0a4
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/test/CodeGen/RISCV/pr69586.ll
Log Message:
-----------
[RISCV] Allow VCIX with SE to reorder (#77049)
This patch allows VCIX instructions that have side effect to be
reordered
with memory and other side effecting instructions. However we don't want
VCIX instructions to be reordered with each other, so we propose a dummy
register called VCIX_STATE and make these instructions implicitly define
and use
it.
Commit: 502ec2e5a0e5922e09e69b7da08f3e7a8c7aacac
https://github.com/llvm/llvm-project/commit/502ec2e5a0e5922e09e69b7da08f3e7a8c7aacac
Author: Weining Lu <luweining at loongson.cn>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/test/DebugInfo/LoongArch/dwarf-loongarch-relocs.ll
Log Message:
-----------
[test] Make dwarf-loongarch-relocs.ll non-sensitive of function alignment
Commit: 4c3de45ecf9eea6b4ad850a042706f7865a2aab2
https://github.com/llvm/llvm-project/commit/4c3de45ecf9eea6b4ad850a042706f7865a2aab2
Author: leecheechen <chenli at loongson.cn>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/test/CodeGen/LoongArch/lasx/builtin-error.c
M clang/test/CodeGen/LoongArch/lsx/builtin-error.c
Log Message:
-----------
[LoongArch][test] Add tests reporting error if lsx/lasx feature is missing when lsx/lasx builtins are called (#79250)
Commit: 218bb21eaa2f3c08ec24de1f5d88f4d5265068bf
https://github.com/llvm/llvm-project/commit/218bb21eaa2f3c08ec24de1f5d88f4d5265068bf
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Log Message:
-----------
[RISCV] Update performCombineVMergeAndVOps comments. NFC (#78472)
The current comment was written whenever we had separate TU/TA variants
for
each pseudo, and hasn't been accurate for a while.
This method has grown rather complicated over time so rather than
enumerate all
the different possible cases now (which must be a lot), this updates the
comment to list the different rules that are required for us to be able
to fold
a vmerge.
Commit: f7b61f81b5c4710fe089c357ef57ac0afcaf4b56
https://github.com/llvm/llvm-project/commit/f7b61f81b5c4710fe089c357ef57ac0afcaf4b56
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/apx/adc.ll
M llvm/test/CodeGen/X86/apx/sbb.ll
M llvm/test/CodeGen/X86/apx/sub.ll
Log Message:
-----------
[X86][CodeGen] Transform NDD SUB to CMP if dest reg is dead (#79135)
Commit: a01195ff5cc3d7fd084743b1f47007645bb385f4
https://github.com/llvm/llvm-project/commit/a01195ff5cc3d7fd084743b1f47007645bb385f4
Author: Douglas Yung <douglas.yung at sony.com>
Date: 2024-01-23 (Tue, 23 Jan 2024)
Changed paths:
M llvm/test/CodeGen/SystemZ/zos-ppa2.ll
Log Message:
-----------
Update compiler version expected that seems to be embedded in CHECK line of test at llvm/test/CodeGen/SystemZ/zos-ppa2.ll.
The test contains a CHECK line which verifies an .ascii line which originally checks
for 18001970010100000000. After the bump of the compiler version to 19, the test
started to fail with the string now being 19001970010100000000.
This should fix this failing test on bots.
Commit: b4785cebfb0a756e19ff4ae3e41d2563f10cd292
https://github.com/llvm/llvm-project/commit/b4785cebfb0a756e19ff4ae3e41d2563f10cd292
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/Analysis/Utils.h
M mlir/include/mlir/Dialect/Affine/LoopFusionUtils.h
M mlir/lib/Dialect/Affine/Utils/LoopFusionUtils.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
Log Message:
-----------
[MLIR] NFC. Clean up stale TODO comments and style deviations in affine utils (#79079)
NFC. Clean up stale TODO comments and style deviations in affine utils
and
affine fusion utils.
Commit: bc182ea7c2e86aea27268a08311438f8093a6a45
https://github.com/llvm/llvm-project/commit/bc182ea7c2e86aea27268a08311438f8093a6a45
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Passes/BUILD.gn
Log Message:
-----------
[gn build] Port 7251243315ef
Commit: 7e3fb372b0e8899958ec7e9241797e7e136a7a23
https://github.com/llvm/llvm-project/commit/7e3fb372b0e8899958ec7e9241797e7e136a7a23
Author: kadir çetinkaya <kadircet at google.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang-tools-extra/include-cleaner/test/tool.cpp
M clang-tools-extra/include-cleaner/tool/IncludeCleaner.cpp
Log Message:
-----------
[include-cleaner] Check emptiness instead of occurences (#79154)
Our internal integration relies on injecting some default values to
ignore/keep lists.
That means we can have filters, despite of not having occurences
for the flag.
Commit: d119ecb958ebc0a82e7bca01a21115ced8e0b13d
https://github.com/llvm/llvm-project/commit/d119ecb958ebc0a82e7bca01a21115ced8e0b13d
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/apx/mul-i1024.ll
Log Message:
-----------
[X86][NFC] Pre-commit test for RA hints for APX NDD instructions
Commit: 5355857038cf6f9e3831504804e973508ffc2d01
https://github.com/llvm/llvm-project/commit/5355857038cf6f9e3831504804e973508ffc2d01
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/include/clang/Basic/CharInfo.h
Log Message:
-----------
[Clang][NFC] Optimize isAsciiIdentifierContinue (#78699)
Precompute the isAsciiIdentifierContinue table which is on the hot path.
https://llvm-compile-time-tracker.com/compare.php?from=30da0f5a359ab4a684c5fdf0f4dbed20bae10f99&to=cb0e48db2b8193d2ee59c2a6e998317cb220d513&stat=instructions:u
Commit: 7a6c2628e99f70edf6ee46a6b4b4d3d7301353c6
https://github.com/llvm/llvm-project/commit/7a6c2628e99f70edf6ee46a6b4b4d3d7301353c6
Author: martinboehme <mboehme at google.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
Log Message:
-----------
[clang][dataflow] Eliminate two uses of `RecordValue::getLoc()`. (#79163)
This is a small step towards eventually eliminating `RecordValue`
entirely.
Commit: 78b00c116be8b3b53ff13552e31eb305b11cb169
https://github.com/llvm/llvm-project/commit/78b00c116be8b3b53ff13552e31eb305b11cb169
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M lldb/source/Core/ValueObject.cpp
Log Message:
-----------
Revert "[lldb] Improve maintainability and readability for ValueObject methods (#75865)"
This reverts commit d657519838e4b2310e13ec5ff52599e041860825 as it
breaks two dozen tests. The breakages are related to variable path
expression parsing and summary string parsing (possibly the same code).
Commit: dd3e6c87f3f4affd17d05a4d25fa77d224a98d94
https://github.com/llvm/llvm-project/commit/dd3e6c87f3f4affd17d05a4d25fa77d224a98d94
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/LangOptions.def
M clang/lib/Serialization/ASTReaderDecl.cpp
A clang/test/Interpreter/cxx20-modules.cppm
Log Message:
-----------
Support C++20 Modules in clang-repl (#79261)
This comes from when I playing around clang-repl with moduels : )
I succeeded to import std with https://libcxx.llvm.org/Modules.html and
calling `std::printf` after this patch.
I want to put the documentation part to
https://clang.llvm.org/docs/StandardCPlusPlusModules.html in a separate
commit.
Commit: 71d64ed80f8b7556be6954b2c4d663c7d89f476d
https://github.com/llvm/llvm-project/commit/71d64ed80f8b7556be6954b2c4d663c7d89f476d
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
A llvm/test/CodeGen/X86/apx/optimize-compare.mir
A llvm/test/CodeGen/X86/apx/shift-eflags.ll
Log Message:
-----------
[X86][Peephole] Add NDD entries for EFLAGS optimization
Commit: c1259650e742e7b3053f6520729b4c1f44c27814
https://github.com/llvm/llvm-project/commit/c1259650e742e7b3053f6520729b4c1f44c27814
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/test/Interpreter/cxx20-modules.cppm
Log Message:
-----------
[NFC] Add more requirement to clang/test/Interpreter/cxx20-modules.cppm
The previous test can't work on other platforms like PS4.
Address the comments in
https://github.com/llvm/llvm-project/pull/79261#issuecomment-1907589030
Commit: 11ca56eaf1aaf4f7fba5d94562c6b6c0d4444bc3
https://github.com/llvm/llvm-project/commit/11ca56eaf1aaf4f7fba5d94562c6b6c0d4444bc3
Author: Felix Kellenbenz <107758057+felixkellenbenz at users.noreply.github.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/test/tools/llvm-objcopy/ELF/strip-all.test
Log Message:
-----------
[llvm-objcopy] Don't remove .gnu_debuglink section when using --strip-all (#78919)
This fixes the issue mentioned here:
https://github.com/llvm/llvm-project/issues/57407
It prevents `llvm-objcopy` from removing the `.gnu _debuglink` section
when used with the `--strip-all` flag. Since `--strip-all` is the
default of `llvm-strip` the patch also prevents `llvm-strip` from
removing the `.gnu_debuglink` section.
Commit: bae1adae1c7cdf3b0bd618fc9cd5af251dc901ed
https://github.com/llvm/llvm-project/commit/bae1adae1c7cdf3b0bd618fc9cd5af251dc901ed
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/docs/StandardCPlusPlusModules.rst
Log Message:
-----------
[docs] [C++20] [Modules] Document how to import modules in clang-repl
We support to import C++20 named modules now in in clang-repl in
https://github.com/llvm/llvm-project/commit/dd3e6c87f3f4affd17d05a4d25fa77d224a98d94.
Then we should document how can we do that.
Commit: d50705ed5d482ccd9b9afabea2b6358d056b7543
https://github.com/llvm/llvm-project/commit/d50705ed5d482ccd9b9afabea2b6358d056b7543
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][vector] Support scalable vec in `TransferReadAfterWriteToBroadcast` (#79162)
Makes `TransferReadAfterWriteToBroadcast` correctly propagate
scalability flags.
Commit: f3b495f5842bd3c8a5433ba4b784d49c663f84af
https://github.com/llvm/llvm-project/commit/f3b495f5842bd3c8a5433ba4b784d49c663f84af
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/shuffle-reverse.ll
Log Message:
-----------
[RISCV] Add tests for reverse shuffles of i1 vectors. NFC
This is to add test coverage for a change in #73342
Commit: 34466019e74fe455f6c67bab1d48222a08bede4d
https://github.com/llvm/llvm-project/commit/34466019e74fe455f6c67bab1d48222a08bede4d
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][Bazel] Add missing dependency after 750e90e4403df23d6b271afb90e6b4d463739965
Commit: 5404a3792ed58b94b938bbf5cfe6eeb23c664efc
https://github.com/llvm/llvm-project/commit/5404a3792ed58b94b938bbf5cfe6eeb23c664efc
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
Log Message:
-----------
[Driver] Use StringRef::consume_front (NFC)
Commit: 873a7bb12949709ea406c8adc82cd69fc372527d
https://github.com/llvm/llvm-project/commit/873a7bb12949709ea406c8adc82cd69fc372527d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
Log Message:
-----------
[Transforms] Use llvm::pred_size and llvm::predecessors (NFC)
Commit: 18a3c7a01ed983d19e47a03e664200ffff53689c
https://github.com/llvm/llvm-project/commit/18a3c7a01ed983d19e47a03e664200ffff53689c
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUImageIntrinsicOptimizer.cpp
Log Message:
-----------
[AMDGPU] Use llvm::none_of (NFC)
Commit: b0763a1ae940d60d8f558f85216382bc6695a1e3
https://github.com/llvm/llvm-project/commit/b0763a1ae940d60d8f558f85216382bc6695a1e3
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFFormValue.cpp
Log Message:
-----------
[DebugInfo] Use std::size (NFC)
Commit: 33ecef9812e2c9bfadef035b8e34a949acae2abc
https://github.com/llvm/llvm-project/commit/33ecef9812e2c9bfadef035b8e34a949acae2abc
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/commute-blend-avx2.ll
Log Message:
-----------
[X86][CodeGen] Fix crash when commute operands of Instruction for code size (#79245)
Reported in 134fcc62786d31ab73439201dce2d73808d1785a
Incorrect opcode is used b/c there is a `[[fallthrough]]` at line 2386.
Commit: a7a1b8b17e264fb0f2d2b4165cf9a7f5094b08b3
https://github.com/llvm/llvm-project/commit/a7a1b8b17e264fb0f2d2b4165cf9a7f5094b08b3
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Analysis/MemorySSAUpdater.cpp
M llvm/test/Transforms/SimpleLoopUnswitch/memssa-readnone-access.ll
Log Message:
-----------
[MSSAUpdater] Handle simplified accesses when updating phis (#78272)
This is a followup to #76819. After those changes, we can still run into
an assertion failure for a slight variation of the test case: When
fixing up MemoryPhis, we map the incoming access to the access of the
cloned instruction -- which may now no longer exist.
Fix this by reusing the getNewDefiningAccessForClone() helper, which
will look upwards for a new defining access in that case.
Commit: 303e64826b79af0c0e67ba06d5d8e1385adc32b5
https://github.com/llvm/llvm-project/commit/303e64826b79af0c0e67ba06d5d8e1385adc32b5
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
Log Message:
-----------
[X86][NFC] Remove dead code for "_REV" instructions
ADC/SBB with reverse encoding is never emitted by compiler before
encoding optimization, which is called after flag-copy lowering.
This is a partial reland for 8bbf100799a97f8342bf1a8409c6fb48f03e837f
Commit: 543cf08636f3a3bb55dddba2e8cad787601647ba
https://github.com/llvm/llvm-project/commit/543cf08636f3a3bb55dddba2e8cad787601647ba
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
A llvm/test/Transforms/PhaseOrdering/X86/loop-vectorizer-noalias.ll
Log Message:
-----------
[PhaseOrdering] Add additional test for #79161 (NFC)
Commit: cd7ea4ea657ea41b42fcbd0e6b33faa46608d18e
https://github.com/llvm/llvm-project/commit/cd7ea4ea657ea41b42fcbd0e6b33faa46608d18e
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/noalias-scope-decl.ll
M llvm/test/Transforms/PhaseOrdering/X86/loop-vectorizer-noalias.ll
Log Message:
-----------
[LAA] Drop alias scope metadata that is not valid across iterations (#79161)
LAA currently adds memory locations with their original AATags to AST.
However, scoped alias AATags may be valid only within one loop
iteration, while LAA reasons across iterations.
Fix this by determining which alias scopes are defined inside the loop,
and drop AATags that reference these scopes.
Fixes https://github.com/llvm/llvm-project/issues/79137.
Commit: 4a582845597e97d245e8ffdc14281f922b835e56
https://github.com/llvm/llvm-project/commit/4a582845597e97d245e8ffdc14281f922b835e56
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/include/clang/AST/Expr.h
M clang/include/clang/Basic/Builtins.def
M clang/include/clang/Basic/Builtins.h
A clang/include/clang/Basic/Builtins.td
R clang/include/clang/Basic/BuiltinsBPF.def
A clang/include/clang/Basic/BuiltinsBPF.td
A clang/include/clang/Basic/BuiltinsBase.td
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/TargetBuiltins.h
M clang/include/module.modulemap
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/Basic/Builtins.cpp
M clang/lib/Basic/Targets/BPF.cpp
M clang/lib/Sema/OpenCLBuiltins.td
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/test/Analysis/bstring.c
M clang/test/CodeGen/callback_pthread_create.c
M clang/utils/TableGen/CMakeLists.txt
A clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M clang/utils/TableGen/MveEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
Log Message:
-----------
[clang] Refactor Builtins.def to be a tablegen file (#68324)
This makes the builtins list quite a bit more verbose, but IMO this is a
huge win in terms of readability.
Commit: 416b079336c6d6e48858f951cd494a7a3577deb8
https://github.com/llvm/llvm-project/commit/416b079336c6d6e48858f951cd494a7a3577deb8
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M .github/workflows/issue-release-workflow.yml
M llvm/utils/git/github-automation.py
Log Message:
-----------
Fix release issue workflow (#79268)
Remove the `--phab-token` argument (which currently eats the subsequent
"auto" as the token no longer exists) and related code.
I think this will fix the workflow failure in
https://github.com/llvm/llvm-project/issues/79253#issuecomment-1907679229.
Commit: fe0e632b00e63bda75155a8d1aa16d271d4af728
https://github.com/llvm/llvm-project/commit/fe0e632b00e63bda75155a8d1aa16d271d4af728
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
M llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
Log Message:
-----------
[DebugInfo][RemoveDIs] Support DPValues in HWAsan (#78731)
This patch extends HWASAN to support maintenance of debug-info that
isn't stored as intrinsics, but is instead in a DPValue object. This is
straight-forwards: we collect any such objects in StackInfoBuilder, and
apply the same operations to them as we would to dbg.value and similar
intrinsics.
I've also replaced some calls to getNextNode with debug-info skipping
next calls, and use iterators for instruction insertion rather than
instruction pointers. This avoids any difference in output between
intrinsic / non-intrinsic debug-info, but also means that any debug-info
comes before code inserted by HWAsan, rather than afterwards. See the
test modifications, where the variable assignment (presented as a
dbg.value) jumps up over all the code inserted by HWAsan. Seeing how the
code inserted by HWAsan is always (AFAIUI) given the source-location of
the instruction being instrumented, I don't believe this will have any
effect on which lines variable assignments become visible on; it may
extend the number of instructions covered by the assignments though.
Commit: fb9a82b0235713782c1cf9d1eba20ce8d95766f7
https://github.com/llvm/llvm-project/commit/fb9a82b0235713782c1cf9d1eba20ce8d95766f7
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/tools/clang-repl/CMakeLists.txt
Log Message:
-----------
[clang-repl] Refine fix for linker error: PLT offset too large
This is a follow-up improvement after the discussion in #78959
Commit: 383d488b0bd68f1abd58c2d0114f82c54ee286d1
https://github.com/llvm/llvm-project/commit/383d488b0bd68f1abd58c2d0114f82c54ee286d1
Author: Kareem Ergawy <kareem.ergawy at amd.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M openmp/libomptarget/test/offloading/fortran/target_map_common_block1.f90
Log Message:
-----------
[openmp][flang][offloading] Do not use fixed device IDs in checks (#78973)
Fixes a small issues in an offloading test where the test dependec on
the host and device being assigned certains numeric IDs. This however is
not stable and fails in situations where any of the devices is assigned
an ID different from the expected value. The fix just checks that
offloading succeeded by making sure the IDs are different.
The test was failing locally for me.
Commit: 91ddcba83ae4385fe771e918c096e6074b411de3
https://github.com/llvm/llvm-project/commit/91ddcba83ae4385fe771e918c096e6074b411de3
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
Log Message:
-----------
AMDGPU/GlobalISelDivergenceLowering: select divergent i1 phis (#78482)
Implement PhiLoweringHelper for GlobalISel in DivergenceLoweringHelper.
Use machine uniformity analysis to find divergent i1 phis and select
them as lane mask phis in same way SILowerI1Copies select VReg_1 phis.
Note that divergent i1 phis include phis created by LCSSA and all cases
of uses outside of cycle are actually covered by "lowering LCSSA phis".
GlobalISel lane masks are registers with sgpr register class and S1 LLT.
TODO: General goal is that instructions created in this pass are fully
instruction-selected so that selection of lane mask phis is not split
across multiple passes.
patch 3 from: https://github.com/llvm/llvm-project/pull/73337
Commit: 149ed9d2c58095f87745f8696ef96b5076c91fca
https://github.com/llvm/llvm-project/commit/149ed9d2c58095f87745f8696ef96b5076c91fca
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/test/CodeGen/AMDGPU/wmma-hazards.mir
Log Message:
-----------
AMDGPU: update GFX11 wmma hazards (#76143)
One V_NOP or unrelated VALU instruction in between is required for
correctness when matrix A or B of current WMMA instruction overlaps with
matrix D of previous WMMA instruction.
Remaining cases of WMMA operand overlaps are handled by the hardware and
do not require handling in hazard recognizer.
Hardware may stall in cases where:
- matrix C of current WMMA instruction overlaps with matrix D of
previous WMMA instruction
- VALU instruction reads matrix D of previous WMMA instruction
- matrix A,B or C of WMMA instruction reads result of previous VALU
instruction
Commit: 9dddb3d5f3bf323b7b7f8281bb848731f69fddfa
https://github.com/llvm/llvm-project/commit/9dddb3d5f3bf323b7b7f8281bb848731f69fddfa
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/lib/Sema/SemaCoroutine.cpp
M clang/test/AST/ast-dump-coroutine.cpp
Log Message:
-----------
[AST] Mark the fallthrough coreturn statement implicit. (#77465)
This is a followup of #77311.
Commit: c46109d0d78863ff5e4e23c8f9fd85eb1220a42e
https://github.com/llvm/llvm-project/commit/c46109d0d78863ff5e4e23c8f9fd85eb1220a42e
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/include/llvm/CodeGen/MachineUniformityAnalysis.h
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
M llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-reg.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
Log Message:
-----------
Revert "AMDGPU/GlobalISelDivergenceLowering: select divergent i1 phis" (#79274)
Reverts llvm/llvm-project#78482
Commit: cfddb59be2124f7ec615f48a2d0395c6fdb1bb56
https://github.com/llvm/llvm-project/commit/cfddb59be2124f7ec615f48a2d0395c6fdb1bb56
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp8.cl
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/TargetParser/TargetParser.cpp
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp8.txt
Log Message:
-----------
[AMDGPU][GFX12] VOP encoding and codegen - add support for v_cvt fp8/… (#78414)
…bf8 instructions
Add VOP1, VOP1_DPP8, VOP1_DPP16, VOP3, VOP3_DPP8, VOP3_DPP16
instructions that were supported on GFX940 (MI300):
- V_CVT_F32_FP8
- V_CVT_F32_BF8
- V_CVT_PK_F32_FP8
- V_CVT_PK_F32_BF8
- V_CVT_PK_FP8_F32
- V_CVT_PK_BF8_F32
- V_CVT_SR_FP8_F32
- V_CVT_SR_BF8_F32
---------
Co-authored-by: Mateja Marjanovic <mateja.marjanovic at amd.com>
Co-authored-by: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Commit: 78d8ce316ff6f06f58a7f3eb7f633c4bf3bf3285
https://github.com/llvm/llvm-project/commit/78d8ce316ff6f06f58a7f3eb7f633c4bf3bf3285
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SMInstructions.td
Log Message:
-----------
[AMDGPU] Require explicit immediate offsets for SGPR+IMM SMEM instructions. (#79131)
As otherwise SGPR+IMM instructions are not distinguishable to SGPR-only
ones in AsmParser, leading to ambiguities.
GFX12 doesn't have special SGPR-only variants, so we still allow
optional immediate offsets for the subtarget.
Also rename the offset operand classes while there.
Part of <https://github.com/llvm/llvm-project/issues/69256>.
Commit: c83180c1248615cf6ea8842eb4e0cebebba4ab57
https://github.com/llvm/llvm-project/commit/c83180c1248615cf6ea8842eb4e0cebebba4ab57
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
A llvm/test/Transforms/ConstraintElimination/umin-result-may-be-poison.ll
Log Message:
-----------
[ConstraintElim] Add tests for #78621.
Tests with umin where the result may be poison for
https://github.com/llvm/llvm-project/issues/78621.
Commit: dee02ee9f8ffc74fea6c54f4c00df16e7ca4c8a1
https://github.com/llvm/llvm-project/commit/dee02ee9f8ffc74fea6c54f4c00df16e7ca4c8a1
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.h
Log Message:
-----------
[clang][Interp][NFC] Complex elements can only be primitives
So, return a PrimType directly from classifyComplexElementType().
Commit: 17cfc15d6b9b3773db8353937aac9878d7777b21
https://github.com/llvm/llvm-project/commit/17cfc15d6b9b3773db8353937aac9878d7777b21
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
Fix spelling typo. NFC
commutatvity -> commutativity
Commit: 6255bae6c9afe89470f264f903051f64bc15135f
https://github.com/llvm/llvm-project/commit/6255bae6c9afe89470f264f903051f64bc15135f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
A llvm/test/CodeGen/X86/icmp-pow2-mask.ll
Log Message:
-----------
[X86] Add test coverage based on #78888
Commit: 72f10f7eb536da58cb79e13974895cd97d4e1a5f
https://github.com/llvm/llvm-project/commit/72f10f7eb536da58cb79e13974895cd97d4e1a5f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/icmp-pow2-mask.ll
Log Message:
-----------
[X86] Fold not(pcmpeq(and(X,CstPow2),0)) -> pcmpeq(and(X,CstPow2),CstPow2)
Fixes #78888
Commit: 27cfe7a07fc858bd890f2e0980f530a8573748b0
https://github.com/llvm/llvm-project/commit/27cfe7a07fc858bd890f2e0980f530a8573748b0
Author: jeanPerier <jperier at nvidia.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
R flang/include/flang/Optimizer/Builder/Array.h
M flang/include/flang/Optimizer/Builder/BoxValue.h
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/DirectivesCommon.h
M flang/lib/Lower/OpenMP.cpp
M flang/lib/Optimizer/Builder/BoxValue.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Transforms/ArrayValueCopy.cpp
A flang/test/Lower/HLFIR/assumed-size-cray-pointee.f90
M flang/test/Lower/HLFIR/cray-pointers.f90
M flang/test/Lower/Intrinsics/lbound.f90
M flang/test/Lower/Intrinsics/ubound.f90
M flang/test/Lower/array-expression-assumed-size.f90
M flang/test/Lower/cray-pointer.f90
Log Message:
-----------
[flang] Set assumed-size last extent to -1 (#79156)
Currently lowering sets the extents of assumed-size array to "undef"
which was OK as long as the value was not expected to be read.
But when interfacing with the runtime and when passing assumed-size to
assumed-rank, this last extent may be read and must be -1 as specified
in the BIND(C) case in 18.5.3 point 5.
Set this value to -1, and update all the lowering code that was looking
for an undef defining op to identify assumed-size: much safer to
propagate and use semantic info here, the previous check actually did
not work if the array was used in an internal procedure (defining op not
visible anymore).
@clementval and @agozillon, I left assumed-size extent to zero in the
acc/omp bounds op as it was, please double check that is what you want
(I can imagine -1 may create troubles here, and 0 makes some sense as it
would lead to no data transfer).
This also allows removing special cases in UBOUND/LBOUND lowering.
Also disable allocation of cray pointee. This was never intended and
would now lead to crashes with the -1 value for assumed-size cray
pointee.
Commit: 7fdf608cefa0d9051eb3146ee19c3750e237c799
https://github.com/llvm/llvm-project/commit/7fdf608cefa0d9051eb3146ee19c3750e237c799
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w32.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w64.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64.cl
A cross-project-tests/amdgpu/builtins-amdgcn-gfx12-wmma-w32.cl
A cross-project-tests/amdgpu/builtins-amdgcn-gfx12-wmma-w64.cl
A cross-project-tests/amdgpu/builtins-amdgcn-swmmac-w32.cl
A cross-project-tests/amdgpu/builtins-amdgcn-swmmac-w64.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-imm.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-iu-modifiers.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-iu-modifiers.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-imm.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-iu-modifiers.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-swmmac-index_key.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-imm.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-iu-modifiers.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-swmmac-index_key.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64.ll
A llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx12-w32.mir
A llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx12-w64.mir
A llvm/test/MC/AMDGPU/gfx12_asm_wmma_w32.s
A llvm/test/MC/AMDGPU/gfx12_asm_wmma_w64.s
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_wmma_w32.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_wmma_w64.txt
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[AMDGPU] Add GFX12 WMMA and SWMMAC instructions (#77795)
Co-authored-by: Petar Avramovic <Petar.Avramovic at amd.com>
Co-authored-by: Piotr Sobczak <piotr.sobczak at amd.com>
Commit: 89dae798cc77789a43e9a60173f647dae03a65fe
https://github.com/llvm/llvm-project/commit/89dae798cc77789a43e9a60173f647dae03a65fe
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/Loads.h
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
Log Message:
-----------
[Loads] Use BatchAAResults for available value APIs (NFCI)
This allows caching AA queries both within and across the calls,
and enables us to use a custom AAQI configuration.
Commit: d1b473c7956c080fe4d784bb89f720fbd28024a6
https://github.com/llvm/llvm-project/commit/d1b473c7956c080fe4d784bb89f720fbd28024a6
Author: Danial Klimkin <dklimkin at users.noreply.github.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Fix bazel build past 7251243315ef66f9b3f32e6f8e9536f701aa0d0a (#79282)
Fix bazel build past 7251243315ef66f9b3f32e6f8e9536f701aa0d0a
Commit: 5469010ba73701d47498576a433aea5c6e16ba2c
https://github.com/llvm/llvm-project/commit/5469010ba73701d47498576a433aea5c6e16ba2c
Author: ostannard <oliver.stannard at arm.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.td
M llvm/test/MC/AArch64/armv8.1a-rdma.s
M llvm/test/MC/AArch64/armv8.2a-dotprod-errors.s
M llvm/test/MC/AArch64/armv8.2a-dotprod.s
M llvm/test/MC/AArch64/armv8r-sysreg.s
M llvm/test/MC/Disassembler/AArch64/armv8.3a-complex.txt
M llvm/test/MC/Disassembler/AArch64/armv8.3a-js.txt
Log Message:
-----------
[AArch64] FP/SIMD is not mandatory for v8-R (#79004)
The FP/SIMD instructions are optional for v8-R, so they should not be
marked as a dependency of HasV8_0rOps. This had the effect of disabling
some v8R-specific system registers when any of these features was
disabled.
I've moved these features to be enabled by default for Cortex-R82
(currently the only v8-R AArch64 core), matching the previous behavior,
and clang's default.
Based on a patch by Simi Pallipurath <simi.pallipurath at arm.com>
Commit: 182ab1c7034b951433fb8831b67e7758fe61d4e8
https://github.com/llvm/llvm-project/commit/182ab1c7034b951433fb8831b67e7758fe61d4e8
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Support/BLAKE3/blake3_avx2_x86-64_unix.S
M llvm/lib/Support/BLAKE3/blake3_avx512_x86-64_unix.S
M llvm/lib/Support/BLAKE3/blake3_sse2_x86-64_unix.S
M llvm/lib/Support/BLAKE3/blake3_sse41_x86-64_unix.S
Log Message:
-----------
[Support] Adjust .note.GNU-stack guard in Support/BLAKE3/blake3_*_x86-64_unix.S (#76229)
When using GNU ld 2.41 on FreeBSD 14.0/amd64, there are linker warnings
like
```
/vol/gcc/bin/gld-2.41: warning: blake3_avx512_x86-64_unix.S.o: missing .note.GNU-stack section implies executable stack
/vol/gcc/bin/gld-2.41: NOTE: This behaviour is deprecated and will be removed in a future version of the linker
```
This can be fixed by adjusting the guard of the `.note.GNU-stack`
sections in `blake3_*_x86-64_unix.S` to match `llvm/lib/MC/MCAsmInfoELF.cpp:MCAsmInfoELF::getNonexecutableStackSection` which emits the section on all ELF targets
but Solaris.
Tested on `amd64-pc-freebsd14.0`.
Commit: 8b43c1be23119c1024bed0a8ce392bc73727e2e2
https://github.com/llvm/llvm-project/commit/8b43c1be23119c1024bed0a8ce392bc73727e2e2
Author: Simon Pilgrim <RKSimon at users.noreply.github.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86FixupVectorConstants.cpp
M llvm/test/CodeGen/X86/2011-20-21-zext-ui2fp.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/CodeGen/X86/avx-load-store.ll
M llvm/test/CodeGen/X86/avx2-arith.ll
M llvm/test/CodeGen/X86/avx512-shuffles/shuffle-chained-bf16.ll
M llvm/test/CodeGen/X86/bitreverse.ll
M llvm/test/CodeGen/X86/combine-srl.ll
M llvm/test/CodeGen/X86/combine-subo.ll
M llvm/test/CodeGen/X86/constant-pool-sharing.ll
M llvm/test/CodeGen/X86/dpbusd.ll
M llvm/test/CodeGen/X86/dpbusd_const.ll
M llvm/test/CodeGen/X86/expand-vp-cast-intrinsics.ll
M llvm/test/CodeGen/X86/fcmp-constant.ll
M llvm/test/CodeGen/X86/fold-vector-sext-zext.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/icmp-pow2-mask.ll
M llvm/test/CodeGen/X86/insert-into-constant-vector.ll
M llvm/test/CodeGen/X86/insertelement-ones.ll
M llvm/test/CodeGen/X86/masked_gather_scatter_widen.ll
M llvm/test/CodeGen/X86/masked_store_trunc.ll
M llvm/test/CodeGen/X86/memcmp-more-load-pairs.ll
M llvm/test/CodeGen/X86/memcmp.ll
M llvm/test/CodeGen/X86/pmaddubsw.ll
M llvm/test/CodeGen/X86/pr46532.ll
M llvm/test/CodeGen/X86/pr63108.ll
M llvm/test/CodeGen/X86/pr74736.ll
M llvm/test/CodeGen/X86/prefer-avx256-lzcnt.ll
M llvm/test/CodeGen/X86/pshufb-mask-comments.ll
M llvm/test/CodeGen/X86/ret-mmx.ll
M llvm/test/CodeGen/X86/sad.ll
M llvm/test/CodeGen/X86/sext-vsetcc.ll
M llvm/test/CodeGen/X86/shrink_vmul.ll
M llvm/test/CodeGen/X86/shuffle-half.ll
M llvm/test/CodeGen/X86/shuffle-strided-with-offset-256.ll
M llvm/test/CodeGen/X86/shuffle-vs-trunc-256.ll
M llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll
M llvm/test/CodeGen/X86/vec_anyext.ll
M llvm/test/CodeGen/X86/vec_fp_to_int.ll
M llvm/test/CodeGen/X86/vec_set-A.ll
M llvm/test/CodeGen/X86/vector-blend.ll
M llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/X86/vector-fshl-128.ll
M llvm/test/CodeGen/X86/vector-fshl-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-sub128.ll
M llvm/test/CodeGen/X86/vector-fshl-sub128.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-sub128.ll
M llvm/test/CodeGen/X86/vector-fshr-sub128.ll
M llvm/test/CodeGen/X86/vector-half-conversions.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-lzcnt-128.ll
M llvm/test/CodeGen/X86/vector-lzcnt-256.ll
M llvm/test/CodeGen/X86/vector-mulfix-legalize.ll
M llvm/test/CodeGen/X86/vector-reduce-add-mask.ll
M llvm/test/CodeGen/X86/vector-rotate-128.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining.ll
M llvm/test/CodeGen/X86/vector-shuffle-v1.ll
M llvm/test/CodeGen/X86/vector-trunc.ll
M llvm/test/CodeGen/X86/vector-tzcnt-128.ll
M llvm/test/CodeGen/X86/vselect-constants.ll
M llvm/test/CodeGen/X86/vselect-post-combine.ll
M llvm/test/CodeGen/X86/widen_bitcnt.ll
M llvm/test/CodeGen/X86/x86-interleaved-access.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
Log Message:
-----------
[X86] X86FixupVectorConstants - shrink vector load to movsd/movsd/movd/movq 'zero upper' instructions (#79000)
If we're loading a vector constant that is known to be zero in the upper elements, then attempt to shrink the constant and just scalar load the lower 32/64 bits.
Always chose the vzload/broadcast with the smallest constant load, and prefer vzload over broadcasts for same bitwidth to avoid domain flips (mainly a AVX1 issue).
Fixes #73783
Commit: 7143b451d71fe314730f7610d7908e3b9611815c
https://github.com/llvm/llvm-project/commit/7143b451d71fe314730f7610d7908e3b9611815c
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
A llvm/test/Transforms/JumpThreading/pr79175.ll
Log Message:
-----------
[JumpThreading] Add test for #79175 (NFC)
Commit: c3e77070489979788788ef479f8932ac460b675b
https://github.com/llvm/llvm-project/commit/c3e77070489979788788ef479f8932ac460b675b
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/lib/AST/ExprCXX.cpp
Log Message:
-----------
[clang][AST][NFC] Turn a isa<> + cast<> into dynamic_cast<>
Commit: 98509c7f9792c79b05a41b95c24607f6dd489c5a
https://github.com/llvm/llvm-project/commit/98509c7f9792c79b05a41b95c24607f6dd489c5a
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
Log Message:
-----------
[AArch64] Add vec3 tests with different load/store alignments.
Add extra tests with different load/store alignments for
https://github.com/llvm/llvm-project/pull/78637.
Commit: 90ba33099cbb17e7c159e9ebc5a512037db99d6d
https://github.com/llvm/llvm-project/commit/90ba33099cbb17e7c159e9ebc5a512037db99d6d
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/test/CodeGen/PowerPC/builtins-ppc-pair-mma.c
M clang/test/CodeGen/aarch64-ls64-inline-asm.c
M clang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/attr-riscv-rvv-vector-bits-bitcast.c
M clang/test/CodeGen/cleanup-destslot-simple.c
M clang/test/CodeGen/hexagon-brev-ld-ptr-incdec.c
M clang/test/CodeGen/ms-intrinsics.c
M clang/test/CodeGen/nofpclass.c
M clang/test/CodeGen/union-tbaa1.c
M clang/test/CodeGenCXX/RelativeVTablesABI/dynamic-cast.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/type-info.cpp
M clang/test/CodeGenCXX/microsoft-abi-dynamic-cast.cpp
M clang/test/CodeGenCXX/microsoft-abi-typeid.cpp
M clang/test/CodeGenObjC/arc-foreach.m
M clang/test/CodeGenObjCXX/arc-cxx11-init-list.mm
M clang/test/Headers/__clang_hip_math.hip
M clang/test/OpenMP/bug57757.cpp
M flang/test/HLFIR/no-block-merging.fir
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Analysis/BasicAA/featuretest.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
M llvm/test/CodeGen/BPF/preserve-static-offset/load-inline.ll
M llvm/test/CodeGen/BPF/preserve-static-offset/load-unroll-inline.ll
M llvm/test/CodeGen/BPF/preserve-static-offset/load-unroll.ll
M llvm/test/CodeGen/BPF/preserve-static-offset/store-unroll-inline.ll
M llvm/test/CodeGen/Hexagon/autohvx/vector-align-tbaa.ll
M llvm/test/Transforms/Coroutines/coro-async.ll
M llvm/test/Transforms/Coroutines/coro-retcon-alloca-opaque-ptr.ll
M llvm/test/Transforms/Coroutines/coro-retcon-alloca.ll
M llvm/test/Transforms/Coroutines/coro-retcon-once-value.ll
M llvm/test/Transforms/Coroutines/coro-retcon-resume-values.ll
M llvm/test/Transforms/Coroutines/coro-swifterror.ll
M llvm/test/Transforms/InstCombine/2007-03-25-BadShiftMask.ll
M llvm/test/Transforms/InstCombine/2009-01-08-AlignAlloca.ll
M llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll
M llvm/test/Transforms/InstCombine/X86/x86-addsub-inseltpoison.ll
M llvm/test/Transforms/InstCombine/X86/x86-addsub.ll
M llvm/test/Transforms/InstCombine/add3.ll
M llvm/test/Transforms/InstCombine/array.ll
M llvm/test/Transforms/InstCombine/assume.ll
M llvm/test/Transforms/InstCombine/cast_phi.ll
M llvm/test/Transforms/InstCombine/catchswitch-phi.ll
M llvm/test/Transforms/InstCombine/compare-alloca.ll
M llvm/test/Transforms/InstCombine/extractvalue.ll
M llvm/test/Transforms/InstCombine/gep-addrspace.ll
M llvm/test/Transforms/InstCombine/gep-canonicalize-constant-indices.ll
M llvm/test/Transforms/InstCombine/gep-combine-loop-invariant.ll
M llvm/test/Transforms/InstCombine/gep-custom-dl.ll
M llvm/test/Transforms/InstCombine/gep-merge-constant-indices.ll
M llvm/test/Transforms/InstCombine/gep-vector-indices.ll
M llvm/test/Transforms/InstCombine/gep-vector.ll
M llvm/test/Transforms/InstCombine/gepphigep.ll
M llvm/test/Transforms/InstCombine/getelementptr.ll
M llvm/test/Transforms/InstCombine/icmp-custom-dl.ll
M llvm/test/Transforms/InstCombine/icmp-gep.ll
M llvm/test/Transforms/InstCombine/indexed-gep-compares.ll
M llvm/test/Transforms/InstCombine/intptr1.ll
M llvm/test/Transforms/InstCombine/intptr2.ll
M llvm/test/Transforms/InstCombine/intptr3.ll
M llvm/test/Transforms/InstCombine/intptr4.ll
M llvm/test/Transforms/InstCombine/intptr5.ll
M llvm/test/Transforms/InstCombine/intptr7.ll
M llvm/test/Transforms/InstCombine/load-store-forward.ll
M llvm/test/Transforms/InstCombine/load.ll
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
M llvm/test/Transforms/InstCombine/memchr-5.ll
M llvm/test/Transforms/InstCombine/memchr-9.ll
M llvm/test/Transforms/InstCombine/memcmp-3.ll
M llvm/test/Transforms/InstCombine/memcmp-4.ll
M llvm/test/Transforms/InstCombine/memcmp-5.ll
M llvm/test/Transforms/InstCombine/memcmp-6.ll
M llvm/test/Transforms/InstCombine/memcmp-7.ll
M llvm/test/Transforms/InstCombine/memcpy_alloca.ll
M llvm/test/Transforms/InstCombine/memrchr-5.ll
M llvm/test/Transforms/InstCombine/memset2.ll
M llvm/test/Transforms/InstCombine/multi-size-address-space-pointer.ll
M llvm/test/Transforms/InstCombine/non-integral-pointers.ll
M llvm/test/Transforms/InstCombine/opaque-ptr.ll
M llvm/test/Transforms/InstCombine/phi-equal-incoming-pointers.ll
M llvm/test/Transforms/InstCombine/phi-timeout.ll
M llvm/test/Transforms/InstCombine/phi.ll
M llvm/test/Transforms/InstCombine/pr39908.ll
M llvm/test/Transforms/InstCombine/pr44242.ll
M llvm/test/Transforms/InstCombine/pr58901.ll
M llvm/test/Transforms/InstCombine/ptr-replace-alloca.ll
M llvm/test/Transforms/InstCombine/select-cmp-br.ll
M llvm/test/Transforms/InstCombine/select-gep.ll
M llvm/test/Transforms/InstCombine/shift.ll
M llvm/test/Transforms/InstCombine/sink_sideeffecting_instruction.ll
M llvm/test/Transforms/InstCombine/sprintf-2.ll
M llvm/test/Transforms/InstCombine/statepoint-cleanup.ll
M llvm/test/Transforms/InstCombine/str-int-3.ll
M llvm/test/Transforms/InstCombine/str-int-4.ll
M llvm/test/Transforms/InstCombine/str-int-5.ll
M llvm/test/Transforms/InstCombine/str-int.ll
M llvm/test/Transforms/InstCombine/strcall-bad-sig.ll
M llvm/test/Transforms/InstCombine/strcall-no-nul.ll
M llvm/test/Transforms/InstCombine/strlen-7.ll
M llvm/test/Transforms/InstCombine/strlen-9.ll
M llvm/test/Transforms/InstCombine/strncmp-4.ll
M llvm/test/Transforms/InstCombine/strncmp-5.ll
M llvm/test/Transforms/InstCombine/strncmp-6.ll
M llvm/test/Transforms/InstCombine/sub.ll
M llvm/test/Transforms/InstCombine/unpack-fca.ll
M llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_demanded_elts.ll
M llvm/test/Transforms/InstCombine/vec_gep_scalar_arg-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_gep_scalar_arg.ll
M llvm/test/Transforms/InstCombine/vscale_gep.ll
M llvm/test/Transforms/InstCombine/wcslen-5.ll
M llvm/test/Transforms/LoopUnroll/ARM/upperbound.ll
M llvm/test/Transforms/LoopUnroll/peel-loop.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/packed-math.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/extract-last-veclane.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/scalar_after_vectorization.ll
M llvm/test/Transforms/LoopVectorize/vector-geps.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-dominance.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-loops.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-multiple-blocks.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/multiply-minimal.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/peel-multiple-unreachable-exits-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/quant_4x4.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/sinking-vs-if-conversion.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
M llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll
M llvm/test/Transforms/PhaseOrdering/X86/hoist-load-of-baseptr.ll
M llvm/test/Transforms/PhaseOrdering/X86/pixel-splat.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr50555.ll
M llvm/test/Transforms/PhaseOrdering/X86/speculation-vs-tbaa.ll
M llvm/test/Transforms/PhaseOrdering/X86/spurious-peeling.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
M llvm/test/Transforms/PhaseOrdering/X86/vec-shift.ll
M llvm/test/Transforms/PhaseOrdering/basic.ll
M llvm/test/Transforms/PhaseOrdering/loop-access-checks.ll
M llvm/test/Transforms/PhaseOrdering/pr39282.ll
M llvm/test/Transforms/PhaseOrdering/simplifycfg-options.ll
M llvm/test/Transforms/PhaseOrdering/switch_with_geps.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-reduce.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/WebAssembly/no-vectorize-rotate.ll
M llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/opt.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-instcombine.ll
M llvm/test/Transforms/Util/strip-gc-relocates.ll
Log Message:
-----------
[InstCombine] Canonicalize constant GEPs to i8 source element type (#68882)
This patch canonicalizes getelementptr instructions with constant
indices to use the `i8` source element type. This makes it easier for
optimizations to recognize that two GEPs are identical, because they
don't need to see past many different ways to express the same offset.
This is a first step towards
https://discourse.llvm.org/t/rfc-replacing-getelementptr-with-ptradd/68699.
This is limited to constant GEPs only for now, as they have a clear
canonical form, while we're not yet sure how exactly to deal with
variable indices.
The test llvm/test/Transforms/PhaseOrdering/switch_with_geps.ll gives
two representative examples of the kind of optimization improvement we
expect from this change. In the first test SimplifyCFG can now realize
that all switch branches are actually the same. In the second test it
can convert it into simple arithmetic. These are representative of
common optimization failures we see in Rust.
Fixes https://github.com/llvm/llvm-project/issues/69841.
Commit: 3d91d9613e294b242d853039209b40a0cb7853f2
https://github.com/llvm/llvm-project/commit/3d91d9613e294b242d853039209b40a0cb7853f2
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/minmax.ll
M llvm/test/Transforms/ConstraintElimination/umin-result-may-be-poison.ll
Log Message:
-----------
[ConstraintElim] Make sure min/max intrinsic results are not poison.
The result of umin may be poison and in that case the added constraints
are not be valid in contexts where poison doesn't cause UB. Only queue
facts for min/max intrinsics if the result is guaranteed to not be
poison.
This could be improved in the future, by only adding the fact when
solving conditions using the result value.
Fixes https://github.com/llvm/llvm-project/issues/78621.
Commit: 382f70a877f00ab71f3cb5ba461b52e1b59cd292
https://github.com/llvm/llvm-project/commit/382f70a877f00ab71f3cb5ba461b52e1b59cd292
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M libcxx/include/string
Log Message:
-----------
[libc++][NFC] Rewrite function call on two lines for clarity (#79141)
Previously, there was a ternary conditional with a less-than comparison
appearing inside a template argument, which was really confusing because
of the <...> of the function template. This patch rewrites the same
statement on two lines for clarity.
Commit: 03a9f07e189db792b001c4001981d6e2da880221
https://github.com/llvm/llvm-project/commit/03a9f07e189db792b001c4001981d6e2da880221
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M libcxx/include/__algorithm/ranges_max.h
M libcxx/include/__algorithm/ranges_min.h
Log Message:
-----------
[libc++][NFC] Fix leftover && in comment
Commit: 5db2e5801dfec79bad3c804da0f53871a2664373
https://github.com/llvm/llvm-project/commit/5db2e5801dfec79bad3c804da0f53871a2664373
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M .github/workflows/issue-release-workflow.yml
Log Message:
-----------
Add necessary permissions to release issue workflow (#79272)
The `/cherry-pick` command needs `issues: write` to post a comment on
the issue. The `/branch` command also posts a comment, and also needs
`pull-requests: write` to open a PR.
This should fix the failure encountered at
https://github.com/llvm/llvm-project/issues/79253#issuecomment-1907850027.
Commit: 380ac53dfa05792c6f9fd0a4aba542f8c7e5e17c
https://github.com/llvm/llvm-project/commit/380ac53dfa05792c6f9fd0a4aba542f8c7e5e17c
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/DWARFAcceleratorTable.h
M llvm/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp
A llvm/test/CodeGen/X86/dwarf-headers.o
M llvm/test/DebugInfo/Generic/debug-names-one-cu.ll
M llvm/test/DebugInfo/X86/debug-names-dwarf64.ll
M llvm/test/DebugInfo/X86/debug-names-parents-same-offset.ll
M llvm/test/DebugInfo/X86/debug-names-types.ll
M llvm/test/tools/dsymutil/ARM/accel-imported-declarations.test
Log Message:
-----------
[DebugNames] Implement Entry::GetParentEntry query (#78760)
This commit introduces a helper function to DWARFAcceleratorTable::Entry
which follows DW_IDX_Parent attributes to returns the corresponding
parent Entry in the table.
It is tested by enhancing dwarfdump so that it now prints:
1. When data is corrupt.
2. When parent information is present, but the parent is not indexed.
3. The parent entry offset, when the parent is present and indexed. This
is printed in terms a real entry offset (the same that gets printed at
the start of each entry: "Entry @ 0x..."), instead of the encoded number
in the table (which is an offset from the start off the Entry list).
This makes it easy to visually inspect the dwarfdump and check what the
parent is.
Commit: f03a60d4d2fc687059c8bb667d1de37713a5a64b
https://github.com/llvm/llvm-project/commit/f03a60d4d2fc687059c8bb667d1de37713a5a64b
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M .github/workflows/issue-release-workflow.yml
Log Message:
-----------
Use correct tokens in release issue workflow (#79300)
We should use the normal github.token for interacting with issues/PRs on
the repo, and separately pass the `--branch-repo-token` for creating the
branch in the llvmbot repo.
Commit: 70fc9703788e8965813c5b677a85cb84b66671b6
https://github.com/llvm/llvm-project/commit/70fc9703788e8965813c5b677a85cb84b66671b6
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
M llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll
A llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
A llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
R llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
Log Message:
-----------
[AMDGPU] Move architected SGPR implementation into isel (#79120)
Commit: aaa93ce7323332d8290b8f563d4d71689c1094c5
https://github.com/llvm/llvm-project/commit/aaa93ce7323332d8290b8f563d4d71689c1094c5
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
compiler-rt: Fix FLOAT16 feature detection
CMAKE_TRY_COMPILE_TARGET_TYPE defaults to EXECUTABLE, which causes
any feature detection code snippet without a main function to fail,
so we need to make sure it gets explicitly set to STATIC_LIBRARY.
Bug: https://github.com/ROCm/rocFFT/issues/439
Bug: https://github.com/ROCm/rocBLAS/issues/1350
Bug: https://bugs.gentoo.org/916069
Closes: https://github.com/llvm/llvm-project/pull/69842
Reviewed by: thesamesam, mgorny
Commit: 777eb35614eff30f8fe8ca7729b9c04846a09476
https://github.com/llvm/llvm-project/commit/777eb35614eff30f8fe8ca7729b9c04846a09476
Author: felixh5678 <157516335+felixh5678 at users.noreply.github.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/math/index.rst
M libc/spec/stdc.td
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/sqrtf128.cpp
A libc/src/math/sqrtf128.h
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/generic_sqrtf128_test.cpp
A libc/test/src/math/smoke/sqrtf128_test.cpp
Log Message:
-----------
[libc] Add sqrtf128 implementation for Linux x86_64. (#79195)
Co-authored-by: Tue Ly <lntue at google.com>
Co-authored-by: Felix <felix at Dirks-MacBook-Pro.local>
Commit: 9fc890b5a06c5e4a014951a1dd7ad7ba592ceaaf
https://github.com/llvm/llvm-project/commit/9fc890b5a06c5e4a014951a1dd7ad7ba592ceaaf
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/lib/Parse/ParseDeclCXX.cpp
Log Message:
-----------
[clang][Parse][NFC] Make a local variable const
Commit: 0065d06760c0fba786b7b5ff061b3b3efa08bfbc
https://github.com/llvm/llvm-project/commit/0065d06760c0fba786b7b5ff061b3b3efa08bfbc
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/test/Transforms/Attributor/ArgumentPromotion/alignment.ll
Log Message:
-----------
[NFC][DebugInfo] Maintain RemoveDIs flag when attributor creates functions (#79143)
We're using this flag (IsNewDbgInfoFormat) to detect the boundaries in
LLVM of what's treating debug-info as intrinsics (i.e. dbg.value), and
what's using DPValue objects (the non-intrinsic replacement). The
attributor tends to create new wrapper functions and doesn't insert them
into Modules in the usual way, thus we have to manually update that flag
to signal what debug-info mode it's using.
I've added some --try-experimental-debuginfo-iterators RUN lines to
tests that would otherwise crash because of this, so that they're
exercised by our new-debuginfo-iterators buildbot.
NB: there's an attributor test with a dbg.value in it, however
attributes re-order themselves in RemoveDIs mode for various reasons, so
we're going to address that in a different patch.
Commit: dc5b4daae7077b644753e53f175d0f5785fede49
https://github.com/llvm/llvm-project/commit/dc5b4daae7077b644753e53f175d0f5785fede49
Author: quic-asaravan <156995626+quic-asaravan at users.noreply.github.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.h
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
A llvm/test/CodeGen/Hexagon/inline-division-space.ll
A llvm/test/CodeGen/Hexagon/inline-division.ll
Log Message:
-----------
[HEXAGON] Inlining Division (#79021)
This patch inlines float division function calls for hexagon.
Co-authored-by: Awanish Pandey <awanpand at codeaurora.org>
Commit: 31f41f0984303655acf4eaa8d09643a624b1ccb0
https://github.com/llvm/llvm-project/commit/31f41f0984303655acf4eaa8d09643a624b1ccb0
Author: Christian Sigg <csigg at google.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[clang][bazel] Fix BUILD after 4a582845597e97d245e8ffdc14281f922b835e56.
Commit: 2e81ac25b4e2bfdc71aac19a911525a7f35680be
https://github.com/llvm/llvm-project/commit/2e81ac25b4e2bfdc71aac19a911525a7f35680be
Author: Ivan Kosarev <ivan.kosarev at amd.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
Log Message:
-----------
[AMDGPU][NFC] Simplify AGPR/VGPR load/store operand definitions. (#79289)
Part of <https://github.com/llvm/llvm-project/issues/62629>.
Commit: ca8605a78b8dd531c164f6a48a180ccf2770d042
https://github.com/llvm/llvm-project/commit/ca8605a78b8dd531c164f6a48a180ccf2770d042
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M .ci/generate-buildkite-pipeline-premerge
Log Message:
-----------
[ci] Remove bits that are unused since we stopped using Phabricator
Commit: 17db9efe9274e72f42e7e68103dab920ee494ac8
https://github.com/llvm/llvm-project/commit/17db9efe9274e72f42e7e68103dab920ee494ac8
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
Log Message:
-----------
[OpenMP][MLIR] Add omp.distribute op to the OMP dialect (#67720)
This patch adds the omp.distribute operation to the OMP dialect. The
purpose is to be able to represent the distribute construct in OpenMP
with the associated clauses. The effect of the operation is to
distributes the loop iterations of the loop(s) contained inside the
region across multiple teams.
Commit: 8d43dad9b86ad0f72100b6f75450f2982f2663b9
https://github.com/llvm/llvm-project/commit/8d43dad9b86ad0f72100b6f75450f2982f2663b9
Author: Christian Sigg <chsigg at users.noreply.github.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[clang][bazel] Fix BUILD after 4a582845597e97d245e8ffdc14281f922b835e56.
Commit: 6a0118cec079f5963dc5a7a3d9423c55f08b6dad
https://github.com/llvm/llvm-project/commit/6a0118cec079f5963dc5a7a3d9423c55f08b6dad
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M libcxx/docs/index.rst
Log Message:
-----------
[libc++][docs] Remove mention of Phabricator on the landing page
Commit: fc364e26845ce5529caf9f88abcc5a5531d1f59f
https://github.com/llvm/llvm-project/commit/fc364e26845ce5529caf9f88abcc5a5531d1f59f
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M libunwind/docs/index.rst
Log Message:
-----------
[libunwind][doc] Remove reference to Phabricator from the landing page
Commit: 56aa77e1193b7abe65bf3ec16e0f37972345b9f2
https://github.com/llvm/llvm-project/commit/56aa77e1193b7abe65bf3ec16e0f37972345b9f2
Author: Danial Klimkin <dklimkin at users.noreply.github.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
Fix bazel build past 4a582845597e97d245e8ffdc14281f922b835e56 (#79318)
and keep things sorted.
Commit: 396b6bbc5ecef93fce09d6463f47b44dc501d2aa
https://github.com/llvm/llvm-project/commit/396b6bbc5ecef93fce09d6463f47b44dc501d2aa
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-transpose.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
Log Message:
-----------
[RISCV] Recurse on second operand of two operand shuffles (#79197)
This builds on bdc41106ee48dce59c500c9a3957af947f30c8c3.
This change completes the migration to a recursive shuffle lowering
strategy where when we encounter an unknown two argument shuffle, we
lower each operand as a single source permute, and then use a vselect
(i.e. a vmerge) to combine the results. This relies for code quality on
the post-isel combine which will aggressively fold that vmerge back into
the materialization of the second operand if possible.
Note: The change includes only the most immediately obvious of the
stylistic cleanup. There's a bunch of code movement that this enables
that I'll do as a separate patch as rolling it into this creates an
unreadable diff.
Commit: 611843d24bd1cfa8b6bf62b48635dbd3a6281759
https://github.com/llvm/llvm-project/commit/611843d24bd1cfa8b6bf62b48635dbd3a6281759
Author: Christian Sigg <chsigg at users.noreply.github.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[llvm][bazel] Fix BUILD.
Commit: 4079aab8d80233586a9cd3f7be27bece4c21ea16
https://github.com/llvm/llvm-project/commit/4079aab8d80233586a9cd3f7be27bece4c21ea16
Author: Christian Sigg <chsigg at users.noreply.github.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[llvm][bazel] Fix BUILD
Commit: 56444d5687818938a6ce798e7221aa920c54098e
https://github.com/llvm/llvm-project/commit/56444d5687818938a6ce798e7221aa920c54098e
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/utils/git/github-automation.py
Log Message:
-----------
Remove fork handling from release issue workflow (#79310)
This is currently broken, because the check is performed on the wrong
repository. repo here is llvm/llvm-project, which is not a fork (so this
will always trigger), then we'll push a new branch to
llvmbot/llvm-project, and then again set the wrong owner, so we'll look
for the branch in llvm/llvm-project rather than llvmbot/llvm-project.
Rather than fixing this, I'm removing the code entirely, as it shouldn't
be needed anymore (llvmbot/llvm-project is a fork of llvm/llvm-project).
Commit: 6c1dbd5359c4336d03b11faeaea8459b421f2c5c
https://github.com/llvm/llvm-project/commit/6c1dbd5359c4336d03b11faeaea8459b421f2c5c
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/include/clang/Basic/DirectoryEntry.h
M clang/include/clang/Basic/FileEntry.h
M clang/lib/Basic/FileManager.cpp
M clang/unittests/Basic/FileManagerTest.cpp
M llvm/include/llvm/Support/VirtualFileSystem.h
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/unittests/Support/VirtualFileSystemTest.cpp
Log Message:
-----------
[clang] NFC: Remove `{File,Directory}Entry::getName()` (#74910)
The files and directories that Clang accesses are uniqued by their
inode. For each inode `FileManager` will create exactly one `FileEntry`
or `DirectoryEntry` object, which makes answering the question _"Are
these two files/directories the same?"_ a simple pointer equality check.
However, since the same inode can be accessed through multiple different
paths, asking the `FileEntry` or `DirectoryEntry` object _"What is your
name?"_ doesn't have clear semantics. In c0ff9908 we started reporting
the most recent name used to access the entry, which turned out to be
necessary for Clang modules. However, the long-term solution has always
been to explicitly track the as-requested name. This has been
implemented in 4dc5573a as `FileEntryRef` and `DirectoryEntryRef`.
The `DirectoryEntry::getName()` interface has been deprecated since the
Clang 17 release and `FileEntry::getName()` since Clang 18. We have
replaced uses of these deprecated APIs in `main` with
`DirectoryEntryRef::getName()` and `FileEntryRef::getName()`
respectively.
This makes it possible to remove `{File,Directory}Entry::getName()` for
good along with the `FileManager` code that implements them.
Commit: fd817249f4d50caa7a8986a37cdf712dfdf5ad70
https://github.com/llvm/llvm-project/commit/fd817249f4d50caa7a8986a37cdf712dfdf5ad70
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Sink code into using branch in shuffle lowering [nfc]
Follow up to 396b6bbc, sink code into consuming branch, and fix one
comment I realized used the misleading wording. (Permute is a specific
sub-type of single source shuffle.)
Commit: 8abf8d124ae346016c56209de7f57b85671d4367
https://github.com/llvm/llvm-project/commit/8abf8d124ae346016c56209de7f57b85671d4367
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M lld/ELF/InputSection.cpp
M lld/test/ELF/dead-reloc-in-nonalloc.s
Log Message:
-----------
[ELF] Don't resolve relocations referencing SHN_ABS to tombstone in non-SHF_ALLOC sections (#79238)
A SHN_ABS symbol has never been considered for
InputSection::relocateNonAlloc.
Before #74686, the code did made it work in the absence of `-z
dead-reloc-in-nonalloc=`.
There is now a report about such SHN_ABS uses
(https://github.com/llvm/llvm-project/pull/74686#issuecomment-1904101711)
and I think it makes sense for non-SHF_ALLOC to support SHN_ABS, like
SHF_ALLOC sections do.
```
// clang -g
__attribute__((weak)) int symbol;
int *foo() { return &symbol; }
0x00000023: DW_TAG_variable [2] (0x0000000c)
...
DW_AT_location [DW_FORM_exprloc] (DW_OP_addrx 0x0)
```
.debug_addr references `symbol`, which can be redefined by a symbol
assignment or --defsym to become a SHN_ABS symbol.
The problem is that `!sym.getOutputSection()` cannot discern SHN_ABS
from a symbol whose section has been discarded. Since commit
1981b1b6b92f7579a30c9ed32dbdf3bc749c1b40, a symbol relative to a
discarded section is changed to `Undefined`, so the `SHN_ABS` check
become trivial.
We currently apply tombstone for a relocation referencing
`SharedSymbol`. This patch does not change the behavior.
Commit: e99c8aef5d618f5fe0baf643e3a31ee911e909f1
https://github.com/llvm/llvm-project/commit/e99c8aef5d618f5fe0baf643e3a31ee911e909f1
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-loop.f90
Log Message:
-----------
[flang][openacc] Lower DO CONCURRENT with acc loop (#79223)
Lower basic DO CONCURRENT with acc loop construct. The DO CONCURRENT is
lowered to an acc.loop operation.
This does not currently cover the DO CONCURRENT with locality specs.
Commit: 5e894771d9517a0cec3bc12480c1549080aaf5b2
https://github.com/llvm/llvm-project/commit/5e894771d9517a0cec3bc12480c1549080aaf5b2
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
R .ci/generate-buildkite-pipeline-scheduled
Log Message:
-----------
[ci] Remove unused generate-buildkite-pipeline-scheduled script (#79320)
The "scheduled build" pipeline on BuildKite had been disabled for months
and doesn't exist anymore, so this script is effectively dead code. When
we set up a cron-activated build again, we should do it using Github
actions (which could trigger a BK pipeline if needed).
Keeping this script around just creates additional confusion about
what's used and what's not used for doing CI.
Commit: 56602a48c735a1c906a9ec4e03a64fd9c937def3
https://github.com/llvm/llvm-project/commit/56602a48c735a1c906a9ec4e03a64fd9c937def3
Author: ostannard <oliver.stannard at arm.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/docs/TableGen/BackEnds.rst
M llvm/lib/TableGen/JSONBackend.cpp
A llvm/test/TableGen/JSON-locs.td
M llvm/test/TableGen/JSON.td
Log Message:
-----------
[TableGen] Include source location in JSON dump (#79028)
This adds a '!loc' field to each record containing the file name and
line number of the record declaration.
Commit: b801b607e38ca9113394a918f475e5a521b7ec13
https://github.com/llvm/llvm-project/commit/b801b607e38ca9113394a918f475e5a521b7ec13
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang-tools-extra/clangd/xpc/cmake/modules/CreateClangdXPCFramework.cmake
Log Message:
-----------
[clangd] Make sure ninja can clean "ClangdXPC.framework" (#75669)
After building the ClangdXPC target, `ninja clean` fails with the
following error:
```
ninja: error: remove(lib/ClangdXPC.framework): Directory not empty
ninja: error: remove(<build>/lib/ClangdXPC.framework): Directory not empty
```
I did not find better way to make this work. I guess we could list all
generated files (and directories) in `OUTPUT` of the custom command, but
that seems fairly tedious/fragile.
Commit: e9311f9c5acd3d9f282c351721bb911e5b519531
https://github.com/llvm/llvm-project/commit/e9311f9c5acd3d9f282c351721bb911e5b519531
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Separate single source and dual source lowering code [nfc]
The two single source cases aren't effected by the swap or select matching
as those are dual operand specific. Similarly, a two source shuffle can't
be a rotate.
We can extend this idea for some of the shuffle types above, but some of
them are validly either single or dual source. We don't want to loose that
and the code complexity of versioning early and having to repeat some shuffle
kinds doesn't (currently) seem worth it.
Commit: 1605bf58151bc357780fee5553beee2b404772a7
https://github.com/llvm/llvm-project/commit/1605bf58151bc357780fee5553beee2b404772a7
Author: Kazu Hirata <kazu at google.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
Log Message:
-----------
[ConstraintElimination] Use std::move in the constructor (NFC) (#79259)
Moving the contents of Coefficients saves 0.43% of heap allocations
during the compilation of a large preprocessed file, namely
X86ISelLowering.cpp, for the X86 target.
Commit: 3b8539c9dc0bc38ebea903e038257ed4328f290b
https://github.com/llvm/llvm-project/commit/3b8539c9dc0bc38ebea903e038257ed4328f290b
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
A llvm/test/CodeGen/NVPTX/global-incomplete-init.ll
M llvm/test/CodeGen/NVPTX/globals_init.ll
M llvm/test/CodeGen/NVPTX/i128-global.ll
Log Message:
-----------
[NVPTX] use incomplete aggregate initializers (#79062)
The PTX ISA specifies that initializers may be incomplete ([5.4.4.
Initializers](https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#initializers))
> As in C, array initializers may be incomplete, i.e., the number of
initializer elements may be less than the extent of the corresponding
array dimension, with remaining array locations initialized to the
default value for the specified array type.
Emitting initializers in this form is preferable because it reduces the
size of the PTX, in some cases significantly, and can improve compile
time of ptxas as a result.
Commit: ca654acc16c43191228eadfec8f7241dca10b0c3
https://github.com/llvm/llvm-project/commit/ca654acc16c43191228eadfec8f7241dca10b0c3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/extract-subvector-long-input.ll
Log Message:
-----------
[SLP]Fix PR79321: SLPVectorizer's PHICompare doesn't provide a strict
weak ordering.
Compared NumUses to meet the reaquirements of the strict weak ordering.
Commit: 2a77d92e2e942fb1c7e23b046581531ec464cce5
https://github.com/llvm/llvm-project/commit/2a77d92e2e942fb1c7e23b046581531ec464cce5
Author: Vojislav Tomasevic <vojislav.tomasevic at syrmia.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/builtins.c
Log Message:
-----------
[clang] Incorrect IR involving the use of bcopy (#79298)
This patch addresses the issue regarding the call of bcopy function in a
conditional expression.
It is analogous to the already accepted patch which deals with the same
problem, just regarding the bzero function [0].
Here is the testcase which illustrates the issue:
```
void bcopy(const void *, void *, unsigned long);
void foo(void);
void test_bcopy() {
char dst[20];
char src[20];
int _sz = 20, len = 20;
return (_sz
? ((_sz >= len)
? bcopy(src, dst, len)
: foo())
: bcopy(src, dst, len));
}
```
When processing it with clang, following issue occurs:
Instruction does not dominate all uses!
%arraydecay2 = getelementptr inbounds [20 x i8], ptr %dst, i64 0, i64 0,
!dbg !38
%cond = phi ptr [ %arraydecay2, %cond.end ], [ %arraydecay5,
%cond.false3 ], !dbg !33
fatal error: error in backend: Broken module found, compilation aborted!
This happens because an incorrect phi node is created. It is created
because bcopy function call is lowered to the call of llvm.memmove
intrinsic and function memmove returns void *. Since llvm.memmove is
called in two places in the same return statement, clang creates a phi
node in the final basic block for the return value and that phi node is
incorrect. However, bcopy function should return void in the first
place, so this phi node is unnecessary. This is what this patch
addresses. An appropriate test is also added and no existing tests fail
when applying this patch.
Also, this crash only happens when LLVM is configured with
-DLLVM_ENABLE_ASSERTIONS=On option.
[0] https://reviews.llvm.org/D39746
Commit: 4a9a1d83bee91418c649eccc9537dcbf6a745a65
https://github.com/llvm/llvm-project/commit/4a9a1d83bee91418c649eccc9537dcbf6a745a65
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/utils/TableGen/BUILD.gn
Log Message:
-----------
[gn build] port 4a582845597e (tablegen'd clang builtins)
Commit: 604a6c409e8473b212952b8633d92bbdb22a45c9
https://github.com/llvm/llvm-project/commit/604a6c409e8473b212952b8633d92bbdb22a45c9
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/include/llvm/Analysis/BranchProbabilityInfo.h
Log Message:
-----------
[BPI] Transfer value-handles when assign/move constructing BPI (#77774)
Background: BPI stores a collection of edge branch-probabilities, and
also a set of Callback value-handles for the blocks in the
edge-collection. When a block is deleted, BPI's eraseBlock method is
called to clear the edge-collection of references to that block, to
avoid dangling pointers.
However, when move-constructing or assigning a BPI object, the
edge-collection gets moved, but the value-handles are discarded. This
can lead to to stale entries in the edge-collection when blocks are
deleted without the callback -- not normally a problem, but if a new
block is allocated with the same address as an old block, spurious
branch probabilities will be recorded about it. The fix is to transfer
the handles from the source BPI object.
This was exposed by an unrelated debug-info change, it probably just
shifted around allocation orders to expose this. Detected as
nondeterminism and reduced by Zequan Wu:
https://github.com/llvm/llvm-project/commit/f1b0a544514f3d343f32a41de9d6fb0b6cbb6021#commitcomment-136737090
(No test because IMHO testing for a behaviour that varies with memory
allocators is likely futile; I can add the reproducer with a CHECK for
the relevant branch weights if it's desired though)
Commit: ed7cee90f7849594ba9a3ebc2271cb9b5d172004
https://github.com/llvm/llvm-project/commit/ed7cee90f7849594ba9a3ebc2271cb9b5d172004
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
A clang/test/Driver/unsupported-option-gpu.c
Log Message:
-----------
[Driver] Test ignored target-specific options for AMDGPU/NVPTX (#79222)
Fix missing test coverage after #70740 #70760
When compiling for CUDA/HIP, the driver creates a cc1 job to compile for
amdgcn/nvptx triple using most options.
Certain target-specific options should be ignored, not lead to an error
(`err_drv_unsupported_opt_for_target`).
Commit: e099e7b278c774338c7019e38fbbca9ef2c8dd74
https://github.com/llvm/llvm-project/commit/e099e7b278c774338c7019e38fbbca9ef2c8dd74
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
Log Message:
-----------
[Clang] Fix the signature of __builtin___stpncpy_chk
Commit: c1cb0b80f00888920050068a8c6b4f78ca40dd43
https://github.com/llvm/llvm-project/commit/c1cb0b80f00888920050068a8c6b4f78ca40dd43
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M libc/cmake/modules/LLVMLibCObjectRules.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
Log Message:
-----------
[libc][NFC] Fix `-DSHOW_INTERMEDIATE_OBJECTS=DEPS` to work properly for entry points and unit tests. (#79254)
Commit: 32f7922646d5903f63d16c9fbfe3d508b0f8cda7
https://github.com/llvm/llvm-project/commit/32f7922646d5903f63d16c9fbfe3d508b0f8cda7
Author: William Moses <gh at wsmoses.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/tools/opt/CMakeLists.txt
M llvm/tools/opt/NewPMDriver.cpp
M llvm/tools/opt/NewPMDriver.h
M llvm/tools/opt/opt.cpp
A llvm/tools/opt/optdriver.cpp
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[CMake/Bazel] Support usage of opt driver as a library (#79205)
In Bazel, Clang current separates the clang executable into a
clang-driver library, and the actual clang executable. This allows
downstream users to make their own variations of clang, without having
to redo/maintain separate build pipelines.
This adds the same for opt for both CMake and Bazel.
Commit: 7e09239e24b339f45f63a670e2e831150826bf70
https://github.com/llvm/llvm-project/commit/7e09239e24b339f45f63a670e2e831150826bf70
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/unittests/CodeGen/SchedBoundary.cpp
Log Message:
-----------
[CodeGen][MISched] Handle empty sized resource usage. (#75951)
TargetSchedule.td explicitly allows the usage of a ProcResource for zero
cycles, in order to represent that the ProcResource must be available
but is not consumed by the instruction. On the other hand,
ResourceSegments explicitly does not allow for a zero sized interval. In
order to remedy this, this patch handles the special case of when there
is an empty interval usage of a resource by not adding an empty
interval.
We ran into this issue downstream, but it makes sense to have
this upstream since it is explicitly allowed by TargetSchedule.td.
Commit: 048041f19719758976f454cb02b662f7d5ded1dd
https://github.com/llvm/llvm-project/commit/048041f19719758976f454cb02b662f7d5ded1dd
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/spec/linux.td
M libc/spec/spec.td
M libc/src/sys/mman/CMakeLists.txt
M libc/src/sys/mman/linux/CMakeLists.txt
A libc/src/sys/mman/linux/mincore.cpp
A libc/src/sys/mman/mincore.h
M libc/test/src/sys/mman/linux/CMakeLists.txt
A libc/test/src/sys/mman/linux/mincore_test.cpp
Log Message:
-----------
[libc] reland mincore (#79309)
Commit: be08be5d5de97cd593fb99affa1fa994d104eb70
https://github.com/llvm/llvm-project/commit/be08be5d5de97cd593fb99affa1fa994d104eb70
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/tools/opt/CMakeLists.txt
M llvm/tools/opt/NewPMDriver.cpp
M llvm/tools/opt/NewPMDriver.h
M llvm/tools/opt/opt.cpp
R llvm/tools/opt/optdriver.cpp
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Revert "[CMake/Bazel] Support usage of opt driver as a library (#79205)"
This reverts commit 32f7922646d5903f63d16c9fbfe3d508b0f8cda7.
Doesn't build, see
https://github.com/llvm/llvm-project/pull/79205#issuecomment-1908730527
Commit: d2d42dcfde7e9bf58e49b376ae7488ffac97f4c8
https://github.com/llvm/llvm-project/commit/d2d42dcfde7e9bf58e49b376ae7488ffac97f4c8
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
Log Message:
-----------
[CodeGen][MISched] Rename instance of Cycle -> ReleaseAtCycle
b1ae461a5358932851de42b66ffde8748da51a83 renamed Cycle ->
ReleaseAtCycle.
7e09239e24b339f45f63a670e2e831150826bf70 was committed without rebasing
but used the old Cycle syntax.
This caused a build failure when
7e09239e24b339f45f63a670e2e831150826bf70 was squash-and-merged. This
patch fixes this problem.
Commit: 31359840247b7d458ea8104373eea3f0cef95e16
https://github.com/llvm/llvm-project/commit/31359840247b7d458ea8104373eea3f0cef95e16
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/tools/opt/CMakeLists.txt
M llvm/tools/opt/NewPMDriver.cpp
M llvm/tools/opt/NewPMDriver.h
M llvm/tools/opt/opt.cpp
A llvm/tools/opt/optdriver.cpp
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Reland "[CMake/Bazel] Support usage of opt driver as a library (#79205)"
This reverts commit be08be5d5de97cd593fb99affa1fa994d104eb70.
The build error was due to a different change, apologies!
Commit: 609695b23e1cba538f90969afbb1b80367f2d5da
https://github.com/llvm/llvm-project/commit/609695b23e1cba538f90969afbb1b80367f2d5da
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/tools/opt/BUILD.gn
Log Message:
-----------
[gn] port 32f7922646d5 (LLVMOptDriver)
Commit: 123c83ddc71048fb0a682218e6961d71ec08c2ea
https://github.com/llvm/llvm-project/commit/123c83ddc71048fb0a682218e6961d71ec08c2ea
Author: Mircea Trofin <mtrofin at google.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[mlgo] bazel rules for mlgo-utils (#79217)
Akin the `py_binary` rules for `lit`, these are scoped to binaries,
rather than exposing the library - binary split. The latter is available
to the package (pip package) users.
Tested:
```
cd utils/bazel
bazel build @llvm-project//llvm:extract_ir
bazel-bin/external/llvm-project/llvm/extract_ir --help
```
...and observed expected output (rather than import not found errors)
(Same for the other 2 targets).
Commit: 2e52e13c1e7e9a41d47b808fc5d668b7b738b94c
https://github.com/llvm/llvm-project/commit/2e52e13c1e7e9a41d47b808fc5d668b7b738b94c
Author: Wei Wang <apollo.mobility at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/include/clang/AST/Type.h
M clang/test/AST/ast-dump-using.cpp
Log Message:
-----------
[clang] Make sure the same UsingType is searched and inserted (#79182)
When creating a new UsingType, the underlying type may change if it is a
declaration. This creates an inconsistency between the type searched and
type created. Update member and non-member Profile functions so that
they return the same ID.
Commit: d8a34c25bcfe67243b4347e169a2a57a6da95321
https://github.com/llvm/llvm-project/commit/d8a34c25bcfe67243b4347e169a2a57a6da95321
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/tools/opt/CMakeLists.txt
Log Message:
-----------
[opt] Remove trailing space that accidentally got added
Commit: 4b4763ffebaed9f1fee94b8ad5a1a450a9726683
https://github.com/llvm/llvm-project/commit/4b4763ffebaed9f1fee94b8ad5a1a450a9726683
Author: Reid Kleckner <rnk at google.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M lld/test/wasm/signature-mismatch.s
Log Message:
-----------
[lld][WebAssembly] Fix test on Windows, use llvm-ar instead of ar
Commit: 7b11c08c664863fbcd7a3058179b0af3de5d28e4
https://github.com/llvm/llvm-project/commit/7b11c08c664863fbcd7a3058179b0af3de5d28e4
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M libc/test/src/sys/mman/linux/mincore_test.cpp
Log Message:
-----------
[libc] remove unstable mincore test for invalid vec (#79348)
The faults on invalid vec range in mincore seems to be handled
differently by the OS (it is an erroneous edge case after all). Remove
the tests for now.
Commit: 84dcf3d35b6ea8d8b6c34bc9cf21135863c47b8c
https://github.com/llvm/llvm-project/commit/84dcf3d35b6ea8d8b6c34bc9cf21135863c47b8c
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/test/CodeGen/SystemZ/loop-01.ll
Log Message:
-----------
[SystemZ] Require D12 for i128 accesses in isLegalAddressingMode() (#79221)
Machines with vector support handle i128 in vector registers and
therefore only have the small displacement available for memory
accesses. Update isLegalAddressingMode() to reflect this.
Commit: bb65f5a5d95736cf08b282c1ded7f5cceed5fd7e
https://github.com/llvm/llvm-project/commit/bb65f5a5d95736cf08b282c1ded7f5cceed5fd7e
Author: Andy Kaylor <andrew.kaylor at intel.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Support/raw_ostream.cpp
M llvm/lib/Support/raw_socket_stream.cpp
Log Message:
-----------
Move raw_string_ostream back to raw_ostream.cpp (#79224)
The implementation of raw_string_ostream::write_impl() was moved to
raw_socket_stream.cpp when the raw_socket_ostream support was separated.
This patch moves it back to facilitate disabling socket support in
downstream projects.
Commit: 48bbd7658710ef1699bf2a6532ff5830230aacc5
https://github.com/llvm/llvm-project/commit/48bbd7658710ef1699bf2a6532ff5830230aacc5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/extractelement-single-use-many-nodes.ll
Log Message:
-----------
[SLP]Fix PR79229: Check that extractelement is used only in a single node
before erasing.
Before trying to erase the extractelement instruction, not enough to
check for single use, need to check that it is not used in several nodes
because of the preliminary nodes reordering.
Commit: 298412b5786cf9d65f01d90bf38402b11bf87b4f
https://github.com/llvm/llvm-project/commit/298412b5786cf9d65f01d90bf38402b11bf87b4f
Author: Peiming Liu <36770114+PeimingLiu at users.noreply.github.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.h
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorLevel.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorLevel.h
M mlir/test/Dialect/SparseTensor/dense.mlir
M mlir/test/Dialect/SparseTensor/sorted_coo.mlir
M mlir/test/Dialect/SparseTensor/sparse_2d.mlir
M mlir/test/Dialect/SparseTensor/sparse_3d.mlir
M mlir/test/Dialect/SparseTensor/sparse_affine.mlir
M mlir/test/Dialect/SparseTensor/sparse_conv_2d_slice_based.mlir
M mlir/test/Dialect/SparseTensor/sparse_foreach.mlir
M mlir/test/Dialect/SparseTensor/sparse_index.mlir
M mlir/test/Dialect/SparseTensor/sparse_nd.mlir
M mlir/test/Dialect/SparseTensor/sparse_perm.mlir
M mlir/test/Dialect/SparseTensor/sparse_perm_lower.mlir
M mlir/test/Dialect/SparseTensor/sparse_vector_mv.mlir
M mlir/test/Dialect/SparseTensor/spy_sddmm_bsr.mlir
Log Message:
-----------
[mlir][sparse] setup `SparseIterator` to help generating code to traverse a sparse tensor level. (#78345)
Commit: 0f8b52955c219e42e87162fd8c99c3cea6e35d21
https://github.com/llvm/llvm-project/commit/0f8b52955c219e42e87162fd8c99c3cea6e35d21
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/test/Driver/linker-wrapper.c
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
Log Message:
-----------
[LinkerWrapper] Do not link device code under a relocatable link (#79314)
Summary:
A relocatable link through `clang -r` can go through the
clang-linker-wrapper if offloading is enabled. This will have the effect
of linking the device code and creating the wrapper module. It will then
be merged into the final file. This is useful behavior on its own, but
is likely not what is expected for a `-r` job.
This patch makes the linker wrapper ignore the device code when doing a
reloctable link. This has the effect of the linker merging the
`.llvm.offloading` sections in the output object. These will then be
parsed as normal when the executable is finally created.
Even though this doesn't actually perform a reloctable link on the
device code itself, it has a similar effect of combining multiple files
into a single one.
Commit: a551703cb5d171d24303de9d20bfdedfe46d49cf
https://github.com/llvm/llvm-project/commit/a551703cb5d171d24303de9d20bfdedfe46d49cf
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/test/Driver/linker-wrapper-image.c
M llvm/lib/Frontend/Offloading/Utility.cpp
Log Message:
-----------
[Offload] Fix the offloading wrapper when merged multiple times. (#79231)
Summary:
The offloading wrapper is a object file that contains code necessary to
register offloading entries for the given runtime. Currently, we
expected only one of these to be present when we make the final
executable. However, in the case of redistributable linking with `-r` we
can end up with multiple of these being generated before finally
creating the executable.
This patch simply changes the defintiions of these globals to be
mergable. This allows multiples of these to participate in a single link
job. For ELF, we just make the dummy variable internal and used so it
sets up the section as expected. For COFF we make the entries weak_odr
so they merge to a single symbol
Commit: 04ce0baf015ced39e994b8839e30bd5cef6c995e
https://github.com/llvm/llvm-project/commit/04ce0baf015ced39e994b8839e30bd5cef6c995e
Author: Eric <eric at efcs.ca>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/include/__config
M libcxx/include/string
M libcxx/test/libcxx/strings/basic.string/string.capacity/allocation_size.pass.cpp
M libcxx/test/libcxx/strings/basic.string/string.capacity/max_size.pass.cpp
M libcxx/test/std/strings/basic.string/string.capacity/max_size.pass.cpp
Log Message:
-----------
Unconditionally lower std::string's alignment requirement from 16 to 8. (#68925)
Unconditionally change std::string's alignment to 8.
This change saves memory by providing the allocator more freedom to
allocate the most
efficient size class by dropping the alignment requirements for
std::string's
pointer from 16 to 8. This changes the output of std::string::max_size,
which makes it ABI breaking.
That said, the discussion concluded that we don't care about this ABI
break. and would like this change enabled universally.
The ABI break isn't one of layout or "class size", but rather the value
of "max_size()" changes, which in turn changes whether `std::bad_alloc`
or `std::length_error` is thrown for large allocations.
This change is the child of PR #68807, which enabled the change behind
an ABI flag.
Commit: e6f576b0c3fdddcd5916dcce24d17e36d2dbe2e6
https://github.com/llvm/llvm-project/commit/e6f576b0c3fdddcd5916dcce24d17e36d2dbe2e6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/docs/ShadowCallStack.rst
Log Message:
-----------
[Docs] Mention RISC-V in the introductory paragraph in ShadowCallStack.rst. (#79241)
RISC-V is mentioned elsewhere in the document it seems like it should be
mentioned in the introduction.
Commit: e3ee3762304aa81e4a240500844bfdd003401b36
https://github.com/llvm/llvm-project/commit/e3ee3762304aa81e4a240500844bfdd003401b36
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/lib/AST/TemplateBase.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp
Log Message:
-----------
Fix comparison of Structural Values
Fixes a regression from #78041 as reported in the review. The original
patch failed to compare the canonical type, which this adds. A slightly
modified test of the original report is added.
Commit: 260e45cff0c3b2e95eea9752d64f7a3a31432c0a
https://github.com/llvm/llvm-project/commit/260e45cff0c3b2e95eea9752d64f7a3a31432c0a
Author: Peiming Liu <36770114+PeimingLiu at users.noreply.github.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorLevel.cpp
Log Message:
-----------
[mlir][sparse] fix stack UAF (#79353)
Commit: 4a9b5aa1164c1eff68c98c1513cab3ac0c52b4af
https://github.com/llvm/llvm-project/commit/4a9b5aa1164c1eff68c98c1513cab3ac0c52b4af
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M libc/startup/linux/do_start.cpp
Log Message:
-----------
[libc][NFC] remove TODO about AppProperties (#79356)
```
AppProperties app;
```
is marked as a weak symbol in header now. One can just use `&app !=
nullptr` to check if `app` is defined. There is no need to define it for
overlay mode.
Commit: 22c22d6182e0ee456ff1141be8e178ede6df47bb
https://github.com/llvm/llvm-project/commit/22c22d6182e0ee456ff1141be8e178ede6df47bb
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M libc/src/__support/HashTable/table.h
Log Message:
-----------
[libc][NFC] mark hashtable as resizable (#79354)
It is not fix-sized anymore.
Commit: 48570a6feb62c897dc4cdcd1dab3e99a0aa46d48
https://github.com/llvm/llvm-project/commit/48570a6feb62c897dc4cdcd1dab3e99a0aa46d48
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/test/Driver/unsupported-option-gpu.c
Log Message:
-----------
[Driver,test] Add --target= to unsupported-option-gpu.c
Commit: f6ca6ed528b4ab0507f5099efd8902e0c076a327
https://github.com/llvm/llvm-project/commit/f6ca6ed528b4ab0507f5099efd8902e0c076a327
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M compiler-rt/lib/builtins/CMakeLists.txt
Log Message:
-----------
Revert "compiler-rt: Fix FLOAT16 feature detection"
This reverts commit aaa93ce7323332d8290b8f563d4d71689c1094c5.
This commit was not properly reviewed.
Commit: 6e4930c67508a90bdfd756f6e45417b5253cd741
https://github.com/llvm/llvm-project/commit/6e4930c67508a90bdfd756f6e45417b5253cd741
Author: Alexander Kornienko <alexfh at google.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/test/CXX/drs/dr14xx.cpp
M clang/test/CXX/drs/dr21xx.cpp
M clang/test/CXX/drs/dr23xx.cpp
M clang/www/cxx_dr_status.html
M libcxx/test/std/utilities/utility/pairs/pairs.pair/ctor.pair_U_V_move.pass.cpp
Log Message:
-----------
Revert "[SemaCXX] Implement CWG2137 (list-initialization from objects of the same type) (#77768)"
This reverts commit 924701311aa79180e86ad8ce43d253f27d25ec7d. Causes compilation
errors on valid code, see
https://github.com/llvm/llvm-project/pull/77768#issuecomment-1908062472.
Commit: 3967510032bc50062128e9ec078d930d7d5151ce
https://github.com/llvm/llvm-project/commit/3967510032bc50062128e9ec078d930d7d5151ce
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-args.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-ret.ll
Log Message:
-----------
[RISCV][GISel] First mask argument placed in v0 according to RISCV Ve… (#79343)
…ctor CC.
Commit: fe9f3903f2d61bc67bfee66b44872339c8c767bb
https://github.com/llvm/llvm-project/commit/fe9f3903f2d61bc67bfee66b44872339c8c767bb
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
[AMDGPU] Update isLegalAddressingMode for GFX12 SMEM loads (#78728)
Commit: 72ce6294157964042b7ed5576ce2c99257eeea9d
https://github.com/llvm/llvm-project/commit/72ce6294157964042b7ed5576ce2c99257eeea9d
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M libc/cmake/modules/LLVMLibCLibraryRules.cmake
M libc/config/darwin/arm/headers.txt
M libc/config/darwin/x86_64/headers.txt
M libc/config/gpu/headers.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/headers.txt
M libc/include/CMakeLists.txt
A libc/include/limits.h.def
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/float-macros.h
A libc/include/llvm-libc-macros/limits-macros.h
M libc/spec/stdc.td
M libc/src/__support/CMakeLists.txt
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/limits.h
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/ManipulationFunctions.h
M libc/src/__support/math_extras.h
M libc/src/__support/str_to_integer.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/callonce.cpp
M libc/src/time/CMakeLists.txt
M libc/src/time/mktime.cpp
M libc/src/time/time_utils.cpp
M libc/test/src/math/CMakeLists.txt
M libc/test/src/math/ILogbTest.h
M libc/test/src/math/LdExpTest.h
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/ILogbTest.h
M libc/test/src/math/smoke/LdExpTest.h
M libc/test/src/stdlib/AtoiTest.h
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/StrtolTest.h
M libc/test/src/stdlib/atof_test.cpp
M libc/test/src/stdlib/strtod_test.cpp
M libc/test/src/stdlib/strtof_test.cpp
M libc/test/src/stdlib/strtold_test.cpp
M libc/test/src/time/CMakeLists.txt
M libc/test/src/time/clock_test.cpp
M libc/test/src/time/gmtime_test.cpp
M libc/test/src/time/mktime_test.cpp
M libc/test/src/time/time_test.cpp
Log Message:
-----------
[libc] Add C23 limits.h header. (#78887)
Commit: 62a384ca66993b449c5accedbebf7af191fbe52c
https://github.com/llvm/llvm-project/commit/62a384ca66993b449c5accedbebf7af191fbe52c
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Parse/Parser.h
M clang/lib/Parse/ParseOpenACC.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-clauses.cpp
Log Message:
-----------
[OpenACC} Implement 'async' parsing.
async just takes an integral value, but it has a little bit of special
rules in sema, so it is implemented slightly differently than int-expr.
This patch implements async parsing.
Commit: 36e4a7ecca8a79fe8960a1e2afa78fbbd643dc7f
https://github.com/llvm/llvm-project/commit/36e4a7ecca8a79fe8960a1e2afa78fbbd643dc7f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP]Fix PR79321: SLPVectorizer's PHICompare doesn't provide a strict
weak ordering.
Try to make PHICompare to meat strict weak ordering criteria.
Commit: ce21721d1dd0f11c3ff38d16050e65861908a395
https://github.com/llvm/llvm-project/commit/ce21721d1dd0f11c3ff38d16050e65861908a395
Author: arthurqiu <qiurenjie at msn.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M mlir/test/IR/properties.mlir
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
Log Message:
-----------
[MLIR] Fix tblgen properties printing to filter them out of discardable attrs dict (#79243)
This is to fix the bug reported in
https://discourse.llvm.org/t/whats-the-recommended-way-to-use-prop-dict/75921
When `prop-dict` is used in the assembly format, `attr-dict` should
print discardable attributes only.
Co-authored-by: Arthurq Qiu <arthurq at nvidia.com>
Commit: 3a92b20cb0e61bec886d07c3f7280b8b2a4b8d49
https://github.com/llvm/llvm-project/commit/3a92b20cb0e61bec886d07c3f7280b8b2a4b8d49
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M libc/include/llvm-libc-macros/limits-macros.h
Log Message:
-----------
[libc] Add backup definition for LONG_WIDTH in limits-macros.h. (#79375)
Commit: 23faa81d3f0b701aec3731a7fce4d65c57a752b9
https://github.com/llvm/llvm-project/commit/23faa81d3f0b701aec3731a7fce4d65c57a752b9
Author: Micah Weston <micahsweston at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/test/tools/llvm-objdump/X86/elf-bbaddrmap-disassemble-symbolize-operands.yaml
M llvm/test/tools/llvm-objdump/X86/elf-bbaddrmap-symbolize-relocatable.yaml
M llvm/test/tools/llvm-objdump/X86/elf-pgoanalysismap.yaml
M llvm/test/tools/llvm-readobj/ELF/bb-addr-map-relocatable.test
M llvm/test/tools/llvm-readobj/ELF/bb-addr-map.test
M llvm/test/tools/obj2yaml/ELF/bb-addr-map.yaml
M llvm/test/tools/yaml2obj/ELF/bb-addr-map.yaml
M llvm/unittests/Object/ELFObjectFileTest.cpp
Log Message:
-----------
[SHT_LLVM_BB_ADDR_MAP] Avoids side-effects in addition since order is unspecified. (#79168)
Turns out the problem with
https://github.com/llvm/llvm-project/issues/60013 is due to the fact
that order of operation is unspecified in C++:
https://en.cppreference.com/w/cpp/language/eval_order. A small example
of where this manifests with MSVC can be seen here
https://ooo.godbolt.org/z/bxqKeqzqn.
This patch does the following:
* Removes the addition operations where we sequence more than one
side-effect based expression.
* Removes test guards to now run on Windows
Commit: 6384b6239b45f67aa6591d911376cc224b256c8d
https://github.com/llvm/llvm-project/commit/6384b6239b45f67aa6591d911376cc224b256c8d
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
Log Message:
-----------
[AMDGPU] Simplify VOP3PWMMA_Profile. NFC. (#79377)
Commit: a0c1b5bdda91920a66f58b0a891c551acff2d2a1
https://github.com/llvm/llvm-project/commit/a0c1b5bdda91920a66f58b0a891c551acff2d2a1
Author: DianQK <dianqk at dianqk.net>
Date: 2024-01-25 (Thu, 25 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/SimplifyCFG/unreachable-eliminate-on-ret.ll
Log Message:
-----------
Reland "[SimplifyCFG] Check if the return instruction causes undefined behavior"
This relands commit b6a0be8ce3114d0c57e7a7d6c3c222986ca506ad.
Return undefined to a noundef return value is undefined.
Example:
```
define noundef i32 @test_ret_noundef(i1 %cond) {
entry:
br i1 %cond, label %bb1, label %bb2
bb1:
br label %bb2
bb2:
%r = phi i32 [ undef, %entry ], [ 1, %bb1 ]
ret i32 %r
}
```
Commit: a58dcc5e08665f2d58a28c9d4510cf94de6ed3bf
https://github.com/llvm/llvm-project/commit/a58dcc5e08665f2d58a28c9d4510cf94de6ed3bf
Author: DianQK <dianqk at dianqk.net>
Date: 2024-01-25 (Thu, 25 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/UnreachableEliminate.ll
M llvm/test/Transforms/SimplifyCFG/unreachable-eliminate-on-ret.ll
Log Message:
-----------
Reland "[SimplifyCFG] Improve the precision of `PtrValueMayBeModified`"
This relands commit f890f010f6a70addbd885acd0c8d1b9578b6246f.
The result value of `getelementptr inbounds (TY, null, not zero)` is a poison value.
We can think of it as undefined behavior.
Commit: 16a1ef86cbc5e6c829919ec6c73325413b0cd21b
https://github.com/llvm/llvm-project/commit/16a1ef86cbc5e6c829919ec6c73325413b0cd21b
Author: David CARLIER <devnexen at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
R compiler-rt/test/sanitizer_common/TestCases/FreeBSD/hexdump.cc
Log Message:
-----------
[compiler-rt] remove hexdump interception. (#79378)
a freebsd dev member reported a symbol conflict and intercepting this
had little value anyway.
Commit: bddeef54cb66609ad0a32d840051713cd8487adb
https://github.com/llvm/llvm-project/commit/bddeef54cb66609ad0a32d840051713cd8487adb
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
R lldb/include/lldb/Breakpoint/WatchpointResourceList.h
M lldb/source/Breakpoint/CMakeLists.txt
R lldb/source/Breakpoint/WatchpointResourceList.cpp
Log Message:
-----------
[lldb] [NFC] Remove unused WatchpointResourceList class (#79385)
In `[lldb] [mostly NFC] Large WP foundation: WatchpointResources
(#68845)` I added a new template StopPointSiteList to combine
WatchpointResourceList and BreakpointSiteList. But I didn't remove the
now-unused WatchpointResourceList class. This patch fixes that.
Commit: 56da7991ead442b7c0ef9ec47d625253ed6b926e
https://github.com/llvm/llvm-project/commit/56da7991ead442b7c0ef9ec47d625253ed6b926e
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M lldb/include/lldb/Breakpoint/WatchpointResource.h
M lldb/source/Breakpoint/WatchpointResource.cpp
Log Message:
-----------
[lldb] [NFC] Remove unused WatchpointResource::SetID method (#79389)
I originally thought to try to guesstimate the hardware watchpoint index
number that a Resource was associated with, but gdb remote serial
protocol doesn't give us the hardware register index used so it was only
a guess. I changed my mind and simply use ever-incrementing ID numbers
for the WatchpointResources, but forgot to remove the SetID method.
Commit: 45950f6e27efaba0aa5ab67d5ea7d6df5e8edc5f
https://github.com/llvm/llvm-project/commit/45950f6e27efaba0aa5ab67d5ea7d6df5e8edc5f
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Breakpoint/BUILD.gn
Log Message:
-----------
[gn build] Port bddeef54cb66
Commit: 1ae0448ed37654529b7172aa643ce7ba5735fb3a
https://github.com/llvm/llvm-project/commit/1ae0448ed37654529b7172aa643ce7ba5735fb3a
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/msan_asm_conservative.ll
Log Message:
-----------
[msan] Enable msan-handle-asm-conservative for userspace by default (#79251)
msan-handle-asm-conservative is enabled by KMSAN by default.
Enable the userspace by default as well after #77393.
Commit: bb6a4850553dd4140a5bd63187ec1b14d0b731f9
https://github.com/llvm/llvm-project/commit/bb6a4850553dd4140a5bd63187ec1b14d0b731f9
Author: Alexander Yermolovich <43973793+ayermolo at users.noreply.github.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M bolt/include/bolt/Rewrite/DWARFRewriter.h
M bolt/lib/Rewrite/DWARFRewriter.cpp
A bolt/test/X86/Inputs/dwarf4-debug-line-offset-change-after-bolt-helper.s
A bolt/test/X86/Inputs/dwarf4-debug-line-offset-change-after-bolt-main.s
A bolt/test/X86/Inputs/dwarf5-debug-line-offset-change-after-bolt-main.s
A bolt/test/X86/dwarf-debug-line-stmt-list-offset-change.test
Log Message:
-----------
[BOLT] Fix updating DW_AT_stmt_list for DWARF5 TUs (#79374)
Changed so that we also update DW_AT_stmt_list for DWARF5 TUs. BOLT was
doing it for DWARF4, but it wasn't doing it for DWARF5.
Commit: e9355b1b3e36616bb86575270ff3a4664d2cf4f7
https://github.com/llvm/llvm-project/commit/e9355b1b3e36616bb86575270ff3a4664d2cf4f7
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M libc/include/llvm-libc-macros/limits-macros.h
Log Message:
-----------
[libc] Use __SIZEOF_LONG__ to define LONG_WIDTH instead of sizeof(long). (#79391)
The standard requires `limits.h` constants to be used in preprocessors.
So we use `__SIZEOF_LONG__` instead of `sizeof(long)` to define
`LONG_WIDTH`. The macro `__SIZEOF_LONG__` seems to be available on both
clang and gcc since at least version 9.
Commit: 7386aa02efafc260ad8b2d0c9ca19d39e16cfd07
https://github.com/llvm/llvm-project/commit/7386aa02efafc260ad8b2d0c9ca19d39e16cfd07
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
A llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
Log Message:
-----------
[RISCV] Add test coverage for shuffle index > i8 cornercase
Triggered by discussion on https://github.com/llvm/llvm-project/pull/79330. In the process of writing this, realized one of my recent refactorings appears to have broken the legalization for the single source case here. Fix to follow in separate patch.
Commit: 795090739cf3b295be750dfba0af2ba993e60cdd
https://github.com/llvm/llvm-project/commit/795090739cf3b295be750dfba0af2ba993e60cdd
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
Log Message:
-----------
[RISCV] Fix a bug accidentally introduced in e9311f9
If we're lowering an e8 m8 shuffle and we have an index value greater than
255, we have no available space to generate an e16 index vector. The
code had originally handled this correctly, but in a recent refactoring
I had moved the single source code above the check, and thus broke the
single source by accident.
I have a change on review to rework this (https://github.com/llvm/llvm-project/pull/79330), but for now, go with the most obvious fix.
Commit: b7f986d987edd50f8b16ae90d38358b01f0272ac
https://github.com/llvm/llvm-project/commit/b7f986d987edd50f8b16ae90d38358b01f0272ac
Author: Ben Shi <2283975856 at qq.com>
Date: 2024-01-25 (Thu, 25 Jan 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/test/Analysis/errno-stdlibraryfunctions.c
Log Message:
-----------
[clang][analyzer] Improve modeling of 'execv' and 'execvp' in StdLibraryFunctionsChecker (#78930)
These functions always return -1 and set 'errno'.
Commit: c52f753bd79dd617ac0679ae58638ea268b62392
https://github.com/llvm/llvm-project/commit/c52f753bd79dd617ac0679ae58638ea268b62392
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M .ci/generate-buildkite-pipeline-premerge
R .ci/generate-buildkite-pipeline-scheduled
M .github/workflows/issue-release-workflow.yml
M bolt/include/bolt/Rewrite/DWARFRewriter.h
M bolt/lib/Rewrite/DWARFRewriter.cpp
A bolt/test/X86/Inputs/dwarf4-debug-line-offset-change-after-bolt-helper.s
A bolt/test/X86/Inputs/dwarf4-debug-line-offset-change-after-bolt-main.s
A bolt/test/X86/Inputs/dwarf5-debug-line-offset-change-after-bolt-main.s
A bolt/test/X86/dwarf-debug-line-stmt-list-offset-change.test
M clang-tools-extra/clangd/xpc/cmake/modules/CreateClangdXPCFramework.cmake
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/include-cleaner/test/tool.cpp
M clang-tools-extra/include-cleaner/tool/IncludeCleaner.cpp
M clang/docs/ReleaseNotes.rst
M clang/docs/ShadowCallStack.rst
M clang/docs/StandardCPlusPlusModules.rst
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/Builtins.def
M clang/include/clang/Basic/Builtins.h
A clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
R clang/include/clang/Basic/BuiltinsBPF.def
A clang/include/clang/Basic/BuiltinsBPF.td
A clang/include/clang/Basic/BuiltinsBase.td
M clang/include/clang/Basic/CMakeLists.txt
M clang/include/clang/Basic/CharInfo.h
M clang/include/clang/Basic/DirectoryEntry.h
M clang/include/clang/Basic/FileEntry.h
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Basic/TargetBuiltins.h
M clang/include/clang/Parse/Parser.h
M clang/include/module.modulemap
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.cpp
M clang/lib/AST/Interp/ByteCodeExprGen.h
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/lib/Basic/Builtins.cpp
M clang/lib/Basic/FileManager.cpp
M clang/lib/Basic/Targets/BPF.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/OpenCLBuiltins.td
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaCoroutine.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
M clang/test/AST/ast-dump-coroutine.cpp
M clang/test/AST/ast-dump-using.cpp
M clang/test/Analysis/bstring.c
M clang/test/Analysis/errno-stdlibraryfunctions.c
M clang/test/CXX/drs/dr14xx.cpp
M clang/test/CXX/drs/dr21xx.cpp
M clang/test/CXX/drs/dr23xx.cpp
M clang/test/CodeGen/LoongArch/lasx/builtin-error.c
M clang/test/CodeGen/LoongArch/lsx/builtin-error.c
M clang/test/CodeGen/PowerPC/builtins-ppc-pair-mma.c
M clang/test/CodeGen/aarch64-ls64-inline-asm.c
M clang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/attr-riscv-rvv-vector-bits-bitcast.c
M clang/test/CodeGen/builtins.c
M clang/test/CodeGen/callback_pthread_create.c
M clang/test/CodeGen/cleanup-destslot-simple.c
M clang/test/CodeGen/hexagon-brev-ld-ptr-incdec.c
M clang/test/CodeGen/ms-intrinsics.c
M clang/test/CodeGen/nofpclass.c
M clang/test/CodeGen/union-tbaa1.c
M clang/test/CodeGenCXX/RelativeVTablesABI/dynamic-cast.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/type-info.cpp
M clang/test/CodeGenCXX/microsoft-abi-dynamic-cast.cpp
M clang/test/CodeGenCXX/microsoft-abi-typeid.cpp
M clang/test/CodeGenObjC/arc-foreach.m
M clang/test/CodeGenObjCXX/arc-cxx11-init-list.mm
M clang/test/CodeGenOpenCL/amdgpu-features.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-fp8.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w32.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-wmma-w64.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w32.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-swmmac-w64.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32-gfx10-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w32.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-wmma-w64.cl
M clang/test/Driver/linker-wrapper-image.c
M clang/test/Driver/linker-wrapper.c
M clang/test/Driver/riscv-cpus.c
A clang/test/Driver/unsupported-option-gpu.c
M clang/test/Headers/__clang_hip_math.hip
A clang/test/Interpreter/cxx20-modules.cppm
M clang/test/Misc/target-invalid-cpu-note.c
A clang/test/Modules/pr73023.cpp
M clang/test/OpenMP/bug57757.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/ParserOpenACC/parse-clauses.cpp
M clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-linker-wrapper/LinkerWrapperOpts.td
M clang/tools/clang-repl/CMakeLists.txt
M clang/unittests/Basic/FileManagerTest.cpp
M clang/utils/TableGen/CMakeLists.txt
A clang/utils/TableGen/ClangBuiltinsEmitter.cpp
M clang/utils/TableGen/MveEmitter.cpp
M clang/utils/TableGen/TableGen.cpp
M clang/utils/TableGen/TableGenBackends.h
M clang/www/cxx_dr_status.html
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
R compiler-rt/test/sanitizer_common/TestCases/FreeBSD/hexdump.cc
A cross-project-tests/amdgpu/builtins-amdgcn-gfx12-wmma-w32.cl
A cross-project-tests/amdgpu/builtins-amdgcn-gfx12-wmma-w64.cl
A cross-project-tests/amdgpu/builtins-amdgcn-swmmac-w32.cl
A cross-project-tests/amdgpu/builtins-amdgcn-swmmac-w64.cl
R flang/include/flang/Optimizer/Builder/Array.h
M flang/include/flang/Optimizer/Builder/BoxValue.h
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/DirectivesCommon.h
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP.cpp
M flang/lib/Optimizer/Builder/BoxValue.cpp
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Transforms/ArrayValueCopy.cpp
M flang/test/HLFIR/no-block-merging.fir
A flang/test/Lower/HLFIR/assumed-size-cray-pointee.f90
M flang/test/Lower/HLFIR/cray-pointers.f90
M flang/test/Lower/Intrinsics/lbound.f90
M flang/test/Lower/Intrinsics/ubound.f90
M flang/test/Lower/OpenACC/acc-loop.f90
M flang/test/Lower/array-expression-assumed-size.f90
M flang/test/Lower/cray-pointer.f90
M libc/cmake/modules/LLVMLibCLibraryRules.cmake
M libc/cmake/modules/LLVMLibCObjectRules.cmake
M libc/cmake/modules/LLVMLibCTestRules.cmake
M libc/config/darwin/arm/headers.txt
M libc/config/darwin/x86_64/headers.txt
M libc/config/gpu/headers.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/aarch64/headers.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/riscv/headers.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/headers.txt
M libc/docs/math/index.rst
M libc/include/CMakeLists.txt
A libc/include/limits.h.def
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/float-macros.h
A libc/include/llvm-libc-macros/limits-macros.h
M libc/spec/linux.td
M libc/spec/spec.td
M libc/spec/stdc.td
M libc/src/__support/CMakeLists.txt
M libc/src/__support/CPP/CMakeLists.txt
M libc/src/__support/CPP/limits.h
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/ManipulationFunctions.h
M libc/src/__support/HashTable/table.h
M libc/src/__support/math_extras.h
M libc/src/__support/str_to_integer.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/callonce.cpp
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/sqrtf128.cpp
A libc/src/math/sqrtf128.h
M libc/src/sys/mman/CMakeLists.txt
M libc/src/sys/mman/linux/CMakeLists.txt
A libc/src/sys/mman/linux/mincore.cpp
A libc/src/sys/mman/mincore.h
M libc/src/time/CMakeLists.txt
M libc/src/time/mktime.cpp
M libc/src/time/time_utils.cpp
M libc/startup/linux/do_start.cpp
M libc/test/src/math/CMakeLists.txt
M libc/test/src/math/ILogbTest.h
M libc/test/src/math/LdExpTest.h
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/ILogbTest.h
M libc/test/src/math/smoke/LdExpTest.h
A libc/test/src/math/smoke/generic_sqrtf128_test.cpp
A libc/test/src/math/smoke/sqrtf128_test.cpp
M libc/test/src/stdlib/AtoiTest.h
M libc/test/src/stdlib/CMakeLists.txt
M libc/test/src/stdlib/StrtolTest.h
M libc/test/src/stdlib/atof_test.cpp
M libc/test/src/stdlib/strtod_test.cpp
M libc/test/src/stdlib/strtof_test.cpp
M libc/test/src/stdlib/strtold_test.cpp
M libc/test/src/sys/mman/linux/CMakeLists.txt
A libc/test/src/sys/mman/linux/mincore_test.cpp
M libc/test/src/time/CMakeLists.txt
M libc/test/src/time/clock_test.cpp
M libc/test/src/time/gmtime_test.cpp
M libc/test/src/time/mktime_test.cpp
M libc/test/src/time/time_test.cpp
M libcxx/docs/ReleaseNotes/18.rst
M libcxx/docs/index.rst
M libcxx/include/__algorithm/ranges_max.h
M libcxx/include/__algorithm/ranges_min.h
M libcxx/include/__config
M libcxx/include/string
M libcxx/test/libcxx/strings/basic.string/string.capacity/allocation_size.pass.cpp
M libcxx/test/libcxx/strings/basic.string/string.capacity/max_size.pass.cpp
M libcxx/test/std/strings/basic.string/string.capacity/max_size.pass.cpp
M libcxx/test/std/utilities/utility/pairs/pairs.pair/ctor.pair_U_V_move.pass.cpp
M libunwind/docs/index.rst
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/Relocations.cpp
M lld/docs/ReleaseNotes.rst
M lld/test/ELF/dead-reloc-in-nonalloc.s
M lld/test/ELF/riscv-tlsdesc-relax.s
M lld/test/wasm/signature-mismatch.s
M lldb/include/lldb/Breakpoint/WatchpointResource.h
R lldb/include/lldb/Breakpoint/WatchpointResourceList.h
M lldb/source/Breakpoint/CMakeLists.txt
M lldb/source/Breakpoint/WatchpointResource.cpp
R lldb/source/Breakpoint/WatchpointResourceList.cpp
M lldb/source/Core/ValueObject.cpp
M llvm/CMakeLists.txt
M llvm/docs/ReleaseNotes.rst
M llvm/docs/TableGen/BackEnds.rst
M llvm/include/llvm/Analysis/BranchProbabilityInfo.h
M llvm/include/llvm/Analysis/Loads.h
R llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
R llvm/include/llvm/CodeGen/MachinePassRegistry.def
M llvm/include/llvm/CodeGen/TargetPassConfig.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFAcceleratorTable.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
A llvm/include/llvm/Passes/CodeGenPassBuilder.h
A llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Support/VirtualFileSystem.h
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
M llvm/include/module.modulemap
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/MemorySSAUpdater.cpp
M llvm/lib/CodeGen/CMakeLists.txt
R llvm/lib/CodeGen/CodeGenPassBuilder.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp
M llvm/lib/DebugInfo/DWARF/DWARFFormValue.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/Passes/CMakeLists.txt
A llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Support/BLAKE3/blake3_avx2_x86-64_unix.S
M llvm/lib/Support/BLAKE3/blake3_avx512_x86-64_unix.S
M llvm/lib/Support/BLAKE3/blake3_sse2_x86-64_unix.S
M llvm/lib/Support/BLAKE3/blake3_sse41_x86-64_unix.S
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/Support/raw_ostream.cpp
M llvm/lib/Support/raw_socket_stream.cpp
M llvm/lib/TableGen/JSONBackend.cpp
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUGISel.td
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUImageIntrinsicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/AMDGPU/SIDefines.h
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrFormats.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
M llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.h
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/X86/CMakeLists.txt
A llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86FixupVectorConstants.cpp
M llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86TargetMachine.h
M llvm/lib/TargetParser/TargetParser.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Analysis/BasicAA/featuretest.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-reverse.ll
M llvm/test/Analysis/LoopAccessAnalysis/noalias-scope-decl.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-imm.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-iu-modifiers.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-iu-modifiers.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
A llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/ipra.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
A llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
A llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
R llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/spill-sgpr-csr-live-ins.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-to-virtual-vgpr.mir
M llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
M llvm/test/CodeGen/AMDGPU/vgpr-large-tuple-alloc-error.ll
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-imm.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-iu-modifiers.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-swmmac-index_key.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-imm.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-iu-modifiers.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-swmmac-index_key.ll
A llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64.ll
A llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx12-w32.mir
A llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx12-w64.mir
M llvm/test/CodeGen/AMDGPU/wmma-hazards.mir
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/BPF/preserve-static-offset/load-inline.ll
M llvm/test/CodeGen/BPF/preserve-static-offset/load-unroll-inline.ll
M llvm/test/CodeGen/BPF/preserve-static-offset/load-unroll.ll
M llvm/test/CodeGen/BPF/preserve-static-offset/store-unroll-inline.ll
M llvm/test/CodeGen/Hexagon/autohvx/vector-align-tbaa.ll
A llvm/test/CodeGen/Hexagon/inline-division-space.ll
A llvm/test/CodeGen/Hexagon/inline-division.ll
A llvm/test/CodeGen/NVPTX/global-incomplete-init.ll
M llvm/test/CodeGen/NVPTX/globals_init.ll
M llvm/test/CodeGen/NVPTX/i128-global.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-args.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-ret.ll
M llvm/test/CodeGen/RISCV/pr69586.ll
A llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-exact-vlen.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-transpose.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
M llvm/test/CodeGen/SystemZ/loop-01.ll
M llvm/test/CodeGen/SystemZ/zos-ppa2.ll
M llvm/test/CodeGen/X86/2011-20-21-zext-ui2fp.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/CodeGen/X86/apx/adc.ll
M llvm/test/CodeGen/X86/apx/mul-i1024.ll
A llvm/test/CodeGen/X86/apx/optimize-compare.mir
M llvm/test/CodeGen/X86/apx/sbb.ll
A llvm/test/CodeGen/X86/apx/shift-eflags.ll
M llvm/test/CodeGen/X86/apx/sub.ll
M llvm/test/CodeGen/X86/avx-load-store.ll
M llvm/test/CodeGen/X86/avx2-arith.ll
M llvm/test/CodeGen/X86/avx512-shuffles/shuffle-chained-bf16.ll
M llvm/test/CodeGen/X86/bitreverse.ll
M llvm/test/CodeGen/X86/combine-srl.ll
M llvm/test/CodeGen/X86/combine-subo.ll
M llvm/test/CodeGen/X86/commute-blend-avx2.ll
M llvm/test/CodeGen/X86/constant-pool-sharing.ll
M llvm/test/CodeGen/X86/dpbusd.ll
M llvm/test/CodeGen/X86/dpbusd_const.ll
A llvm/test/CodeGen/X86/dwarf-headers.o
M llvm/test/CodeGen/X86/expand-vp-cast-intrinsics.ll
M llvm/test/CodeGen/X86/fcmp-constant.ll
M llvm/test/CodeGen/X86/fold-vector-sext-zext.ll
M llvm/test/CodeGen/X86/half.ll
A llvm/test/CodeGen/X86/icmp-pow2-mask.ll
M llvm/test/CodeGen/X86/insert-into-constant-vector.ll
M llvm/test/CodeGen/X86/insertelement-ones.ll
M llvm/test/CodeGen/X86/masked_gather_scatter_widen.ll
M llvm/test/CodeGen/X86/masked_store_trunc.ll
M llvm/test/CodeGen/X86/memcmp-more-load-pairs.ll
M llvm/test/CodeGen/X86/memcmp.ll
M llvm/test/CodeGen/X86/pmaddubsw.ll
M llvm/test/CodeGen/X86/pr46532.ll
M llvm/test/CodeGen/X86/pr63108.ll
M llvm/test/CodeGen/X86/pr74736.ll
M llvm/test/CodeGen/X86/prefer-avx256-lzcnt.ll
M llvm/test/CodeGen/X86/pshufb-mask-comments.ll
M llvm/test/CodeGen/X86/ret-mmx.ll
M llvm/test/CodeGen/X86/sad.ll
M llvm/test/CodeGen/X86/sext-vsetcc.ll
M llvm/test/CodeGen/X86/shrink_vmul.ll
M llvm/test/CodeGen/X86/shuffle-half.ll
M llvm/test/CodeGen/X86/shuffle-strided-with-offset-256.ll
M llvm/test/CodeGen/X86/shuffle-vs-trunc-256.ll
M llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll
M llvm/test/CodeGen/X86/vec_anyext.ll
M llvm/test/CodeGen/X86/vec_fp_to_int.ll
M llvm/test/CodeGen/X86/vec_set-A.ll
M llvm/test/CodeGen/X86/vector-blend.ll
M llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/X86/vector-fshl-128.ll
M llvm/test/CodeGen/X86/vector-fshl-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshl-rot-sub128.ll
M llvm/test/CodeGen/X86/vector-fshl-sub128.ll
M llvm/test/CodeGen/X86/vector-fshr-128.ll
M llvm/test/CodeGen/X86/vector-fshr-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
M llvm/test/CodeGen/X86/vector-fshr-rot-sub128.ll
M llvm/test/CodeGen/X86/vector-fshr-sub128.ll
M llvm/test/CodeGen/X86/vector-half-conversions.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-lzcnt-128.ll
M llvm/test/CodeGen/X86/vector-lzcnt-256.ll
M llvm/test/CodeGen/X86/vector-mulfix-legalize.ll
M llvm/test/CodeGen/X86/vector-reduce-add-mask.ll
M llvm/test/CodeGen/X86/vector-rotate-128.ll
M llvm/test/CodeGen/X86/vector-rotate-256.ll
M llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
M llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
M llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll
M llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
M llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining.ll
M llvm/test/CodeGen/X86/vector-shuffle-v1.ll
M llvm/test/CodeGen/X86/vector-trunc.ll
M llvm/test/CodeGen/X86/vector-tzcnt-128.ll
M llvm/test/CodeGen/X86/vselect-constants.ll
M llvm/test/CodeGen/X86/vselect-post-combine.ll
M llvm/test/CodeGen/X86/widen_bitcnt.ll
M llvm/test/CodeGen/X86/x86-interleaved-access.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast_from_memory.ll
M llvm/test/DebugInfo/Generic/debug-names-one-cu.ll
M llvm/test/DebugInfo/LoongArch/dwarf-loongarch-relocs.ll
M llvm/test/DebugInfo/X86/debug-names-dwarf64.ll
M llvm/test/DebugInfo/X86/debug-names-parents-same-offset.ll
M llvm/test/DebugInfo/X86/debug-names-types.ll
M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
M llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
M llvm/test/Instrumentation/MemorySanitizer/msan_asm_conservative.ll
M llvm/test/MC/AArch64/armv8.1a-rdma.s
M llvm/test/MC/AArch64/armv8.2a-dotprod-errors.s
M llvm/test/MC/AArch64/armv8.2a-dotprod.s
M llvm/test/MC/AArch64/armv8r-sysreg.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp8.s
A llvm/test/MC/AMDGPU/gfx12_asm_wmma_w32.s
A llvm/test/MC/AMDGPU/gfx12_asm_wmma_w64.s
M llvm/test/MC/Disassembler/AArch64/armv8.3a-complex.txt
M llvm/test/MC/Disassembler/AArch64/armv8.3a-js.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp8.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_wmma_w32.txt
A llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_wmma_w64.txt
R llvm/test/MC/RISCV/rv32a-invalid.s
R llvm/test/MC/RISCV/rv32a-valid.s
A llvm/test/MC/RISCV/rv32zaamo-invalid.s
A llvm/test/MC/RISCV/rv32zaamo-valid.s
A llvm/test/MC/RISCV/rv32zalrsc-invalid.s
A llvm/test/MC/RISCV/rv32zalrsc-valid.s
R llvm/test/MC/RISCV/rv64a-invalid.s
R llvm/test/MC/RISCV/rv64a-valid.s
A llvm/test/MC/RISCV/rv64zaamo-invalid.s
A llvm/test/MC/RISCV/rv64zaamo-valid.s
A llvm/test/MC/RISCV/rv64zalrsc-invalid.s
A llvm/test/MC/RISCV/rv64zalrsc-valid.s
A llvm/test/TableGen/JSON-locs.td
M llvm/test/TableGen/JSON.td
M llvm/test/Transforms/Attributor/ArgumentPromotion/alignment.ll
M llvm/test/Transforms/ConstraintElimination/minmax.ll
A llvm/test/Transforms/ConstraintElimination/umin-result-may-be-poison.ll
M llvm/test/Transforms/Coroutines/coro-async.ll
M llvm/test/Transforms/Coroutines/coro-retcon-alloca-opaque-ptr.ll
M llvm/test/Transforms/Coroutines/coro-retcon-alloca.ll
M llvm/test/Transforms/Coroutines/coro-retcon-once-value.ll
M llvm/test/Transforms/Coroutines/coro-retcon-resume-values.ll
M llvm/test/Transforms/Coroutines/coro-swifterror.ll
M llvm/test/Transforms/InstCombine/2007-03-25-BadShiftMask.ll
M llvm/test/Transforms/InstCombine/2009-01-08-AlignAlloca.ll
M llvm/test/Transforms/InstCombine/2009-02-20-InstCombine-SROA.ll
M llvm/test/Transforms/InstCombine/X86/x86-addsub-inseltpoison.ll
M llvm/test/Transforms/InstCombine/X86/x86-addsub.ll
M llvm/test/Transforms/InstCombine/add3.ll
M llvm/test/Transforms/InstCombine/array.ll
M llvm/test/Transforms/InstCombine/assume.ll
M llvm/test/Transforms/InstCombine/cast_phi.ll
M llvm/test/Transforms/InstCombine/catchswitch-phi.ll
M llvm/test/Transforms/InstCombine/compare-alloca.ll
M llvm/test/Transforms/InstCombine/extractvalue.ll
M llvm/test/Transforms/InstCombine/gep-addrspace.ll
M llvm/test/Transforms/InstCombine/gep-canonicalize-constant-indices.ll
M llvm/test/Transforms/InstCombine/gep-combine-loop-invariant.ll
M llvm/test/Transforms/InstCombine/gep-custom-dl.ll
M llvm/test/Transforms/InstCombine/gep-merge-constant-indices.ll
M llvm/test/Transforms/InstCombine/gep-vector-indices.ll
M llvm/test/Transforms/InstCombine/gep-vector.ll
M llvm/test/Transforms/InstCombine/gepphigep.ll
M llvm/test/Transforms/InstCombine/getelementptr.ll
M llvm/test/Transforms/InstCombine/icmp-custom-dl.ll
M llvm/test/Transforms/InstCombine/icmp-gep.ll
M llvm/test/Transforms/InstCombine/indexed-gep-compares.ll
M llvm/test/Transforms/InstCombine/intptr1.ll
M llvm/test/Transforms/InstCombine/intptr2.ll
M llvm/test/Transforms/InstCombine/intptr3.ll
M llvm/test/Transforms/InstCombine/intptr4.ll
M llvm/test/Transforms/InstCombine/intptr5.ll
M llvm/test/Transforms/InstCombine/intptr7.ll
M llvm/test/Transforms/InstCombine/load-store-forward.ll
M llvm/test/Transforms/InstCombine/load.ll
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
M llvm/test/Transforms/InstCombine/memchr-5.ll
M llvm/test/Transforms/InstCombine/memchr-9.ll
M llvm/test/Transforms/InstCombine/memcmp-3.ll
M llvm/test/Transforms/InstCombine/memcmp-4.ll
M llvm/test/Transforms/InstCombine/memcmp-5.ll
M llvm/test/Transforms/InstCombine/memcmp-6.ll
M llvm/test/Transforms/InstCombine/memcmp-7.ll
M llvm/test/Transforms/InstCombine/memcpy_alloca.ll
M llvm/test/Transforms/InstCombine/memrchr-5.ll
M llvm/test/Transforms/InstCombine/memset2.ll
M llvm/test/Transforms/InstCombine/multi-size-address-space-pointer.ll
M llvm/test/Transforms/InstCombine/non-integral-pointers.ll
M llvm/test/Transforms/InstCombine/opaque-ptr.ll
M llvm/test/Transforms/InstCombine/phi-equal-incoming-pointers.ll
M llvm/test/Transforms/InstCombine/phi-timeout.ll
M llvm/test/Transforms/InstCombine/phi.ll
M llvm/test/Transforms/InstCombine/pr39908.ll
M llvm/test/Transforms/InstCombine/pr44242.ll
M llvm/test/Transforms/InstCombine/pr58901.ll
M llvm/test/Transforms/InstCombine/ptr-replace-alloca.ll
M llvm/test/Transforms/InstCombine/select-cmp-br.ll
M llvm/test/Transforms/InstCombine/select-gep.ll
M llvm/test/Transforms/InstCombine/shift.ll
M llvm/test/Transforms/InstCombine/sink_sideeffecting_instruction.ll
M llvm/test/Transforms/InstCombine/sprintf-2.ll
M llvm/test/Transforms/InstCombine/statepoint-cleanup.ll
M llvm/test/Transforms/InstCombine/str-int-3.ll
M llvm/test/Transforms/InstCombine/str-int-4.ll
M llvm/test/Transforms/InstCombine/str-int-5.ll
M llvm/test/Transforms/InstCombine/str-int.ll
M llvm/test/Transforms/InstCombine/strcall-bad-sig.ll
M llvm/test/Transforms/InstCombine/strcall-no-nul.ll
M llvm/test/Transforms/InstCombine/strlen-7.ll
M llvm/test/Transforms/InstCombine/strlen-9.ll
M llvm/test/Transforms/InstCombine/strncmp-4.ll
M llvm/test/Transforms/InstCombine/strncmp-5.ll
M llvm/test/Transforms/InstCombine/strncmp-6.ll
M llvm/test/Transforms/InstCombine/sub.ll
M llvm/test/Transforms/InstCombine/unpack-fca.ll
M llvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_demanded_elts.ll
M llvm/test/Transforms/InstCombine/vec_gep_scalar_arg-inseltpoison.ll
M llvm/test/Transforms/InstCombine/vec_gep_scalar_arg.ll
M llvm/test/Transforms/InstCombine/vscale_gep.ll
M llvm/test/Transforms/InstCombine/wcslen-5.ll
A llvm/test/Transforms/JumpThreading/pr79175.ll
M llvm/test/Transforms/LoopUnroll/ARM/upperbound.ll
M llvm/test/Transforms/LoopUnroll/peel-loop.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/packed-math.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-qabs.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
M llvm/test/Transforms/LoopVectorize/X86/float-induction-x86.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll
M llvm/test/Transforms/LoopVectorize/X86/pr23997.ll
M llvm/test/Transforms/LoopVectorize/X86/small-size.ll
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/extract-last-veclane.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
M llvm/test/Transforms/LoopVectorize/scalar_after_vectorization.ll
M llvm/test/Transforms/LoopVectorize/vector-geps.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-dominance.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-loops.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-multiple-blocks.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/multiply-minimal.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/peel-multiple-unreachable-exits-for-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/quant_4x4.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/sinking-vs-if-conversion.ll
M llvm/test/Transforms/PhaseOrdering/ARM/arm_mult_q15.ll
M llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll
M llvm/test/Transforms/PhaseOrdering/X86/hoist-load-of-baseptr.ll
A llvm/test/Transforms/PhaseOrdering/X86/loop-vectorizer-noalias.ll
M llvm/test/Transforms/PhaseOrdering/X86/pixel-splat.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr50555.ll
M llvm/test/Transforms/PhaseOrdering/X86/speculation-vs-tbaa.ll
M llvm/test/Transforms/PhaseOrdering/X86/spurious-peeling.ll
M llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
M llvm/test/Transforms/PhaseOrdering/X86/vec-shift.ll
M llvm/test/Transforms/PhaseOrdering/basic.ll
M llvm/test/Transforms/PhaseOrdering/loop-access-checks.ll
M llvm/test/Transforms/PhaseOrdering/pr39282.ll
M llvm/test/Transforms/PhaseOrdering/simplifycfg-options.ll
M llvm/test/Transforms/PhaseOrdering/switch_with_geps.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-cost.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-reduce.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/WebAssembly/no-vectorize-rotate.ll
M llvm/test/Transforms/SLPVectorizer/X86/extract-subvector-long-input.ll
A llvm/test/Transforms/SLPVectorizer/X86/extractelement-single-use-many-nodes.ll
M llvm/test/Transforms/SLPVectorizer/X86/operandorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/opt.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr46983.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-instcombine.ll
M llvm/test/Transforms/SimpleLoopUnswitch/memssa-readnone-access.ll
M llvm/test/Transforms/SimplifyCFG/UnreachableEliminate.ll
A llvm/test/Transforms/SimplifyCFG/unreachable-eliminate-on-ret.ll
M llvm/test/Transforms/Util/strip-gc-relocates.ll
M llvm/test/tools/dsymutil/ARM/accel-imported-declarations.test
A llvm/test/tools/llc/new-pm/lit.local.cfg
A llvm/test/tools/llc/new-pm/option-conflict.ll
A llvm/test/tools/llc/new-pm/pipeline.ll
A llvm/test/tools/llc/new-pm/start-stop.ll
M llvm/test/tools/llvm-objcopy/ELF/strip-all.test
M llvm/test/tools/llvm-objdump/X86/elf-bbaddrmap-disassemble-symbolize-operands.yaml
M llvm/test/tools/llvm-objdump/X86/elf-bbaddrmap-symbolize-relocatable.yaml
M llvm/test/tools/llvm-objdump/X86/elf-pgoanalysismap.yaml
M llvm/test/tools/llvm-readobj/ELF/bb-addr-map-relocatable.test
M llvm/test/tools/llvm-readobj/ELF/bb-addr-map.test
M llvm/test/tools/obj2yaml/ELF/bb-addr-map.yaml
M llvm/test/tools/yaml2obj/ELF/bb-addr-map.yaml
M llvm/tools/llc/CMakeLists.txt
A llvm/tools/llc/NewPMDriver.cpp
A llvm/tools/llc/NewPMDriver.h
M llvm/tools/llc/llc.cpp
M llvm/tools/opt/CMakeLists.txt
M llvm/tools/opt/NewPMDriver.cpp
M llvm/tools/opt/NewPMDriver.h
M llvm/tools/opt/opt.cpp
A llvm/tools/opt/optdriver.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
R llvm/unittests/CodeGen/CodeGenPassBuilderTest.cpp
M llvm/unittests/CodeGen/SchedBoundary.cpp
M llvm/unittests/Object/ELFObjectFileTest.cpp
M llvm/unittests/Support/VirtualFileSystemTest.cpp
M llvm/utils/git/github-automation.py
M llvm/utils/gn/secondary/clang/include/clang/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
M llvm/utils/gn/secondary/clang/utils/TableGen/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Breakpoint/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Passes/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llc/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/opt/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/version.gni
M llvm/utils/lit/lit/__init__.py
M mlir/include/mlir/Dialect/Affine/Analysis/Utils.h
M mlir/include/mlir/Dialect/Affine/LoopFusionUtils.h
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/lib/Dialect/Affine/Utils/LoopFusionUtils.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.h
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorLevel.cpp
M mlir/lib/Dialect/SparseTensor/Transforms/Utils/SparseTensorLevel.h
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Dialect/SparseTensor/dense.mlir
M mlir/test/Dialect/SparseTensor/sorted_coo.mlir
M mlir/test/Dialect/SparseTensor/sparse_2d.mlir
M mlir/test/Dialect/SparseTensor/sparse_3d.mlir
M mlir/test/Dialect/SparseTensor/sparse_affine.mlir
M mlir/test/Dialect/SparseTensor/sparse_conv_2d_slice_based.mlir
M mlir/test/Dialect/SparseTensor/sparse_foreach.mlir
M mlir/test/Dialect/SparseTensor/sparse_index.mlir
M mlir/test/Dialect/SparseTensor/sparse_nd.mlir
M mlir/test/Dialect/SparseTensor/sparse_perm.mlir
M mlir/test/Dialect/SparseTensor/sparse_perm_lower.mlir
M mlir/test/Dialect/SparseTensor/sparse_vector_mv.mlir
M mlir/test/Dialect/SparseTensor/spy_sddmm_bsr.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/IR/properties.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
M openmp/docs/ReleaseNotes.rst
M openmp/libomptarget/test/offloading/fortran/target_map_common_block1.f90
M pstl/docs/ReleaseNotes.rst
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
supported interleaved unrelated insn
Created using spr 1.3.4
Compare: https://github.com/llvm/llvm-project/compare/3725fa4eac3d...c52f753bd79d
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