[all-commits] [llvm/llvm-project] 7e50f0: [NewPM][CodeGen][llc] Add NPM support (#70922)
Fangrui Song via All-commits
all-commits at lists.llvm.org
Wed Jan 24 00:35:18 PST 2024
Branch: refs/heads/users/MaskRay/spr/elf-dont-resolve-relocations-referencing-shn_abs-to-tombstone-in-non-shf_alloc-sections
Home: https://github.com/llvm/llvm-project
Commit: 7e50f006f7f652b9a5ac5ddd64deba5f1c9388a8
https://github.com/llvm/llvm-project/commit/7e50f006f7f652b9a5ac5ddd64deba5f1c9388a8
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
M llvm/include/llvm/CodeGen/TargetPassConfig.h
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Target/X86/CMakeLists.txt
A llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86TargetMachine.h
A llvm/test/tools/llc/new-pm/lit.local.cfg
A llvm/test/tools/llc/new-pm/option-conflict.ll
A llvm/test/tools/llc/new-pm/pipeline.ll
A llvm/test/tools/llc/new-pm/start-stop.ll
M llvm/tools/llc/CMakeLists.txt
A llvm/tools/llc/NewPMDriver.cpp
A llvm/tools/llc/NewPMDriver.h
M llvm/tools/llc/llc.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
R llvm/unittests/CodeGen/CodeGenPassBuilderTest.cpp
Log Message:
-----------
[NewPM][CodeGen][llc] Add NPM support (#70922)
Add new pass manager support to `llc`. Users can use
`--passes=pass1,pass2...` to run mir passes, and use `--enable-new-pm`
to run default codegen pipeline.
This patch is taken from [D83612](https://reviews.llvm.org/D83612), the
original author is @yuanfang-chen.
---------
Co-authored-by: Yuanfang Chen <455423+yuanfang-chen at users.noreply.github.com>
Commit: 230c13d59d0843c3b738920b85c341cc78a61fa9
https://github.com/llvm/llvm-project/commit/230c13d59d0843c3b738920b85c341cc78a61fa9
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/ipra.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/spill-sgpr-csr-live-ins.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-to-virtual-vgpr.mir
M llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/vgpr-large-tuple-alloc-error.ll
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
Log Message:
-----------
[AMDGPU] Pick available high VGPR for CSR SGPR spilling (#78669)
CSR SGPR spilling currently uses the early available physical VGPRs. It
currently imposes a high register pressure while trying to allocate
large VGPR tuples within the default register budget.
This patch changes the spilling strategy by picking the VGPRs in the
reverse order, the highest available VGPR first and later after regalloc
shift them back to the lowest available range. With that, the initial
VGPRs would be available for allocation and possibility
of finding large number of contiguous registers will be more.
Commit: 3dea0aa8f4607888d0c32cd7a691d8090b1b73c7
https://github.com/llvm/llvm-project/commit/3dea0aa8f4607888d0c32cd7a691d8090b1b73c7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-01-23 (Tue, 23 Jan 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Log Message:
-----------
[LSR] Fix incorrect comment. NFC (#79207)
Commit: ecde13b1a861696dec5c4ccae792abe25df07db9
https://github.com/llvm/llvm-project/commit/ecde13b1a861696dec5c4ccae792abe25df07db9
Author: Nico Weber <thakis at chromium.org>
Date: 2024-01-23 (Tue, 23 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llc/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
Log Message:
-----------
[gn build] port 7e50f006f7f6
Commit: f0c387038854d61a632520a4073d1b6ebf4997ed
https://github.com/llvm/llvm-project/commit/f0c387038854d61a632520a4073d1b6ebf4997ed
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/lib/Lex/HeaderSearch.cpp
A clang/test/Modules/pr73023.cpp
Log Message:
-----------
[Modules] [HeaderSearch] Don't reenter headers if it is pragma once (#76119)
Close https://github.com/llvm/llvm-project/issues/73023
The direct issue of https://github.com/llvm/llvm-project/issues/73023 is
that we entered a header which is marked as pragma once since the
compiler think it is OK if there is controlling macro.
It doesn't make sense. I feel like it should be sufficient to skip it
after we see the '#pragma once'.
>From the context, it looks like the workaround is primarily for
ObjectiveC. So we might need reviewers from OC.
Commit: 7bda0ce15a2874ad74fb1a451a174084094ccc34
https://github.com/llvm/llvm-project/commit/7bda0ce15a2874ad74fb1a451a174084094ccc34
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/tools/llc/llc.cpp
Log Message:
-----------
[llc] Remove C backend support (#79237)
C backend is removed in 3.1.
Commit: 63f742c15f01a25c60f0090a3aceb15bb8985e5e
https://github.com/llvm/llvm-project/commit/63f742c15f01a25c60f0090a3aceb15bb8985e5e
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-01-23 (Tue, 23 Jan 2024)
Changed paths:
M clang/test/Driver/riscv-cpus.c
M clang/test/Misc/target-invalid-cpu-note.c
M llvm/docs/ReleaseNotes.rst
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add sifive-p670 processor (#79015)
This is an OOO core that has a vector unit. For more information see
https://www.sifive.com/cores/performance-p650-670.
Scheduler model and other tuning will come in separate patches.
Commit: 93248729cfae82a5ca2323d4a8e15aa3b9b9c707
https://github.com/llvm/llvm-project/commit/93248729cfae82a5ca2323d4a8e15aa3b9b9c707
Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
R llvm/test/MC/RISCV/rv32a-invalid.s
R llvm/test/MC/RISCV/rv32a-valid.s
A llvm/test/MC/RISCV/rv32zaamo-invalid.s
A llvm/test/MC/RISCV/rv32zaamo-valid.s
A llvm/test/MC/RISCV/rv32zalrsc-invalid.s
A llvm/test/MC/RISCV/rv32zalrsc-valid.s
R llvm/test/MC/RISCV/rv64a-invalid.s
R llvm/test/MC/RISCV/rv64a-valid.s
A llvm/test/MC/RISCV/rv64zaamo-invalid.s
A llvm/test/MC/RISCV/rv64zaamo-valid.s
A llvm/test/MC/RISCV/rv64zalrsc-invalid.s
A llvm/test/MC/RISCV/rv64zalrsc-valid.s
Log Message:
-----------
[RISCV][MC] Split tests for A into Zaamo and Zalrsc parts
So that we don't duplicate tests in later patch.
Reviewers: topperc, dtcxzyw, asb
Reviewed By: asb
Pull Request: https://github.com/llvm/llvm-project/pull/79111
Commit: 987087df90026605fc8d03ebda5a1cd31b71e609
https://github.com/llvm/llvm-project/commit/987087df90026605fc8d03ebda5a1cd31b71e609
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-01-23 (Tue, 23 Jan 2024)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
M clang/docs/ReleaseNotes.rst
M libcxx/include/__config
M lld/docs/ReleaseNotes.rst
M llvm/CMakeLists.txt
M llvm/docs/ReleaseNotes.rst
M llvm/utils/gn/secondary/llvm/version.gni
M llvm/utils/lit/lit/__init__.py
M openmp/docs/ReleaseNotes.rst
M pstl/docs/ReleaseNotes.rst
Log Message:
-----------
Bump trunk version to 19.0.0git
Commit: baba7e4175b6ca21e83b1cf8229f29dbba02e979
https://github.com/llvm/llvm-project/commit/baba7e4175b6ca21e83b1cf8229f29dbba02e979
Author: Weining Lu <luweining at loongson.cn>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/test/DebugInfo/LoongArch/dwarf-loongarch-relocs.ll
Log Message:
-----------
[test] Update dwarf-loongarch-relocs.ll
Address buildbot faiures:
http://45.33.8.238/macm1/77360/step_11.txt
http://45.33.8.238/linux/128902/step_12.txt
Commit: 7251243315ef66f9b3f32e6f8e9536f701aa0d0a
https://github.com/llvm/llvm-project/commit/7251243315ef66f9b3f32e6f8e9536f701aa0d0a
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
R llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
R llvm/include/llvm/CodeGen/MachinePassRegistry.def
A llvm/include/llvm/Passes/CodeGenPassBuilder.h
A llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/module.modulemap
M llvm/lib/CodeGen/CMakeLists.txt
R llvm/lib/CodeGen/CodeGenPassBuilder.cpp
M llvm/lib/Passes/CMakeLists.txt
A llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/tools/llc/NewPMDriver.cpp
Log Message:
-----------
[CodeGen][Passes] Move `CodeGenPassBuilder.h` to Passes (#79242)
`CodeGenPassBuilder` is not very tightly coupled to CodeGen, it may need
to reference some method in pass builder in future, so move
`CodeGenPassBuilder.h` to Passes.
Commit: 33d804c6c2786cbbbc13743060f08d679941e0a4
https://github.com/llvm/llvm-project/commit/33d804c6c2786cbbbc13743060f08d679941e0a4
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/test/CodeGen/RISCV/pr69586.ll
Log Message:
-----------
[RISCV] Allow VCIX with SE to reorder (#77049)
This patch allows VCIX instructions that have side effect to be
reordered
with memory and other side effecting instructions. However we don't want
VCIX instructions to be reordered with each other, so we propose a dummy
register called VCIX_STATE and make these instructions implicitly define
and use
it.
Commit: 502ec2e5a0e5922e09e69b7da08f3e7a8c7aacac
https://github.com/llvm/llvm-project/commit/502ec2e5a0e5922e09e69b7da08f3e7a8c7aacac
Author: Weining Lu <luweining at loongson.cn>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/test/DebugInfo/LoongArch/dwarf-loongarch-relocs.ll
Log Message:
-----------
[test] Make dwarf-loongarch-relocs.ll non-sensitive of function alignment
Commit: 4c3de45ecf9eea6b4ad850a042706f7865a2aab2
https://github.com/llvm/llvm-project/commit/4c3de45ecf9eea6b4ad850a042706f7865a2aab2
Author: leecheechen <chenli at loongson.cn>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/test/CodeGen/LoongArch/lasx/builtin-error.c
M clang/test/CodeGen/LoongArch/lsx/builtin-error.c
Log Message:
-----------
[LoongArch][test] Add tests reporting error if lsx/lasx feature is missing when lsx/lasx builtins are called (#79250)
Commit: 218bb21eaa2f3c08ec24de1f5d88f4d5265068bf
https://github.com/llvm/llvm-project/commit/218bb21eaa2f3c08ec24de1f5d88f4d5265068bf
Author: Luke Lau <luke at igalia.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Log Message:
-----------
[RISCV] Update performCombineVMergeAndVOps comments. NFC (#78472)
The current comment was written whenever we had separate TU/TA variants
for
each pseudo, and hasn't been accurate for a while.
This method has grown rather complicated over time so rather than
enumerate all
the different possible cases now (which must be a lot), this updates the
comment to list the different rules that are required for us to be able
to fold
a vmerge.
Commit: f7b61f81b5c4710fe089c357ef57ac0afcaf4b56
https://github.com/llvm/llvm-project/commit/f7b61f81b5c4710fe089c357ef57ac0afcaf4b56
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/apx/adc.ll
M llvm/test/CodeGen/X86/apx/sbb.ll
M llvm/test/CodeGen/X86/apx/sub.ll
Log Message:
-----------
[X86][CodeGen] Transform NDD SUB to CMP if dest reg is dead (#79135)
Commit: a01195ff5cc3d7fd084743b1f47007645bb385f4
https://github.com/llvm/llvm-project/commit/a01195ff5cc3d7fd084743b1f47007645bb385f4
Author: Douglas Yung <douglas.yung at sony.com>
Date: 2024-01-23 (Tue, 23 Jan 2024)
Changed paths:
M llvm/test/CodeGen/SystemZ/zos-ppa2.ll
Log Message:
-----------
Update compiler version expected that seems to be embedded in CHECK line of test at llvm/test/CodeGen/SystemZ/zos-ppa2.ll.
The test contains a CHECK line which verifies an .ascii line which originally checks
for 18001970010100000000. After the bump of the compiler version to 19, the test
started to fail with the string now being 19001970010100000000.
This should fix this failing test on bots.
Commit: b4785cebfb0a756e19ff4ae3e41d2563f10cd292
https://github.com/llvm/llvm-project/commit/b4785cebfb0a756e19ff4ae3e41d2563f10cd292
Author: Uday Bondhugula <uday at polymagelabs.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M mlir/include/mlir/Dialect/Affine/Analysis/Utils.h
M mlir/include/mlir/Dialect/Affine/LoopFusionUtils.h
M mlir/lib/Dialect/Affine/Utils/LoopFusionUtils.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
Log Message:
-----------
[MLIR] NFC. Clean up stale TODO comments and style deviations in affine utils (#79079)
NFC. Clean up stale TODO comments and style deviations in affine utils
and
affine fusion utils.
Commit: bc182ea7c2e86aea27268a08311438f8093a6a45
https://github.com/llvm/llvm-project/commit/bc182ea7c2e86aea27268a08311438f8093a6a45
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Passes/BUILD.gn
Log Message:
-----------
[gn build] Port 7251243315ef
Commit: 7e3fb372b0e8899958ec7e9241797e7e136a7a23
https://github.com/llvm/llvm-project/commit/7e3fb372b0e8899958ec7e9241797e7e136a7a23
Author: kadir çetinkaya <kadircet at google.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang-tools-extra/include-cleaner/test/tool.cpp
M clang-tools-extra/include-cleaner/tool/IncludeCleaner.cpp
Log Message:
-----------
[include-cleaner] Check emptiness instead of occurences (#79154)
Our internal integration relies on injecting some default values to
ignore/keep lists.
That means we can have filters, despite of not having occurences
for the flag.
Commit: d119ecb958ebc0a82e7bca01a21115ced8e0b13d
https://github.com/llvm/llvm-project/commit/d119ecb958ebc0a82e7bca01a21115ced8e0b13d
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/test/CodeGen/X86/apx/mul-i1024.ll
Log Message:
-----------
[X86][NFC] Pre-commit test for RA hints for APX NDD instructions
Commit: 5355857038cf6f9e3831504804e973508ffc2d01
https://github.com/llvm/llvm-project/commit/5355857038cf6f9e3831504804e973508ffc2d01
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/include/clang/Basic/CharInfo.h
Log Message:
-----------
[Clang][NFC] Optimize isAsciiIdentifierContinue (#78699)
Precompute the isAsciiIdentifierContinue table which is on the hot path.
https://llvm-compile-time-tracker.com/compare.php?from=30da0f5a359ab4a684c5fdf0f4dbed20bae10f99&to=cb0e48db2b8193d2ee59c2a6e998317cb220d513&stat=instructions:u
Commit: 7a6c2628e99f70edf6ee46a6b4b4d3d7301353c6
https://github.com/llvm/llvm-project/commit/7a6c2628e99f70edf6ee46a6b4b4d3d7301353c6
Author: martinboehme <mboehme at google.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
Log Message:
-----------
[clang][dataflow] Eliminate two uses of `RecordValue::getLoc()`. (#79163)
This is a small step towards eventually eliminating `RecordValue`
entirely.
Commit: 78b00c116be8b3b53ff13552e31eb305b11cb169
https://github.com/llvm/llvm-project/commit/78b00c116be8b3b53ff13552e31eb305b11cb169
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M lldb/source/Core/ValueObject.cpp
Log Message:
-----------
Revert "[lldb] Improve maintainability and readability for ValueObject methods (#75865)"
This reverts commit d657519838e4b2310e13ec5ff52599e041860825 as it
breaks two dozen tests. The breakages are related to variable path
expression parsing and summary string parsing (possibly the same code).
Commit: dd3e6c87f3f4affd17d05a4d25fa77d224a98d94
https://github.com/llvm/llvm-project/commit/dd3e6c87f3f4affd17d05a4d25fa77d224a98d94
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/LangOptions.def
M clang/lib/Serialization/ASTReaderDecl.cpp
A clang/test/Interpreter/cxx20-modules.cppm
Log Message:
-----------
Support C++20 Modules in clang-repl (#79261)
This comes from when I playing around clang-repl with moduels : )
I succeeded to import std with https://libcxx.llvm.org/Modules.html and
calling `std::printf` after this patch.
I want to put the documentation part to
https://clang.llvm.org/docs/StandardCPlusPlusModules.html in a separate
commit.
Commit: 71d64ed80f8b7556be6954b2c4d663c7d89f476d
https://github.com/llvm/llvm-project/commit/71d64ed80f8b7556be6954b2c4d663c7d89f476d
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrInfo.cpp
A llvm/test/CodeGen/X86/apx/optimize-compare.mir
A llvm/test/CodeGen/X86/apx/shift-eflags.ll
Log Message:
-----------
[X86][Peephole] Add NDD entries for EFLAGS optimization
Commit: c1259650e742e7b3053f6520729b4c1f44c27814
https://github.com/llvm/llvm-project/commit/c1259650e742e7b3053f6520729b4c1f44c27814
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang/test/Interpreter/cxx20-modules.cppm
Log Message:
-----------
[NFC] Add more requirement to clang/test/Interpreter/cxx20-modules.cppm
The previous test can't work on other platforms like PS4.
Address the comments in
https://github.com/llvm/llvm-project/pull/79261#issuecomment-1907589030
Commit: 11ca56eaf1aaf4f7fba5d94562c6b6c0d4444bc3
https://github.com/llvm/llvm-project/commit/11ca56eaf1aaf4f7fba5d94562c6b6c0d4444bc3
Author: Felix Kellenbenz <107758057+felixkellenbenz at users.noreply.github.com>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/test/tools/llvm-objcopy/ELF/strip-all.test
Log Message:
-----------
[llvm-objcopy] Don't remove .gnu_debuglink section when using --strip-all (#78919)
This fixes the issue mentioned here:
https://github.com/llvm/llvm-project/issues/57407
It prevents `llvm-objcopy` from removing the `.gnu _debuglink` section
when used with the `--strip-all` flag. Since `--strip-all` is the
default of `llvm-strip` the patch also prevents `llvm-strip` from
removing the `.gnu_debuglink` section.
Commit: 5296604ff5f9e0c32964622d9b6946a5206510fb
https://github.com/llvm/llvm-project/commit/5296604ff5f9e0c32964622d9b6946a5206510fb
Author: Fangrui Song <i at maskray.me>
Date: 2024-01-24 (Wed, 24 Jan 2024)
Changed paths:
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/include-cleaner/test/tool.cpp
M clang-tools-extra/include-cleaner/tool/IncludeCleaner.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/CharInfo.h
M clang/include/clang/Basic/LangOptions.def
M clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/test/CodeGen/LoongArch/lasx/builtin-error.c
M clang/test/CodeGen/LoongArch/lsx/builtin-error.c
M clang/test/Driver/riscv-cpus.c
A clang/test/Interpreter/cxx20-modules.cppm
M clang/test/Misc/target-invalid-cpu-note.c
A clang/test/Modules/pr73023.cpp
M libcxx/include/__config
M lld/docs/ReleaseNotes.rst
M lldb/source/Core/ValueObject.cpp
M llvm/CMakeLists.txt
M llvm/docs/ReleaseNotes.rst
R llvm/include/llvm/CodeGen/CodeGenPassBuilder.h
R llvm/include/llvm/CodeGen/MachinePassRegistry.def
M llvm/include/llvm/CodeGen/TargetPassConfig.h
A llvm/include/llvm/Passes/CodeGenPassBuilder.h
A llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/include/module.modulemap
M llvm/lib/CodeGen/CMakeLists.txt
R llvm/lib/CodeGen/CodeGenPassBuilder.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/ObjCopy/ELF/ELFObjcopy.cpp
M llvm/lib/Passes/CMakeLists.txt
A llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/X86/CMakeLists.txt
A llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86TargetMachine.h
M llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
M llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i32_system.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/ipra.ll
M llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spills-split-regalloc.ll
M llvm/test/CodeGen/AMDGPU/sibling-call.ll
M llvm/test/CodeGen/AMDGPU/spill-sgpr-csr-live-ins.mir
M llvm/test/CodeGen/AMDGPU/spill-sgpr-to-virtual-vgpr.mir
M llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll
M llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
M llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/vgpr-large-tuple-alloc-error.ll
M llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/RISCV/pr69586.ll
M llvm/test/CodeGen/SystemZ/zos-ppa2.ll
M llvm/test/CodeGen/X86/apx/adc.ll
M llvm/test/CodeGen/X86/apx/mul-i1024.ll
A llvm/test/CodeGen/X86/apx/optimize-compare.mir
M llvm/test/CodeGen/X86/apx/sbb.ll
A llvm/test/CodeGen/X86/apx/shift-eflags.ll
M llvm/test/CodeGen/X86/apx/sub.ll
M llvm/test/DebugInfo/LoongArch/dwarf-loongarch-relocs.ll
R llvm/test/MC/RISCV/rv32a-invalid.s
R llvm/test/MC/RISCV/rv32a-valid.s
A llvm/test/MC/RISCV/rv32zaamo-invalid.s
A llvm/test/MC/RISCV/rv32zaamo-valid.s
A llvm/test/MC/RISCV/rv32zalrsc-invalid.s
A llvm/test/MC/RISCV/rv32zalrsc-valid.s
R llvm/test/MC/RISCV/rv64a-invalid.s
R llvm/test/MC/RISCV/rv64a-valid.s
A llvm/test/MC/RISCV/rv64zaamo-invalid.s
A llvm/test/MC/RISCV/rv64zaamo-valid.s
A llvm/test/MC/RISCV/rv64zalrsc-invalid.s
A llvm/test/MC/RISCV/rv64zalrsc-valid.s
A llvm/test/tools/llc/new-pm/lit.local.cfg
A llvm/test/tools/llc/new-pm/option-conflict.ll
A llvm/test/tools/llc/new-pm/pipeline.ll
A llvm/test/tools/llc/new-pm/start-stop.ll
M llvm/test/tools/llvm-objcopy/ELF/strip-all.test
M llvm/tools/llc/CMakeLists.txt
A llvm/tools/llc/NewPMDriver.cpp
A llvm/tools/llc/NewPMDriver.h
M llvm/tools/llc/llc.cpp
M llvm/unittests/CodeGen/CMakeLists.txt
R llvm/unittests/CodeGen/CodeGenPassBuilderTest.cpp
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Passes/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llc/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/version.gni
M llvm/utils/lit/lit/__init__.py
M mlir/include/mlir/Dialect/Affine/Analysis/Utils.h
M mlir/include/mlir/Dialect/Affine/LoopFusionUtils.h
M mlir/lib/Dialect/Affine/Utils/LoopFusionUtils.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M openmp/docs/ReleaseNotes.rst
M pstl/docs/ReleaseNotes.rst
Log Message:
-----------
edit description, include C example
Created using spr 1.3.4
Compare: https://github.com/llvm/llvm-project/compare/97b500a70610...5296604ff5f9
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