[all-commits] [llvm/llvm-project] f9c908: [RISCV] Split TuneShiftedZExtFusion (#76032)

[Wang Pengcheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f9c908862a34b464694087705ebaf070f87f251c
      https://github.com/llvm/llvm-project/commit/f9c908862a34b464694087705ebaf070f87f251c
  Author: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
  Date:   2023-12-22 (Fri, 22 Dec 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVMacroFusion.cpp
    M llvm/lib/Target/RISCV/RISCVProcessors.td
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    R llvm/test/CodeGen/RISCV/macro-fusions-veyron-v1.mir
    A llvm/test/CodeGen/RISCV/macro-fusions.mir

  Log Message:
  -----------
  [RISCV] Split TuneShiftedZExtFusion (#76032)

We split `TuneShiftedZExtFusion` into three fusions to make them
reusable and match the GCC implementation[1].

The zexth/zextw fusions can be reused by XiangShan[2] and other
commercial processors, but shifted zero extension is not so common.

`macro-fusions-veyron-v1.mir` is renamed so it's not relevant to
specific processor.

References:
[1] https://gcc.gnu.org/pipermail/gcc-patches/2023-November/637303.html
[2] https://xiangshan-doc.readthedocs.io/zh_CN/latest/frontend/decode