[all-commits] [llvm/llvm-project] a16053: [TableGen][GlobalISel] Add specialized opcodes (#7...

Pierre van Houtryve via All-commits all-commits at lists.llvm.org
Wed Dec 13 00:09:46 PST 2023


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a160536f8d142a7981576a98ec66802e0b4bb627
      https://github.com/llvm/llvm-project/commit/a160536f8d142a7981576a98ec66802e0b4bb627
  Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
  Date:   2023-12-13 (Wed, 13 Dec 2023)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
    M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
    M llvm/test/TableGen/DefaultOpsGlobalISel.td
    M llvm/test/TableGen/GlobalISelCombinerEmitter/builtins/match-table-replacerreg.td
    M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-imms.td
    M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-operand-types.td
    M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-patfrag-root.td
    M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-permutations.td
    M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-typeof.td
    M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table.td
    M llvm/test/TableGen/GlobalISelEmitter-input-discard.td
    M llvm/test/TableGen/GlobalISelEmitter-nested-subregs.td
    M llvm/test/TableGen/GlobalISelEmitter.td
    M llvm/test/TableGen/GlobalISelEmitterMatchTableOptimizer.td
    M llvm/test/TableGen/GlobalISelEmitterMatchTableOptimizerSameOperand-invalid.td
    M llvm/test/TableGen/GlobalISelEmitterRegSequence.td
    M llvm/test/TableGen/GlobalISelEmitterSubreg.td
    M llvm/utils/TableGen/GlobalISelMatchTable.cpp
    M llvm/utils/TableGen/GlobalISelMatchTable.h

  Log Message:
  -----------
  [TableGen][GlobalISel] Add specialized opcodes (#74823)

Most users of AddImm and CheckConstantInt only use 1 byte immediates, so
I added an opcode variants for those. That way all those instructions
save 7 bytes.
Also added an opcode for AddTempRegister for the cases where there are
no register flags.

Space savings:
    - AMDGPUGenGlobalISel: 470180 bytes to 422564 (-10%)
    - AArch64GenGlobalISel.inc: 383893 bytes to 374046




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