[all-commits] [llvm/llvm-project] 5d501b: [GISel][RISCV] Fix several boundary cases in narro...
Craig Topper via All-commits
all-commits at lists.llvm.org
Fri Nov 24 08:39:53 PST 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 5d501b1091ce3632b885c60a8fc9f74ed9c95ae3
https://github.com/llvm/llvm-project/commit/5d501b1091ce3632b885c60a8fc9f74ed9c95ae3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2023-11-24 (Fri, 24 Nov 2023)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mulo-rv32.mir
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-mulo-rv64.mir
Log Message:
-----------
[GISel][RISCV] Fix several boundary cases in narrow G_SEXT_INREG. (#72719)
This fixes cases when SizeInBits is a multiple of the narrow size.
If SizeBits is equal to NarrowTy size, the first block would create an
illegal G_SEXT_INREG where the the extension size is equal to the type.
I tried to turn it into G_TRUNC+G_SEXT, but that just turned back into
G_SEXT_INREG causing an infinite loop. So punt to the splitting case.
In the for loop we should copy when the part ends on SizeInBits. In that
case there is no G_SEXT_INREG needed for partial. But we should note
that register in PartialExtensionReg for the first full part to use.
If the part starts on SizeInBits then we should do an AShr of
PartialExtensionReg.
We should only get to the G_SEXT_INREG case if the SizeInBits is in the
middle of the part.
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