[all-commits] [llvm/llvm-project] 053002: [RISCV][GISel] Add really basic support for FP reg...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 05300222bab4d48e13cc8bb5cce8c160faad47a0
      https://github.com/llvm/llvm-project/commit/05300222bab4d48e13cc8bb5cce8c160faad47a0
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-11-13 (Mon, 13 Nov 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
    A llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fp-load-store.mir

  Log Message:
  -----------
  [RISCV][GISel] Add really basic support for FP regbank selection for G_LOAD/G_STORE. (#70896)

Coerce the register bank based on the users of the G_LOAD or the
defining instruction for the G_STORE.

s64 on rv32 is handled by forcing the FPRB register bank.