[all-commits] [llvm/llvm-project] 891220: [RISCV] Add experimental support for making i32 a ...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8912200966409f18e27aa0627e521faa190029a6
      https://github.com/llvm/llvm-project/commit/8912200966409f18e27aa0627e521faa190029a6
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-11-01 (Wed, 01 Nov 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/Target/RISCV/RISCVGISel.td
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoA.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoM.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZfbfmin.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/alu32.ll
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/div.ll
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/imm.ll
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/mem.ll
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/mem64.ll
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/rem.ll
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64xtheadbb.ll
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zba.ll
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbb-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbb-zbkb.ll
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbb.ll
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbc-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbc-zbkc-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbkb-intrinsic.ll
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/rv64zbs.ll
    A llvm/test/CodeGen/RISCV/rv64-legal-i32/xaluo.ll

  Log Message:
  -----------
  [RISCV] Add experimental support for making i32 a legal type on RV64 in SelectionDAG. (#70357)

This will select i32 operations directly to W instructions without
custom nodes. Hopefully this can allow us to be less dependent on
hasAllNBitUsers to recover i32 operations in RISCVISelDAGToDAG.cpp.

This support is enabled with a command line option that is off by
default.

Generated code is still not optimal.

I've duplicated many test cases for this, but its not complete. Enabling this runs all existing lit tests without crashing.