[all-commits] [llvm/llvm-project] 7caff7: [AMDGPU] Assert that we can find subregs in copyPh...

[Jay Foad via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7caff73e38038a98b837566eaf0e2e50754e2443
      https://github.com/llvm/llvm-project/commit/7caff73e38038a98b837566eaf0e2e50754e2443
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2023-10-26 (Thu, 26 Oct 2023)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

  Log Message:
  -----------
  [AMDGPU] Assert that we can find subregs in copyPhysReg. NFC. (#70332)

This helped to catch a codegen failure caused by #69703. MachineVerifier
did not complain about this malformed COPY either before regalloc:

  %9:vreg_64 = COPY %17:vgpr_32

Or after regalloc:

  renamable $vgpr0_vgpr1 = COPY renamable $vgpr2, implicit $exec

But we can at least catch the problem when copyPhysReg tries to expand
it into 32-bit register moves and fails to find suitable source
registers:

  $vgpr0 = V_MOV_B32_e32 $noreg, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr2
  $vgpr1 = V_MOV_B32_e32 $noreg, implicit $exec, implicit $vgpr2, implicit $exec