[all-commits] [llvm/llvm-project] c2b64d: [RISCV][GISel] Add regbank selection for G_FADD/G_...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: c2b64dfaa4029489d72fe3e1d6e2a8fd33f4510a
      https://github.com/llvm/llvm-project/commit/c2b64dfaa4029489d72fe3e1d6e2a8fd33f4510a
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-10-25 (Wed, 25 Oct 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
    A llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/fp-arith.mir

  Log Message:
  -----------
  [RISCV][GISel] Add regbank selection for G_FADD/G_FSUB/G_FMUL/G_FDIV with F/D extensions. (#69805)

This includes the plumbing for ValueMapping and PartialMapping.