[all-commits] [llvm/llvm-project] a77009: [lldb][AArch64] Correct type of 32 bit GPR Registe...

David Spickett via All-commits all-commits at lists.llvm.org
Wed Oct 25 01:08:15 PDT 2023


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a7700985577694d6cc2498833f27b4fb5eeaf252
      https://github.com/llvm/llvm-project/commit/a7700985577694d6cc2498833f27b4fb5eeaf252
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2023-10-25 (Wed, 25 Oct 2023)

  Changed paths:
    M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp

  Log Message:
  -----------
  [lldb][AArch64] Correct type of 32 bit GPR RegisterValues when using core files (#70054)

As ReadRegister always read into a uint64_t, when it called operator=
with uint64_t it was setting the RegisterValue's type to eTypeUInt64
regardless of its size.

This mostly works because most registers are 64 bit, and very few bits
of code rely on the type being correct. However, cpsr, fpsr and fpcr are
in fact 32 bit, and my upcoming register fields code relies on this type
being correct.

Which is how I found this bug and unfortunately is the only way to test
it. As RegisterValue::Type never makes it out via the API anywhere. So
this change will be tested once I start adding register field
information.




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