[all-commits] [llvm/llvm-project] 64b1fb: [RISCV] Disable constant hoisting for mul by one m...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 64b1fbb3bd03531749792bfb20526c0a0dc07838
      https://github.com/llvm/llvm-project/commit/64b1fbb3bd03531749792bfb20526c0a0dc07838
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-09-26 (Tue, 26 Sep 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/test/Transforms/ConstantHoisting/RISCV/immediates.ll

  Log Message:
  -----------
  [RISCV] Disable constant hoisting for mul by one more/less than a pow… (#67385)

…er of 2.

We can use a shift+add/sub for these. This often has same or lower
latency than a multiply and may have more execution resources available.