[all-commits] [llvm/llvm-project] d7195c: Reland https://reviews.llvm.org/D159073.

[Esme via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d7195c57d823f9bff3e485ba1c4047376ee620f3
      https://github.com/llvm/llvm-project/commit/d7195c57d823f9bff3e485ba1c4047376ee620f3
  Author: esmeyi <esme.yi at ibm.com>
  Date:   2023-09-26 (Tue, 26 Sep 2023)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
    A llvm/test/CodeGen/PowerPC/fold-rot-and-peephole.mir
    M llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll

  Log Message:
  -----------
  Reland https://reviews.llvm.org/D159073.

The patch failed in test-suite due to a liveness error after rebasing on https://reviews.llvm.org/D133103, and now it's fixed.

```
[PowerPC][Peephole] Combine rldicl/rldicr and andi/andis after isel.

Summary: rldicl/rldicr can be eliminated if it's used to clear thehigh-order or low-order n bits and all bits cleared will be ANDed with 0 byandi/andis. Or they can be folded to `andi 0` if all bits to AND are alreadyzero in the input.

Reviewed By: qiucf, shchenz

Differential Revision: https://reviews.llvm.org/D159073
```