[all-commits] [llvm/llvm-project] 2de74e: [PowerPC][Peephole] Combine rldicl/rldicr and andi...

[Esme via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2de74e1bd4d540063d7495fa6254781abd41e179
      https://github.com/llvm/llvm-project/commit/2de74e1bd4d540063d7495fa6254781abd41e179
  Author: esmeyi <esme.yi at ibm.com>
  Date:   2023-09-25 (Mon, 25 Sep 2023)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
    A llvm/test/CodeGen/PowerPC/fold-rot-and-peephole.mir
    M llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll

  Log Message:
  -----------
  [PowerPC][Peephole] Combine rldicl/rldicr and andi/andis after isel.

Summary: rldicl/rldicr can be eliminated if it's used to clear the high-order or low-order n bits and all bits cleared will be ANDed with 0 by andi/andis. Or they can be folded to `andi 0` if all bits to AND are already zero in the input.

Reviewed By: qiucf, shchenz

Differential Revision: https://reviews.llvm.org/D159073