[all-commits] [llvm/llvm-project] a677a1: [mlir][py] Enable AsmState overload for operation.

[Jacques Pienaar via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a677a173273f7735a3a5447a47851591b984e7aa
      https://github.com/llvm/llvm-project/commit/a677a173273f7735a3a5447a47851591b984e7aa
  Author: Jacques Pienaar <jpienaar at google.com>
  Date:   2023-09-25 (Mon, 25 Sep 2023)

  Changed paths:
    M mlir/lib/Bindings/Python/IRCore.cpp
    M mlir/lib/Bindings/Python/IRModule.h
    M mlir/test/python/ir/value.py

  Log Message:
  -----------
  [mlir][py] Enable AsmState overload for operation.