[all-commits] [llvm/llvm-project] bc38c4: [DAGCombiner][AArch64] Fix incorrect cast VT in `t...

goldsteinn via All-commits all-commits at lists.llvm.org
Sat Sep 23 07:51:03 PDT 2023

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: bc38c427d454d3ae1e38c97c5c03cf372882a13f
  Author: Noah Goldstein <goldstein.w.n at gmail.com>
  Date:   2023-09-23 (Sat, 23 Sep 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    A llvm/test/CodeGen/AArch64/fold-int-pow2-with-fmul-or-fdiv.ll

  Log Message:
  [DAGCombiner][AArch64] Fix incorrect cast VT in `takeInexpensiveLog2`

Previously, we where taking `CurVT` before finalizing `ToCast` which
meant potentially returning an `SDValue` with an illegal `ValueType`
for the operation.

Fix is to just take `CurVT` after we have finalized `ToCast` with

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