[all-commits] [llvm/llvm-project] ededcb: [AArch64] Refactor AArch64InstrInfo::isAsCheapAsAM...
Momchil Velikov via All-commits
all-commits at lists.llvm.org
Thu Sep 21 10:30:21 PDT 2023
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: ededcb004117eb60d9a2316ae6a8db660e7006a1
https://github.com/llvm/llvm-project/commit/ededcb004117eb60d9a2316ae6a8db660e7006a1
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2023-09-21 (Thu, 21 Sep 2023)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
A llvm/test/CodeGen/AArch64/cheap-as-a-move.ll
Log Message:
-----------
[AArch64] Refactor AArch64InstrInfo::isAsCheapAsAMove (NFC)
- remove `FeatureCustomCheapAsMoveHandling`: when you have target
features affecting `isAsCheapAsAMove` that can be given on command
line or passed via attributes, then every sub-target effectively has
custom handling
- remove special handling of `FMOVD0`/etc: `FVMOV` with an immediate
zero operand is never[1] more expensive tha an `FMOV` with a
register operand.
- remove special handling of `COPY` - copy is trivially as cheap as
itself
- make the function default to the `MachineInstr` attribute
`isAsCheapAsAMove`
- remove special handling of `ANDWrr`/etc and of `ANDWri`/etc: the
fallback `MachineInstr` attribute is already non-zero.
- remove special handling of `ADDWri`/`SUBWri`/`ADDXri`/`SUBXri` -
there are always[1] one cycle latency with maximum (for the
micro-architecture) throughput
- check if `MOVi32Imm`/`MOVi64Imm` can be expanded into a "cheap"
sequence of instructions
There is a little twist with determining whether a
MOVi32Imm`/`MOVi64Imm` is "as-cheap-as-a-move". Even if one of these
pseudo-instructions needs to be expanded to more than one MOVZ,
MOVN, or MOVK instructions, materialisation may be preferrable to
allocating a register to hold the constant. For the moment a cutoff
at two instructions seems like a reasonable compromise.
[1] according to 19 software optimisation manuals
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D154722
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