[all-commits] [llvm/llvm-project] 754537: [mlir][python] Expose AsmState python side. (#66819)

[Jacques Pienaar via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 75453714f06c86a6096e4c3e45243fb7797a6756
      https://github.com/llvm/llvm-project/commit/75453714f06c86a6096e4c3e45243fb7797a6756
  Author: Jacques Pienaar <jpienaar at google.com>
  Date:   2023-09-20 (Wed, 20 Sep 2023)

  Changed paths:
    M mlir/lib/Bindings/Python/IRCore.cpp
    M mlir/lib/Bindings/Python/IRModule.h
    M mlir/test/python/ir/value.py

  Log Message:
  -----------
  [mlir][python] Expose AsmState python side. (#66819)

This does basic plumbing, ideally want a context approach to reduce
needing to thread these manually, but the current is useful even in that
state.

Made Value.get_name change backwards compatible, so one could either set
a field or create a state to pass in.