[all-commits] [llvm/llvm-project] 6ec53b: [X86] Add tests for folding `fmul`/`fdiv` by Pow2 ...

[goldsteinn via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 6ec53b45675df3c43a5b643ce1a412eddbaa8e5a
      https://github.com/llvm/llvm-project/commit/6ec53b45675df3c43a5b643ce1a412eddbaa8e5a
  Author: Noah Goldstein <goldstein.w.n at gmail.com>
  Date:   2023-09-20 (Wed, 20 Sep 2023)

  Changed paths:
    A llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll

  Log Message:
  -----------
  [X86] Add tests for folding `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp; NFC

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D154804


  Commit: 32a46919a2f3009d19a2de75d1dbb0f530aa19ce
      https://github.com/llvm/llvm-project/commit/32a46919a2f3009d19a2de75d1dbb0f530aa19ce
  Author: Noah Goldstein <goldstein.w.n at gmail.com>
  Date:   2023-09-20 (Wed, 20 Sep 2023)

  Changed paths:
    A llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll

  Log Message:
  -----------
  [AMDGPU] Add tests for folding `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp; NFC

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D159405


  Commit: 47c642f9a0e936822ce23bdb834bcc4c29ae6484
      https://github.com/llvm/llvm-project/commit/47c642f9a0e936822ce23bdb834bcc4c29ae6484
  Author: Noah Goldstein <goldstein.w.n at gmail.com>
  Date:   2023-09-20 (Wed, 20 Sep 2023)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetLowering.h
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.h
    M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
    M llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll

  Log Message:
  -----------
  [DAGCombiner] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp

Note: This is moving D154678 which previously implemented this in
InstCombine. Concerns where brought up that this was de-canonicalizing
and really targeting a codegen improvement, so placing in DAGCombiner.

This implements:

```
(fmul C, (uitofp Pow2))
    -> (bitcast_to_FP (add (bitcast_to_INT C), Log2(Pow2) << mantissa))
(fdiv C, (uitofp Pow2))
    -> (bitcast_to_FP (sub (bitcast_to_INT C), Log2(Pow2) << mantissa))
```
The motivation is mostly fdiv where 2^(-p) is a fairly common
expression.

The patch is intentionally conservative about the transform, only
doing so if we:
    1) have IEEE floats
    2) C is normal
    3) add/sub of max(Log2(Pow2)) stays in the min/max exponent
       bounds.

Alive2 can't realistically prove this, but did test float16/float32
cases (within the bounds of the above rules) exhaustively.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D154805


  Commit: 6d6314ba644902d3cca7d5e6bd4c0021f82ab55b
      https://github.com/llvm/llvm-project/commit/6d6314ba644902d3cca7d5e6bd4c0021f82ab55b
  Author: Noah Goldstein <goldstein.w.n at gmail.com>
  Date:   2023-09-20 (Wed, 20 Sep 2023)

  Changed paths:
    M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll

  Log Message:
  -----------
  [DAGCombiner] Extend `combineFMulOrFDivWithIntPow2` to work for non-splat float vecs

Do so by extending `matchUnaryPredicate` to also work for
`ConstantFPSDNode` types then encapsulate the constant checks in a
lambda and pass it to `matchUnaryPredicate`.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D154868


Compare: https://github.com/llvm/llvm-project/compare/9cfc7ff16872...6d6314ba6449