[all-commits] [llvm/llvm-project] 4184ba: [RISCV] Refactor lowerSPLAT_VECTOR_PARTS to use sp...

Craig Topper via All-commits all-commits at lists.llvm.org
Fri Aug 25 14:15:56 PDT 2023


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4184bafa9b466180ff9f9f6d029301271db5d760
      https://github.com/llvm/llvm-project/commit/4184bafa9b466180ff9f9f6d029301271db5d760
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-08-25 (Fri, 25 Aug 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwadd.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsub.ll

  Log Message:
  -----------
  [RISCV] Refactor lowerSPLAT_VECTOR_PARTS to use splatPartsI64WithVL for scalable vectors.

There was quite a bit of duplication between splatPartsI64WithVL
and the scalable vector handling in lowerSPLAT_VECTOR_PARTS, but
scalable vector had one additional case. Move that case to
splatPartsI64WithVL which improves some fixed vector tests.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D158876


  Commit: 398c855457726014d9efd12417921e060712f542
      https://github.com/llvm/llvm-project/commit/398c855457726014d9efd12417921e060712f542
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2023-08-25 (Fri, 25 Aug 2023)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/splat-vector-split-i64-vl-sdnode.ll

  Log Message:
  -----------
  [RISCV] Improve splatPartsI64WithVL for vlmax scalable vector constants where Hi and Lo are the same.

We can use a 32-bit splat and bitcast to i64 vector.

This only handles the case where we are using vlmax so that the new
vl is cheap to compute. This could be generalized to double the VL.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D158879


Compare: https://github.com/llvm/llvm-project/compare/ee95b64adb7f...398c85545772


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