[all-commits] [llvm/llvm-project] b49bb7: [MLIR][PDL] Add support for representing and lower...

[Jeff Niu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b49bb7bdec067a1d48a4502399961667d2525444
      https://github.com/llvm/llvm-project/commit/b49bb7bdec067a1d48a4502399961667d2525444
  Author: Mogball <jeff at modular.com>
  Date:   2023-08-24 (Thu, 24 Aug 2023)

  Changed paths:
    M mlir/include/mlir/Dialect/PDL/IR/PDLOps.td
    M mlir/include/mlir/Dialect/PDLInterp/IR/PDLInterpOps.td
    M mlir/lib/Conversion/PDLToPDLInterp/PDLToPDLInterp.cpp
    M mlir/lib/Conversion/PDLToPDLInterp/Predicate.h
    M mlir/lib/Conversion/PDLToPDLInterp/PredicateTree.cpp
    M mlir/test/Conversion/PDLToPDLInterp/pdl-to-pdl-interp-matcher.mlir

  Log Message:
  -----------
  [MLIR][PDL] Add support for representing and lowering negated constraints

This commit enables modelling negation of native constraints.

This is accomplished through an attribute `isNegated` on the operations `pdl.apply_native_constraint` and `pdl_interp.apply_constraint` and according adjustments to the conversion in the ConvertPDLToPDLInterpPass.

Reviewed By: Mogball

Differential Revision: https://reviews.llvm.org/D153871