[all-commits] [llvm/llvm-project] d6639f: [SDAG][RISCV] Avoid folding `setcc (xor C1, -1), C...

[Yingwei Zheng via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d6639f83a98f29275d4ae490d2962c1ec1d298a5
      https://github.com/llvm/llvm-project/commit/d6639f83a98f29275d4ae490d2962c1ec1d298a5
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2023-08-24 (Thu, 24 Aug 2023)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    A llvm/test/CodeGen/RISCV/pr64935.ll

  Log Message:
  -----------
  [SDAG][RISCV] Avoid folding `setcc (xor C1, -1), C2, cond` into `setcc (xor C2, -1), C1, cond`

This patch fixes https://github.com/llvm/llvm-project/issues/64935.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D158654